GRF_CSI2PHY_LANE_SEL_SPLIT (reference) in projects: device

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/device/soc/rockchip/common/vendor/drivers/phy/
H A D	phy-rockchip-csi2-dphy-hw.c	`36 #define GRF_CSI2PHY_LANE_SEL_SPLIT (0x1) macro 503 val = ~GRF_CSI2PHY_LANE_SEL_SPLIT; in csi2_dphy_config_dual_mode() 522 val = GRF_CSI2PHY_LANE_SEL_SPLIT; in csi2_dphy_config_dual_mode()`
/device/soc/rockchip/rk3588/kernel/drivers/phy/rockchip/
H A D	phy-rockchip-csi2-dphy-hw.c	`36 #define GRF_CSI2PHY_LANE_SEL_SPLIT (0x1) macro 515 val = ~GRF_CSI2PHY_LANE_SEL_SPLIT; in csi2_dphy_config_dual_mode() 534 val = GRF_CSI2PHY_LANE_SEL_SPLIT; in csi2_dphy_config_dual_mode()`