| /device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/device/ |
| H A D | mali_kbase_device_hw.c | 66 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), in busy_wait_cache_clean_irq()
111 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), in kbase_gpu_cache_flush_and_busy_wait()
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/device/backend/ |
| H A D | mali_kbase_device_hw_jm.c | 71 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), val); in kbase_gpu_interrupt()
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/device/backend/ |
| H A D | mali_kbase_device_hw_jm.c | 70 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), val); in kbase_gpu_interrupt()
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| H A D | mali_kbase_device_hw_csf.c | 137 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), val); in kbase_gpu_interrupt()
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_irq_test/ |
| H A D | mali_kutf_irq_test_main.c | 95 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), val, in kbase_gpu_irq_custom_handler()
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/tests/mali_kutf_irq_test/ |
| H A D | mali_kutf_irq_test_main.c | 101 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), in kbase_gpu_irq_custom_handler()
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/backend/gpu/ |
| H A D | mali_kbase_device_hw.c | 244 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), val, NULL); in kbase_gpu_interrupt()
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| H A D | mali_kbase_pm_driver.c | 1012 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), GPU_IRQ_REG_ALL, in kbase_pm_enable_interrupts()
1038 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), GPU_IRQ_REG_ALL, in kbase_pm_disable_interrupts_nolock()
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| H A D | mali_kbase_jm_rb.c | 1838 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), in kbase_gpu_cacheclean()
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/backend/gpu/ |
| H A D | mali_kbase_device_hw.c | 234 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), val, NULL); in kbase_gpu_interrupt()
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| H A D | mali_kbase_pm_driver.c | 908 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), GPU_IRQ_REG_ALL, NULL); in kbase_pm_enable_interrupts()
931 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), GPU_IRQ_REG_ALL, NULL); in kbase_pm_disable_interrupts_nolock()
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| H A D | mali_kbase_jm_rb.c | 1605 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), CLEAN_CACHES_COMPLETED, NULL); in kbase_gpu_cacheclean()
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/gpu/ |
| H A D | mali_kbase_gpu_regmap.h | 44 #define GPU_IRQ_CLEAR 0x024 /* (WO) */ macro
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/backend/gpu/ |
| H A D | mali_kbase_instr_backend.c | 337 kbase_reg_write(kbdev, GPU_CONTROL_MCU_REG(GPU_IRQ_CLEAR), PRFCNT_SAMPLE_COMPLETED); in kbasep_hwcnt_irq_poll_tasklet()
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| H A D | mali_kbase_pm_driver.c | 1687 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), GPU_IRQ_REG_ALL);
1715 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), GPU_IRQ_REG_ALL);
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/ |
| H A D | mali_midg_regmap.h | 36 #define GPU_IRQ_CLEAR 0x024 /* (WO) */ macro
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/ |
| H A D | mali_kbase_dummy_job_wa.c | 227 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), U32_MAX); in kbase_dummy_job_wa_execute()
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/ |
| H A D | mali_kbase_dummy_job_wa.c | 220 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), U32_MAX); in kbase_dummy_job_wa_execute()
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/ |
| H A D | mali_midg_regmap.h | 40 #define GPU_IRQ_CLEAR 0x024 /* (WO) */ macro
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| /device/soc/rockchip/rk3588/kernel/include/uapi/gpu/arm/bifrost/gpu/ |
| H A D | mali_kbase_gpu_regmap.h | 52 #define GPU_IRQ_CLEAR 0x024 /* (WO) */ macro
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/backend/gpu/ |
| H A D | mali_kbase_pm_driver.c | 2236 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), GPU_IRQ_REG_ALL);
2264 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), GPU_IRQ_REG_ALL);
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| H A D | mali_kbase_model_dummy.c | 1181 } else if (addr == GPU_CONTROL_REG(GPU_IRQ_CLEAR)) {
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