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Help
Searched
refs:GICR_CTLR
(Results
1 - 2
of
2
) sorted by relevance
/device/soc/rockchip/common/sdk_linux/drivers/irqchip/
H
A
D
irq-gic-v3-its.c
3003
val = readl_relaxed(gic_data_rdist_rd_base() +
GICR_CTLR
);
in allocate_lpi_tables()
3076
val = readl_relaxed(rbase +
GICR_CTLR
);
in its_cpu_init_lpis()
3149
val = readl_relaxed(rbase +
GICR_CTLR
);
in its_cpu_init_lpis()
3151
writel_relaxed(val, rbase +
GICR_CTLR
);
in its_cpu_init_lpis()
5153
val = readl_relaxed(rbase +
GICR_CTLR
);
in redist_disable_lpis()
5177
writel_relaxed(val, rbase +
GICR_CTLR
);
in redist_disable_lpis()
5179
/* Make sure any change to
GICR_CTLR
is observable by the GIC */
in redist_disable_lpis()
5183
* Software must observe RWP==0 after clearing
GICR_CTLR
.EnableLPIs
in redist_disable_lpis()
5187
while (readl_relaxed(rbase +
GICR_CTLR
) & GICR_CTLR_RWP) {
in redist_disable_lpis()
5198
* DEFINED whether
GICR_CTLR
in redist_disable_lpis()
[all...]
/device/soc/rockchip/common/sdk_linux/include/linux/irqchip/
H
A
D
arm-gic-v3.h
112
#define
GICR_CTLR
GICD_CTLR
macro
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