Searched refs:CSI2PHY_REG_CTRL_LANE_ENABLE (Results 1 - 2 of 2) sorted by relevance
/device/soc/rockchip/common/vendor/drivers/phy/ |
H A D | phy-rockchip-csi2-dphy-hw.c | 171 CSI2PHY_REG_CTRL_LANE_ENABLE = 0,
enumerator 263 if ((index == CSI2PHY_REG_CTRL_LANE_ENABLE) || (index == CSI2PHY_CLK_LANE_ENABLE) ||
in write_csi2_dphy_reg() 264 (index != CSI2PHY_REG_CTRL_LANE_ENABLE && reg->offset != 0x0)) {
in write_csi2_dphy_reg() 284 if ((index == CSI2PHY_REG_CTRL_LANE_ENABLE) || (index == CSI2PHY_CLK_LANE_ENABLE) ||
in read_csi2_dphy_reg() 285 (index != CSI2PHY_REG_CTRL_LANE_ENABLE && reg->offset != 0x0)) {
in read_csi2_dphy_reg() 338 [CSI2PHY_REG_CTRL_LANE_ENABLE] = CSI2PHY_REG(CSI2_DPHY_CTRL_LANE_ENABLE),
372 [CSI2PHY_REG_CTRL_LANE_ENABLE] = CSI2PHY_REG(CSI2_DPHY_CTRL_LANE_ENABLE),
592 read_csi2_dphy_reg(hw, CSI2PHY_REG_CTRL_LANE_ENABLE, &pre_val);
in csi2_dphy_hw_stream_on() 611 write_csi2_dphy_reg(hw, CSI2PHY_REG_CTRL_LANE_ENABLE, val);
in csi2_dphy_hw_stream_on() 730 write_csi2_dphy_reg(hw, CSI2PHY_REG_CTRL_LANE_ENABLE, in csi2_dphy_hw_stream_off() [all...] |
/device/soc/rockchip/rk3588/kernel/drivers/phy/rockchip/ |
H A D | phy-rockchip-csi2-dphy-hw.c | 172 CSI2PHY_REG_CTRL_LANE_ENABLE = 0, enumerator 262 if ((index == CSI2PHY_REG_CTRL_LANE_ENABLE) || in write_csi2_dphy_reg() 264 (index != CSI2PHY_REG_CTRL_LANE_ENABLE && in write_csi2_dphy_reg() 286 if ((index == CSI2PHY_REG_CTRL_LANE_ENABLE) || in read_csi2_dphy_reg() 288 (index != CSI2PHY_REG_CTRL_LANE_ENABLE && in read_csi2_dphy_reg() 343 [CSI2PHY_REG_CTRL_LANE_ENABLE] = CSI2PHY_REG(CSI2_DPHY_CTRL_LANE_ENABLE), 377 [CSI2PHY_REG_CTRL_LANE_ENABLE] = CSI2PHY_REG(CSI2_DPHY_CTRL_LANE_ENABLE), 611 read_csi2_dphy_reg(hw, CSI2PHY_REG_CTRL_LANE_ENABLE, &pre_val); in csi2_dphy_hw_stream_on() 631 write_csi2_dphy_reg(hw, CSI2PHY_REG_CTRL_LANE_ENABLE, val); in csi2_dphy_hw_stream_on() 738 write_csi2_dphy_reg(hw, CSI2PHY_REG_CTRL_LANE_ENABLE, in csi2_dphy_hw_stream_off() [all...] |
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