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/third_party/ffmpeg/libavcodec/loongarch/
H A Dvc1dsp_loongarch.h37 #define FF_PUT_VC1_MSPEL_MC_LASX(hmode, vmode) \
38 void ff_put_vc1_mspel_mc ## hmode ## vmode ## _lasx(uint8_t *dst, \
41 void ff_put_vc1_mspel_mc ## hmode ## vmode ## _16_lasx(uint8_t *dst, \
57 #define FF_PUT_VC1_MSPEL_MC_V_LASX(vmode) \
58 void ff_put_vc1_mspel_mc0 ## vmode ## _16_lasx(uint8_t *dst, \
H A Dvc1dsp_lasx.c523 ptrdiff_t stride, int hmode, int vmode, in put_vc1_mspel_mc_h_v_lasx()
536 int shift = (shift_value[hmode] + shift_value[vmode]) >> 1; in put_vc1_mspel_mc_h_v_lasx()
538 const uint8_t *para_v = para_value[vmode - 1]; in put_vc1_mspel_mc_h_v_lasx()
670 #define PUT_VC1_MSPEL_MC_LASX(hmode, vmode) \
671 void ff_put_vc1_mspel_mc ## hmode ## vmode ## _lasx(uint8_t *dst, \
675 put_vc1_mspel_mc_h_v_lasx(dst, src, stride, hmode, vmode, rnd); \
677 void ff_put_vc1_mspel_mc ## hmode ## vmode ## _16_lasx(uint8_t *dst, \
681 put_vc1_mspel_mc_h_v_lasx(dst, src, stride, hmode, vmode, rnd); \
682 put_vc1_mspel_mc_h_v_lasx(dst + 8, src + 8, stride, hmode, vmode, rnd); \
684 put_vc1_mspel_mc_h_v_lasx(dst, src, stride, hmode, vmode, rn
522 put_vc1_mspel_mc_h_v_lasx(uint8_t *dst, const uint8_t *src, ptrdiff_t stride, int hmode, int vmode, int rnd) put_vc1_mspel_mc_h_v_lasx() argument
738 put_vc1_mspel_mc_v_lasx(uint8_t *dst, const uint8_t *src, ptrdiff_t stride, int vmode, int rnd) put_vc1_mspel_mc_v_lasx() argument
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/third_party/ffmpeg/libavcodec/x86/
H A Dvc1dsp_mmx.c340 int hmode, int vmode, int rnd)\
354 if (vmode) { /* Vertical filter to apply */\
357 int shift = (shift_value[hmode]+shift_value[vmode])>>1;\
362 vc1_put_shift_ver_16bits[vmode](tmp, src-1, stride, r, shift);\
368 vc1_put_shift_8bits[vmode](dst, src, stride, 1-rnd, stride);\
377 int stride, int hmode, int vmode, int rnd)\
379 OP ## vc1_mspel_mc(dst + 0, src + 0, stride, hmode, vmode, rnd); \
380 OP ## vc1_mspel_mc(dst + 8, src + 8, stride, hmode, vmode, rnd); \
382 OP ## vc1_mspel_mc(dst + 0, src + 0, stride, hmode, vmode, rnd); \
383 OP ## vc1_mspel_mc(dst + 8, src + 8, stride, hmode, vmode, rn
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/third_party/ffmpeg/libavcodec/mips/
H A Dvc1dsp_msa.c314 ptrdiff_t stride, int hmode, int vmode, in put_vc1_mspel_mc_h_v_msa()
325 int shift = (shift_value[hmode] + shift_value[vmode]) >> 1; in put_vc1_mspel_mc_h_v_msa()
329 cnst_para0 = __msa_fill_h(para_value[vmode - 1][0]); in put_vc1_mspel_mc_h_v_msa()
330 cnst_para1 = __msa_fill_h(para_value[vmode - 1][1]); in put_vc1_mspel_mc_h_v_msa()
331 cnst_para2 = __msa_fill_h(para_value[vmode - 1][2]); in put_vc1_mspel_mc_h_v_msa()
332 cnst_para3 = __msa_fill_h(para_value[vmode - 1][3]); in put_vc1_mspel_mc_h_v_msa()
433 #define PUT_VC1_MSPEL_MC_MSA(hmode, vmode) \
434 void ff_put_vc1_mspel_mc ## hmode ## vmode ## _msa(uint8_t *dst, \
438 put_vc1_mspel_mc_h_v_msa(dst, src, stride, hmode, vmode, rnd); \
440 void ff_put_vc1_mspel_mc ## hmode ## vmode ## _16_ms
313 put_vc1_mspel_mc_h_v_msa(uint8_t *dst, const uint8_t *src, ptrdiff_t stride, int hmode, int vmode, int rnd) put_vc1_mspel_mc_h_v_msa() argument
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H A Dvc1dsp_mmi.c2083 int hmode, int vmode, int rnd) \
2098 if (vmode) { /* Vertical filter to apply */ \
2101 int shift = (shift_value[hmode]+shift_value[vmode])>>1; \
2106 vc1_put_shift_ver_16bits[vmode](tmp, src-1, stride, r, shift); \
2112 vc1_put_shift_8bits[vmode](dst, src, stride, 1-rnd, stride); \
2121 int stride, int hmode, int vmode, int rnd)\
2123 OP ## vc1_mspel_mc(dst + 0, src + 0, stride, hmode, vmode, rnd); \
2124 OP ## vc1_mspel_mc(dst + 8, src + 8, stride, hmode, vmode, rnd); \
2126 OP ## vc1_mspel_mc(dst + 0, src + 0, stride, hmode, vmode, rnd); \
2127 OP ## vc1_mspel_mc(dst + 8, src + 8, stride, hmode, vmode, rn
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H A Dvc1dsp_mips.h198 #define FF_PUT_VC1_MSPEL_MC_MSA(hmode, vmode) \
199 void ff_put_vc1_mspel_mc ## hmode ## vmode ## _msa(uint8_t *dst, \
202 void ff_put_vc1_mspel_mc ## hmode ## vmode ## _16_msa(uint8_t *dst, \
/device/soc/rockchip/common/vendor/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi-qp.c1544 struct hdmi_vmode_qp *vmode = &hdmi->hdmi_data.video_mode; in dw_hdmi_qp_setup() local
1620 vmode->previous_pixelclock = vmode->mpixelclock; in dw_hdmi_qp_setup()
1621 vmode->mpixelclock = mode->crtc_clock * 1000; in dw_hdmi_qp_setup()
1623 vmode->mpixelclock *= 2; in dw_hdmi_qp_setup()
1625 dev_dbg(hdmi->dev, "final pixclk = %ld\n", vmode->mpixelclock); in dw_hdmi_qp_setup()
1626 vmode->previous_tmdsclock = vmode->mtmdsclock; in dw_hdmi_qp_setup()
1627 vmode->mtmdsclock = hdmi_get_tmdsclock(hdmi, vmode in dw_hdmi_qp_setup()
1869 struct hdmi_vmode_qp *vmode = &hdmi->hdmi_data.video_mode; dw_hdmi_connector_atomic_check() local
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/device/soc/rockchip/rk3588/kernel/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi-qp.c1386 struct hdmi_vmode_qp *vmode = &hdmi->hdmi_data.video_mode; in dw_hdmi_qp_setup() local
1465 vmode->previous_pixelclock = vmode->mpixelclock; in dw_hdmi_qp_setup()
1466 vmode->mpixelclock = mode->crtc_clock * 1000; in dw_hdmi_qp_setup()
1468 vmode->mpixelclock *= 2; in dw_hdmi_qp_setup()
1469 dev_dbg(hdmi->dev, "final pixclk = %ld\n", vmode->mpixelclock); in dw_hdmi_qp_setup()
1470 vmode->previous_tmdsclock = vmode->mtmdsclock; in dw_hdmi_qp_setup()
1471 vmode->mtmdsclock = hdmi_get_tmdsclock(hdmi, vmode in dw_hdmi_qp_setup()
1739 struct hdmi_vmode_qp *vmode = &hdmi->hdmi_data.video_mode; dw_hdmi_connector_atomic_check() local
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/third_party/ffmpeg/libavcodec/
H A Dvc1dsp.c598 int vmode, \
603 if (vmode) { /* Horizontal filter to apply */ \
608 int shift = (shift_value[hmode] + shift_value[vmode]) >> 1; \
616 tptr[i] = (vc1_mspel_ver_filter_16bits(src + i, stride, vmode) + r) >> shift; \
636 OP(dst[i], vc1_mspel_filter(src + i, stride, vmode, r)); \
656 int vmode, \
661 if (vmode) { /* Horizontal filter to apply */ \
666 int shift = (shift_value[hmode] + shift_value[vmode]) >> 1; \
674 tptr[i] = (vc1_mspel_ver_filter_16bits(src + i, stride, vmode) + r) >> shift; \
694 OP(dst[i], vc1_mspel_filter(src + i, stride, vmode,
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/device/soc/rockchip/common/sdk_linux/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi.c2098 struct hdmi_vmode *vmode = &hdmi->hdmi_data.video_mode; in hdmi_tx_hdcp_config() local
2107 vmode->mdataenablepolarity ? HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_HIGH : HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_LOW; in hdmi_tx_hdcp_config()
2396 struct hdmi_vmode *vmode = &hdmi->hdmi_data.video_mode; in hdmi_av_composer() local
2400 vmode->previous_pixelclock = vmode->mpixelclock; in hdmi_av_composer()
2401 vmode->mpixelclock = mode->crtc_clock * 0x3e8; in hdmi_av_composer()
2403 vmode->mpixelclock *= 0x2; in hdmi_av_composer()
2405 dev_dbg(hdmi->dev, "final pixclk = %d\n", vmode->mpixelclock); in hdmi_av_composer()
2407 vmode->previous_tmdsclock = vmode in hdmi_av_composer()
3065 struct hdmi_vmode *vmode = &hdmi->hdmi_data.video_mode; dw_hdmi_connector_atomic_check() local
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