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/kernel/linux/linux-6.6/drivers/net/dsa/mv88e6xxx/
H A Dport.h20 #define MV88E6XXX_PORT_STS_HD_FLOW 0x2000
76 #define MV88E6390_PORT_MAC_CTL_FORCE_SPEED 0x2000
161 #define MV88E6XXX_PORT_CTL0_EGRESS_MODE_TAGGED 0x2000
205 #define MV88E6XXX_PORT_CTL2_SA_PRIO_OVERRIDE 0x2000
210 #define MV88E6XXX_PORT_CTL2_JUMBO_MODE_10240 0x2000
234 #define MV88E6XXX_PORT_ASSOC_VECTOR_LOCKED_PORT 0x2000
264 #define MV88E6393X_PORT_POLICY_MGMT_CTL_PTR_01C280000000XLO 0x2000
303 #define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_YELLOW_PCP 0x2000
327 #define MV88E6341_PORT_RESERVED_1A_SGMII_AN 0x2000
H A Dserdes.h62 #define MV88E6390_SGMII_BMCR (0x2000 + MII_BMCR)
63 #define MV88E6390_SGMII_BMSR (0x2000 + MII_BMSR)
64 #define MV88E6390_SGMII_ADVERTISE (0x2000 + MII_ADVERTISE)
65 #define MV88E6390_SGMII_LPA (0x2000 + MII_LPA)
/kernel/linux/linux-5.10/include/linux/mfd/arizona/
H A Dregisters.h2353 #define ARIZONA_ACCDET_SRC 0x2000 /* ACCDET_SRC */
2354 #define ARIZONA_ACCDET_SRC_MASK 0x2000 /* ACCDET_SRC */
2600 #define ARIZONA_IN1L_SRC_SE_MASK 0x2000 /* IN1L_SRC - [13] */
2638 #define ARIZONA_IN1R_SRC_SE_MASK 0x2000 /* IN1R_SRC - [13] */
2688 #define ARIZONA_IN2L_SRC_SE_MASK 0x2000 /* IN2L_SRC - [13] */
2986 #define ARIZONA_OUT1_OSR 0x2000 /* OUT1_OSR */
2987 #define ARIZONA_OUT1_OSR_MASK 0x2000 /* OUT1_OSR */
3076 #define ARIZONA_OUT2_OSR 0x2000 /* OUT2_OSR */
3077 #define ARIZONA_OUT2_OSR_MASK 0x2000 /* OUT2_OSR */
3166 #define ARIZONA_OUT3_OSR 0x2000 /* OUT3_OS
[all...]
/kernel/linux/linux-6.6/include/linux/mfd/arizona/
H A Dregisters.h2353 #define ARIZONA_ACCDET_SRC 0x2000 /* ACCDET_SRC */
2354 #define ARIZONA_ACCDET_SRC_MASK 0x2000 /* ACCDET_SRC */
2600 #define ARIZONA_IN1L_SRC_SE_MASK 0x2000 /* IN1L_SRC - [13] */
2638 #define ARIZONA_IN1R_SRC_SE_MASK 0x2000 /* IN1R_SRC - [13] */
2688 #define ARIZONA_IN2L_SRC_SE_MASK 0x2000 /* IN2L_SRC - [13] */
2986 #define ARIZONA_OUT1_OSR 0x2000 /* OUT1_OSR */
2987 #define ARIZONA_OUT1_OSR_MASK 0x2000 /* OUT1_OSR */
3076 #define ARIZONA_OUT2_OSR 0x2000 /* OUT2_OSR */
3077 #define ARIZONA_OUT2_OSR_MASK 0x2000 /* OUT2_OSR */
3166 #define ARIZONA_OUT3_OSR 0x2000 /* OUT3_OS
[all...]
/kernel/linux/linux-5.10/arch/m68k/kernel/
H A Dsun3-head.S27 swapper_pg_dir: .skip 0x2000
28 pg0: .skip 0x2000
29 kernel_pmd_table: .skip 0x2000
/kernel/linux/linux-6.6/arch/m68k/kernel/
H A Dsun3-head.S27 swapper_pg_dir: .skip 0x2000
28 pg0: .skip 0x2000
29 kernel_pmd_table: .skip 0x2000
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dheadnv04.c30 nvkm_wr32(device, 0x600140 + (head->id * 0x2000) , 0x00000000); in nv04_head_vblank_put()
37 nvkm_wr32(device, 0x600140 + (head->id * 0x2000) , 0x00000001); in nv04_head_vblank_get()
44 u32 data = nvkm_rd32(device, 0x600868 + (head->id * 0x2000)); in nv04_head_rgpos()
/kernel/linux/linux-5.10/arch/m68k/include/asm/
H A Dtraps.h101 #define PS_S (0x2000)
109 #define RC (0x2000)
121 #define MMU_S (0x2000) /* supervisor violation */
132 #define CT_040 (0x2000)
H A DMC68VZ328.h104 #define CSB_ROP 0x2000 /* Readonly if protected */
117 #define CSC_ROP 0x2000 /* Readonly if protected */
132 #define CSD_ROP 0x2000 /* Readonly if protected */
218 #define ICR_POL3 0x2000 /* Polarity Control for IRQ3 */
785 #define USTCNT_TXEN 0x2000 /* Transmitter Enable */
813 #define UBAUD_UCLKDIR 0x2000 /* UCLK Direction */
831 #define URX_DATA_READY 0x2000 /* Data Ready (FIFO not empty) */
851 #define UTX_TX_AVAIL 0x2000 /* Transmit FIFO has a slot available */
874 #define UMISC_FORCE_PERR 0x2000 /* Force Parity Error */
1181 #define RTCISR_SAM5 0x2000 /* 12
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H A DMC68EZ328.h102 #define CSB_ROP 0x2000 /* Readonly if protected */
115 #define CSC_ROP 0x2000 /* Readonly if protected */
130 #define CSD_ROP 0x2000 /* Readonly if protected */
216 #define ICR_POL3 0x2000 /* Polarity Control for IRQ3 */
692 #define USTCNT_TXEN 0x2000 /* Transmitter Enable */
720 #define UBAUD_UCLKDIR 0x2000 /* UCLK Direction */
738 #define URX_DATA_READY 0x2000 /* Data Ready (FIFO not empty) */
758 #define UTX_TX_AVAIL 0x2000 /* Transmit FIFO has a slot available */
781 #define UMISC_FORCE_PERR 0x2000 /* Force Parity Error */
1086 #define RTCISR_SAM5 0x2000 /* 12
[all...]
/kernel/linux/linux-6.6/arch/m68k/include/asm/
H A Dtraps.h101 #define PS_S (0x2000)
109 #define RC (0x2000)
121 #define MMU_S (0x2000) /* supervisor violation */
132 #define CT_040 (0x2000)
H A DMC68VZ328.h104 #define CSB_ROP 0x2000 /* Readonly if protected */
117 #define CSC_ROP 0x2000 /* Readonly if protected */
132 #define CSD_ROP 0x2000 /* Readonly if protected */
218 #define ICR_POL3 0x2000 /* Polarity Control for IRQ3 */
785 #define USTCNT_TXEN 0x2000 /* Transmitter Enable */
813 #define UBAUD_UCLKDIR 0x2000 /* UCLK Direction */
831 #define URX_DATA_READY 0x2000 /* Data Ready (FIFO not empty) */
851 #define UTX_TX_AVAIL 0x2000 /* Transmit FIFO has a slot available */
874 #define UMISC_FORCE_PERR 0x2000 /* Force Parity Error */
1181 #define RTCISR_SAM5 0x2000 /* 12
[all...]
H A DMC68EZ328.h102 #define CSB_ROP 0x2000 /* Readonly if protected */
115 #define CSC_ROP 0x2000 /* Readonly if protected */
130 #define CSD_ROP 0x2000 /* Readonly if protected */
216 #define ICR_POL3 0x2000 /* Polarity Control for IRQ3 */
692 #define USTCNT_TXEN 0x2000 /* Transmitter Enable */
720 #define UBAUD_UCLKDIR 0x2000 /* UCLK Direction */
738 #define URX_DATA_READY 0x2000 /* Data Ready (FIFO not empty) */
758 #define UTX_TX_AVAIL 0x2000 /* Transmit FIFO has a slot available */
781 #define UMISC_FORCE_PERR 0x2000 /* Force Parity Error */
1086 #define RTCISR_SAM5 0x2000 /* 12
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/kernel/linux/linux-5.10/drivers/misc/habanalabs/include/goya/asic_reg/
H A Dpsoc_global_conf_masks.h202 #define PSOC_GLOBAL_CONF_PERIPH_INTR_EMMC_WAKEUP_MASK 0x2000
296 #define PSOC_GLOBAL_CONF_PRSTN_RST_CFG_IC_IF_MASK 0x2000
322 #define PSOC_GLOBAL_CONF_SW_ALL_RST_CFG_IC_IF_MASK 0x2000
348 #define PSOC_GLOBAL_CONF_WD_RST_CFG_IC_IF_MASK 0x2000
374 #define PSOC_GLOBAL_CONF_MNL_RST_CFG_IC_IF_MASK 0x2000
400 #define PSOC_GLOBAL_CONF_UNIT_RST_N_IC_IF_MASK 0x2000
/kernel/linux/linux-6.6/drivers/accel/habanalabs/include/goya/asic_reg/
H A Dpsoc_global_conf_masks.h202 #define PSOC_GLOBAL_CONF_PERIPH_INTR_EMMC_WAKEUP_MASK 0x2000
296 #define PSOC_GLOBAL_CONF_PRSTN_RST_CFG_IC_IF_MASK 0x2000
322 #define PSOC_GLOBAL_CONF_SW_ALL_RST_CFG_IC_IF_MASK 0x2000
348 #define PSOC_GLOBAL_CONF_WD_RST_CFG_IC_IF_MASK 0x2000
374 #define PSOC_GLOBAL_CONF_MNL_RST_CFG_IC_IF_MASK 0x2000
400 #define PSOC_GLOBAL_CONF_UNIT_RST_N_IC_IF_MASK 0x2000
/third_party/ltp/include/lapi/
H A Dtimex.h19 # define ADJ_NANO 0x2000
23 # define STA_NANO 0x2000
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dgk104.c688 u32 mask = nvkm_rd32(device, 0x04010c + (unit * 0x2000)); in gk104_fifo_intr_pbdma_0()
689 u32 stat = nvkm_rd32(device, 0x040108 + (unit * 0x2000)) & mask; in gk104_fifo_intr_pbdma_0()
690 u32 addr = nvkm_rd32(device, 0x0400c0 + (unit * 0x2000)); in gk104_fifo_intr_pbdma_0()
691 u32 data = nvkm_rd32(device, 0x0400c4 + (unit * 0x2000)); in gk104_fifo_intr_pbdma_0()
692 u32 chid = nvkm_rd32(device, 0x040120 + (unit * 0x2000)) & 0xfff; in gk104_fifo_intr_pbdma_0()
707 nvkm_wr32(device, 0x0400c0 + (unit * 0x2000), 0x80600008); in gk104_fifo_intr_pbdma_0()
720 nvkm_wr32(device, 0x040108 + (unit * 0x2000), stat); in gk104_fifo_intr_pbdma_0()
737 u32 mask = nvkm_rd32(device, 0x04014c + (unit * 0x2000)); in gk104_fifo_intr_pbdma_1()
738 u32 stat = nvkm_rd32(device, 0x040148 + (unit * 0x2000)) & mask; in gk104_fifo_intr_pbdma_1()
739 u32 chid = nvkm_rd32(device, 0x040120 + (unit * 0x2000)) in gk104_fifo_intr_pbdma_1()
[all...]
/kernel/linux/linux-5.10/drivers/net/dsa/mv88e6xxx/
H A Dglobal2.h20 #define MV88E6XXX_G2_INT_SRC_DUPLEX_MISMATCH 0x2000
32 #define MV88E6XXX_G2_INT_MASK_DUPLEX_MISMATCH 0x2000
51 #define MV88E6XXX_G2_SWITCH_MGMT_FLOW_CTL_MSG 0x2000
79 #define MV88E6352_G2_IRL_CMD_OP_INIT_RES 0x2000
84 #define MV88E6390_G2_IRL_CMD_OP_INIT_ALL 0x2000
188 #define MV88E6390_G2_SMI_PHY_CMD_FUNC_EXTERNAL 0x2000
261 #define MV88E6352_G2_NOEGR_POLICY 0x2000
262 #define MV88E6390_G2_LAG_ID_4 0x2000
H A Dport.h20 #define MV88E6XXX_PORT_STS_HD_FLOW 0x2000
68 #define MV88E6390_PORT_MAC_CTL_FORCE_SPEED 0x2000
141 #define MV88E6XXX_PORT_CTL0_EGRESS_MODE_TAGGED 0x2000
185 #define MV88E6XXX_PORT_CTL2_SA_PRIO_OVERRIDE 0x2000
190 #define MV88E6XXX_PORT_CTL2_JUMBO_MODE_10240 0x2000
214 #define MV88E6XXX_PORT_ASSOC_VECTOR_LOCKED_PORT 0x2000
261 #define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_YELLOW_PCP 0x2000
285 #define MV88E6341_PORT_RESERVED_1A_SGMII_AN 0x2000
/kernel/linux/linux-5.10/include/linux/usb/
H A Dr8a66597.h142 #define XCKE 0x2000 /* b13: External clock enable */
202 #define BURST 0x2000 /* b13: Burst mode */
217 #define DCLRM 0x2000 /* b13: DMA buffer clear mode */
231 #define FRDY 0x2000 /* b13: FIFO ready */
237 #define SOFE 0x2000 /* b13: Frame update interrupt */
302 #define SOFR 0x2000 /* b13: SOF frame update interrupt */
355 #define CSCLR 0x2000 /* b13: complete-split status clear */
401 #define CSCLR 0x2000 /* b13: complete-split status clear */
/kernel/linux/linux-6.6/include/linux/usb/
H A Dr8a66597.h128 #define XCKE 0x2000 /* b13: External clock enable */
188 #define BURST 0x2000 /* b13: Burst mode */
203 #define DCLRM 0x2000 /* b13: DMA buffer clear mode */
217 #define FRDY 0x2000 /* b13: FIFO ready */
223 #define SOFE 0x2000 /* b13: Frame update interrupt */
288 #define SOFR 0x2000 /* b13: SOF frame update interrupt */
341 #define CSCLR 0x2000 /* b13: complete-split status clear */
387 #define CSCLR 0x2000 /* b13: complete-split status clear */
/kernel/linux/linux-6.6/include/uapi/linux/
H A Dmdio.h111 #define MDIO_AN_CTRL1_XNP 0x2000 /* Enable extended next page */
202 #define MDIO_PMA_STAT2_TXFLTABLE 0x2000 /* Transmit fault ability */
207 #define MDIO_PCS_STAT2_TXFLTABLE 0x2000 /* Transmit fault ability */
310 #define MDIO_AN_10GBT_STAT_LOCOK 0x2000 /* Local OK */
330 #define MDIO_PMA_10T1L_STAT_LB_ABLE 0x2000 /* PHY has loopback ability */
355 #define MDIO_AN_T1_ADV_H_10L_TX_HI 0x2000 /* 10BASE-T1L High Level Transmit Ability */
371 #define MDIO_AN_T1_LP_H_10L_TX_HI 0x2000 /* 10BASE-T1L High Level LP Transmit Ability */
416 #define MDIO_EEE_100GR_DS 0x2000 /* 100G R deep sleep */
/kernel/linux/linux-5.10/sound/soc/codecs/
H A Dwm2200.h716 #define WM2200_EPD_OUTP_LP_ENA 0x2000 /* EPD_OUTP_LP_ENA */
717 #define WM2200_EPD_OUTP_LP_ENA_MASK 0x2000 /* EPD_OUTP_LP_ENA */
744 #define WM2200_EPD_OUTP_RP_ENA 0x2000 /* EPD_OUTP_RP_ENA */
745 #define WM2200_EPD_OUTP_RP_ENA_MASK 0x2000 /* EPD_OUTP_RP_ENA */
796 #define WM2200_IN1_OSR 0x2000 /* IN1_OSR */
797 #define WM2200_IN1_OSR_MASK 0x2000 /* IN1_OSR */
820 #define WM2200_IN2_OSR 0x2000 /* IN2_OSR */
821 #define WM2200_IN2_OSR_MASK 0x2000 /* IN2_OSR */
844 #define WM2200_IN3_OSR 0x2000 /* IN3_OSR */
845 #define WM2200_IN3_OSR_MASK 0x2000 /* IN3_OS
[all...]
/kernel/linux/linux-6.6/sound/soc/codecs/
H A Dwm2200.h716 #define WM2200_EPD_OUTP_LP_ENA 0x2000 /* EPD_OUTP_LP_ENA */
717 #define WM2200_EPD_OUTP_LP_ENA_MASK 0x2000 /* EPD_OUTP_LP_ENA */
744 #define WM2200_EPD_OUTP_RP_ENA 0x2000 /* EPD_OUTP_RP_ENA */
745 #define WM2200_EPD_OUTP_RP_ENA_MASK 0x2000 /* EPD_OUTP_RP_ENA */
796 #define WM2200_IN1_OSR 0x2000 /* IN1_OSR */
797 #define WM2200_IN1_OSR_MASK 0x2000 /* IN1_OSR */
820 #define WM2200_IN2_OSR 0x2000 /* IN2_OSR */
821 #define WM2200_IN2_OSR_MASK 0x2000 /* IN2_OSR */
844 #define WM2200_IN3_OSR 0x2000 /* IN3_OSR */
845 #define WM2200_IN3_OSR_MASK 0x2000 /* IN3_OS
[all...]
/third_party/vixl/test/aarch64/traces/
H A Dsim-uqshl-4h-2opimm-trace-aarch64.h131 0xffff, 0xffff, 0x0000, 0x2000,
146 0xffff, 0x0000, 0x1000, 0x2000,
147 0xffff, 0x0000, 0x2000, 0x4000,
159 0x0000, 0x0200, 0x0400, 0x2000,
162 0x0000, 0x1000, 0x2000, 0xffff,
163 0x0000, 0x2000, 0x4000, 0xffff,
175 0x0200, 0x0400, 0x2000, 0xfa00,
178 0x1000, 0x2000, 0xffff, 0xffff,
179 0x2000, 0x4000, 0xffff, 0xffff,
191 0x0400, 0x2000,
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12345678910>>...153