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/kernel/linux/linux-6.6/arch/arm/kernel/
H A Dhead.S209 add r3, r4, #0x1000 @ first PMD table address
221 add r3, r3, #0x1000 @ next PMD table
225 add r4, r4, #0x1000 @ point to the PMD tables
370 sub r4, r4, #0x1000 @ point to the PGD table
/kernel/linux/linux-5.10/drivers/scsi/aic7xxx/
H A Daic7xxx.h331 AHC_INITIATORROLE = 0x1000, /*
542 SCB_TRANSMISSION_ERROR = 0x1000,/*
825 #define CFSEHIGHTERM 0x1000 /* Ultra2 secondary high term */
1262 #define AHC_SHOW_MASKED_ERRORS 0x1000
/kernel/linux/linux-5.10/drivers/soc/ixp4xx/
H A Dixp4xx-npe.c30 #define NPE_46X_DATA_SIZE 0x1000
31 #define NPE_A_42X_INSTR_SIZE 0x1000
33 #define NPE_46X_INSTR_SIZE 0x1000
34 #define REGS_SIZE 0x1000
/kernel/linux/linux-5.10/sound/pci/au88x0/
H A Dau88x0_pcm.c36 .period_bytes_max = 0x1000,
57 .period_bytes_max = 0x1000,
79 .period_bytes_max = 0x1000,
97 .period_bytes_max = 0x1000,
/kernel/linux/linux-5.10/drivers/pinctrl/
H A Dpinctrl-u300.c48 #define U300_SYSCON_PMC1LR_PDI_EGG 0x1000
88 #define U300_SYSCON_PMC1HR_APP_GPIO_2_NFIF 0x1000
137 #define U300_SYSCON_PMC2R_APP_MISC_3_EMIF_SDRAM 0x1000
150 #define U300_SYSCON_PMC3R_APP_MISC_10_SPI 0x1000
/kernel/linux/linux-5.10/drivers/staging/comedi/drivers/
H A Ds626.h81 #define S626_IRQ_COINT2A 0x1000 /* counter 2A overflow interrupt mask */
185 #define S626_MC1_ERPS0 0x1000 /* Enab/disable RPS task 0. */
197 #define S626_MC2_RPSSIG1 0x1000 /* RPS signal 1 (DAC RPS busy). */
292 #define S626_MISC1_EDCAP 0x1000 /*
/kernel/linux/linux-6.6/drivers/soc/ixp4xx/
H A Dixp4xx-npe.c33 #define NPE_46X_DATA_SIZE 0x1000
34 #define NPE_A_42X_INSTR_SIZE 0x1000
36 #define NPE_46X_INSTR_SIZE 0x1000
37 #define REGS_SIZE 0x1000
/kernel/linux/linux-6.6/drivers/comedi/drivers/
H A Ds626.h81 #define S626_IRQ_COINT2A 0x1000 /* counter 2A overflow interrupt mask */
185 #define S626_MC1_ERPS0 0x1000 /* Enab/disable RPS task 0. */
197 #define S626_MC2_RPSSIG1 0x1000 /* RPS signal 1 (DAC RPS busy). */
292 #define S626_MISC1_EDCAP 0x1000 /*
/kernel/linux/linux-6.6/sound/pci/au88x0/
H A Dau88x0_pcm.c36 .period_bytes_max = 0x1000,
57 .period_bytes_max = 0x1000,
79 .period_bytes_max = 0x1000,
97 .period_bytes_max = 0x1000,
/kernel/linux/linux-6.6/drivers/scsi/aic7xxx/
H A Daic7xxx.h331 AHC_INITIATORROLE = 0x1000, /*
542 SCB_TRANSMISSION_ERROR = 0x1000,/*
825 #define CFSEHIGHTERM 0x1000 /* Ultra2 secondary high term */
1256 #define AHC_SHOW_MASKED_ERRORS 0x1000
/third_party/vixl/test/aarch64/traces/
H A Dsim-scvtf-h-2opimm-trace-aarch64.h185 0x1000,
203 0x1000,
223 0x1000,
593 0x1000,
H A Dsim-ucvtf-h-2opimm-trace-aarch64.h185 0x1000,
203 0x1000,
223 0x1000,
593 0x1000,
H A Dsim-fcvtzs-8h-2opimm-trace-aarch64.h102 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0ffe, 0x1000,
119 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0ffe, 0x1000, 0x1004,
136 0x0000, 0x0000, 0x0000, 0x0000, 0x0ffe, 0x1000, 0x1004, 0x1ffc,
152 0x0000, 0x0000, 0x0000, 0x07ff, 0x0800, 0x0802, 0x0ffe, 0x1000,
153 0x0000, 0x0000, 0x0000, 0x0ffe, 0x1000, 0x1004, 0x1ffc, 0x2000,
169 0x0000, 0x0000, 0x07ff, 0x0800, 0x0802, 0x0ffe, 0x1000, 0x1004,
170 0x0000, 0x0000, 0x0ffe, 0x1000, 0x1004, 0x1ffc, 0x2000, 0x2008,
186 0x0000, 0x07ff, 0x0800, 0x0802, 0x0ffe, 0x1000, 0x1004, 0x1800,
187 0x0000, 0x0ffe, 0x1000, 0x1004, 0x1ffc, 0x2000, 0x2008, 0x3000,
203 0x07ff, 0x0800, 0x0802, 0x0ffe, 0x1000,
[all...]
/kernel/linux/linux-5.10/drivers/net/ethernet/marvell/mvpp2/
H A Dmvpp2.h65 #define MVPP2_PRS_INIT_LOOKUP_REG 0x1000
577 #define MVPP22_GMAC_BASE(port) (0x7000 + (port) * 0x1000 + 0xe00)
586 #define MVPP22_MPCS_BASE(port) (0x7000 + (port) * 0x1000)
597 #define MVPP22_XPCS_BASE(port) (0x7400 + (port) * 0x1000)
604 #define MVPP22_PTP_BASE(port) (0x7800 + (port * 0x1000))
734 #define MVPP2_RX_FIFO_PORT_DATA_SIZE_4KB 0x1000
875 #define MVPP21_MIB_COUNTERS_OFFSET 0x1000
/kernel/linux/linux-5.10/drivers/net/wireless/ath/ath9k/
H A Deeprom_4k.c333 regChainOffset = i * 0x1000; in ath9k_hw_set_4k_power_cal_table()
727 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000, in ath9k_hw_4k_set_gain()
730 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000, in ath9k_hw_4k_set_gain()
732 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000, in ath9k_hw_4k_set_gain()
735 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000, in ath9k_hw_4k_set_gain()
745 REG_RMW_FIELD(ah, AR_PHY_RXGAIN + 0x1000, in ath9k_hw_4k_set_gain()
747 REG_RMW_FIELD(ah, AR_PHY_RXGAIN + 0x1000, in ath9k_hw_4k_set_gain()
/kernel/linux/linux-6.6/include/uapi/linux/
H A Dpci_regs.h66 #define PCI_STATUS_REC_TARGET_ABORT 0x1000 /* Master ack of " */
248 #define PCI_PM_CAP_PME_D1 0x1000 /* PME# from D1 */
460 #define PCI_X_SSTATUS_V1 0x1000 /* Mode 2, not Mode 1 */
519 #define PCI_EXP_DEVCTL_READRQ_256B 0x1000 /* 256 Bytes */
580 #define PCI_EXP_LNKSTA_SLC 0x1000 /* Slot Clock Configuration */
618 #define PCI_EXP_SLTCTL_DLLSCE 0x1000 /* Data Link Layer State Changed Enable */
1035 #define PCI_EXP_DPC_CAP_DL_ACTIVE 0x1000 /* ERR_COR signal on DL_Active supported */
/kernel/linux/linux-6.6/drivers/net/wireless/ath/ath9k/
H A Deeprom_4k.c333 regChainOffset = i * 0x1000; in ath9k_hw_set_4k_power_cal_table()
727 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000, in ath9k_hw_4k_set_gain()
730 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000, in ath9k_hw_4k_set_gain()
732 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000, in ath9k_hw_4k_set_gain()
735 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000, in ath9k_hw_4k_set_gain()
745 REG_RMW_FIELD(ah, AR_PHY_RXGAIN + 0x1000, in ath9k_hw_4k_set_gain()
747 REG_RMW_FIELD(ah, AR_PHY_RXGAIN + 0x1000, in ath9k_hw_4k_set_gain()
/kernel/linux/linux-5.10/drivers/clk/
H A Dclk-u300.c59 #define U300_SYSCON_RRR_INTCON_RESET_EN (0x1000)
96 #define U300_SYSCON_CERR_ISP_CLK_EN (0x1000)
164 #define U300_SYSCON_CFRR_ISP_CLK_FORCE_EN (0x1000)
311 #define U300_SYSCON_C0OAR_APP_SEMI_CLK (0x1000)
329 #define U300_SYSCON_C1OAR_MSPRO_CLK (0x1000)
/kernel/linux/linux-5.10/drivers/net/ethernet/intel/igb/
H A De1000_defines.h654 #define MII_CR_AUTO_NEG_EN 0x1000 /* Auto Neg Enable */
684 #define CR_1000T_MS_ENABLE 0x1000 /* 1=Master/Slave manual config value */
688 #define SR_1000T_REMOTE_RX_STATUS 0x1000 /* Remote receiver OK */
727 #define E1000_I210_FLASH_SECTOR_SIZE 0x1000 /* 4KB FLASH sector unit size */
965 #define I347AT4_PSCR_DOWNSHIFT_2X 0x1000
/kernel/linux/linux-5.10/drivers/media/dvb-frontends/
H A Ds5h1411.c108 { S5H1411_I2C_TOP_ADDR, 0xdc, 0x1000, },
429 val |= 0x1000; in s5h1411_set_mpeg_timing()
451 val = s5h1411_readreg(state, S5H1411_I2C_TOP_ADDR, 0x24) & ~0x1000; in s5h1411_set_spectralinversion()
454 val |= 0x1000; /* Inverted */ in s5h1411_set_spectralinversion()
672 if (reg & 0x1000) /* FEC Lock */ in s5h1411_read_status()
H A Ddib0070.c275 { 0xffffffff, 0, 0, 8, 1, 2, 1, 0x8000 | 0x1000 }, /* SBAND */
279 { 115000, 1, 0, 7, 24, 2, 1, 0x8000 | 0x1000 }, /* FM below 92MHz cannot be tuned */
280 { 179500, 1, 0, 3, 16, 2, 1, 0x8000 | 0x1000 }, /* VHF */
281 { 189999, 1, 1, 3, 16, 2, 1, 0x8000 | 0x1000 },
282 { 250000, 1, 0, 6, 12, 2, 1, 0x8000 | 0x1000 },
/kernel/linux/linux-6.6/drivers/media/dvb-frontends/
H A Ddib0070.c275 { 0xffffffff, 0, 0, 8, 1, 2, 1, 0x8000 | 0x1000 }, /* SBAND */
279 { 115000, 1, 0, 7, 24, 2, 1, 0x8000 | 0x1000 }, /* FM below 92MHz cannot be tuned */
280 { 179500, 1, 0, 3, 16, 2, 1, 0x8000 | 0x1000 }, /* VHF */
281 { 189999, 1, 1, 3, 16, 2, 1, 0x8000 | 0x1000 },
282 { 250000, 1, 0, 6, 12, 2, 1, 0x8000 | 0x1000 },
H A Ds5h1411.c108 { S5H1411_I2C_TOP_ADDR, 0xdc, 0x1000, },
429 val |= 0x1000; in s5h1411_set_mpeg_timing()
451 val = s5h1411_readreg(state, S5H1411_I2C_TOP_ADDR, 0x24) & ~0x1000; in s5h1411_set_spectralinversion()
454 val |= 0x1000; /* Inverted */ in s5h1411_set_spectralinversion()
672 if (reg & 0x1000) /* FEC Lock */ in s5h1411_read_status()
/kernel/linux/linux-6.6/drivers/net/ethernet/intel/igb/
H A De1000_defines.h654 #define MII_CR_AUTO_NEG_EN 0x1000 /* Auto Neg Enable */
684 #define CR_1000T_MS_ENABLE 0x1000 /* 1=Master/Slave manual config value */
688 #define SR_1000T_REMOTE_RX_STATUS 0x1000 /* Remote receiver OK */
727 #define E1000_I210_FLASH_SECTOR_SIZE 0x1000 /* 4KB FLASH sector unit size */
965 #define I347AT4_PSCR_DOWNSHIFT_2X 0x1000
/kernel/linux/linux-6.6/drivers/pinctrl/qcom/
H A Dpinctrl-mdm9607.c224 .ctl_reg = 0x1000 * id, \
225 .io_reg = 0x4 + 0x1000 * id, \
226 .intr_cfg_reg = 0x8 + 0x1000 * id, \
227 .intr_status_reg = 0xc + 0x1000 * id, \
228 .intr_target_reg = 0x8 + 0x1000 * id, \

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