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/kernel/linux/linux-5.10/include/linux/mfd/wm831x/
H A Dirq.h89 #define WM831X_ON_PIN_INT 0x1000 /* ON_PIN_INT */
90 #define WM831X_ON_PIN_INT_MASK 0x1000 /* ON_PIN_INT */
157 #define WM831X_ON_PIN_EINT 0x1000 /* ON_PIN_EINT */
158 #define WM831X_ON_PIN_EINT_MASK 0x1000 /* ON_PIN_EINT */
221 #define WM831X_CHG_OV_EINT 0x1000 /* CHG_OV_EINT */
222 #define WM831X_CHG_OV_EINT_MASK 0x1000 /* CHG_OV_EINT */
357 #define WM831X_GP13_EINT 0x1000 /* GP13_EINT */
358 #define WM831X_GP13_EINT_MASK 0x1000 /* GP13_EINT */
437 #define WM831X_IM_ON_PIN_INT 0x1000 /* IM_ON_PIN_INT */
438 #define WM831X_IM_ON_PIN_INT_MASK 0x1000 /* IM_ON_PIN_IN
[all...]
/kernel/linux/linux-6.6/include/linux/mfd/wm831x/
H A Dirq.h89 #define WM831X_ON_PIN_INT 0x1000 /* ON_PIN_INT */
90 #define WM831X_ON_PIN_INT_MASK 0x1000 /* ON_PIN_INT */
157 #define WM831X_ON_PIN_EINT 0x1000 /* ON_PIN_EINT */
158 #define WM831X_ON_PIN_EINT_MASK 0x1000 /* ON_PIN_EINT */
221 #define WM831X_CHG_OV_EINT 0x1000 /* CHG_OV_EINT */
222 #define WM831X_CHG_OV_EINT_MASK 0x1000 /* CHG_OV_EINT */
357 #define WM831X_GP13_EINT 0x1000 /* GP13_EINT */
358 #define WM831X_GP13_EINT_MASK 0x1000 /* GP13_EINT */
437 #define WM831X_IM_ON_PIN_INT 0x1000 /* IM_ON_PIN_INT */
438 #define WM831X_IM_ON_PIN_INT_MASK 0x1000 /* IM_ON_PIN_IN
[all...]
/kernel/linux/linux-5.10/drivers/net/ethernet/cirrus/
H A Dcs89x0.h138 #define RX_CRC_ERROR_ENBL 0x1000
149 #define RX_BAD_CRC_ACCEPT 0x1000
173 #define TX_NO_CRC 0x1000
183 #define TX_COL_COUNT_OVRFLOW_ENBL 0x1000
193 #define NO_AUTO_POLARITY 0x1000
202 #define HCB0_ENBL 0x1000
211 #define IO_CHANNEL_READY_ON 0x1000
230 #define RX_CRC_ERROR 0x1000
253 #define TX_COL_OVRFLW 0x1000
261 #define POLARITY_OK 0x1000
[all...]
/kernel/linux/linux-6.6/drivers/net/ethernet/cirrus/
H A Dcs89x0.h138 #define RX_CRC_ERROR_ENBL 0x1000
149 #define RX_BAD_CRC_ACCEPT 0x1000
173 #define TX_NO_CRC 0x1000
183 #define TX_COL_COUNT_OVRFLOW_ENBL 0x1000
193 #define NO_AUTO_POLARITY 0x1000
202 #define HCB0_ENBL 0x1000
211 #define IO_CHANNEL_READY_ON 0x1000
230 #define RX_CRC_ERROR 0x1000
253 #define TX_COL_OVRFLW 0x1000
261 #define POLARITY_OK 0x1000
[all...]
/third_party/vixl/test/aarch64/traces/
H A Dsim-shl-4h-2opimm-trace-aarch64.h49 0x0800, 0x1000, 0x1800, 0x8000,
50 0x1000, 0x2000, 0x3000, 0x0000,
65 0x1000, 0x1800, 0x8000, 0xe800,
130 0xe000, 0xf000, 0x0000, 0x1000,
145 0xf800, 0x0000, 0x0800, 0x1000,
146 0xf000, 0x0000, 0x1000, 0x2000,
158 0x0000, 0x0100, 0x0200, 0x1000,
161 0x0000, 0x0800, 0x1000, 0x8000,
162 0x0000, 0x1000, 0x2000, 0x0000,
174 0x0100, 0x0200, 0x1000,
[all...]
H A Dsim-uqrshl-4h-trace-aarch64.h63 0x0000, 0x0000, 0x0000, 0x1000, 0x0000, 0x0000, 0x0000, 0x0000,
75 0xffff, 0xffff, 0xffff, 0x1000, 0x0000, 0x0000, 0x0000, 0x0000,
87 0x0000, 0x0000, 0x0000, 0x1000, 0x0000, 0x0000, 0x0000, 0x0000,
88 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 0x0000, 0x0000, 0x0000,
99 0xffff, 0xffff, 0xffff, 0x1000, 0x0000, 0x0000, 0x0000, 0x0000,
100 0xffff, 0xffff, 0x1000, 0x2000, 0x0000, 0x0000, 0x0000, 0x0000,
111 0x0000, 0x0000, 0x0000, 0x1000, 0x0000, 0x0000, 0x0000, 0x0000,
112 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 0x0000, 0x0000, 0x0000,
113 0x0000, 0x1000, 0x2000, 0x4000, 0x0000, 0x0000, 0x0000, 0x0000,
123 0xffff, 0xffff, 0xffff, 0x1000,
[all...]
H A Dsim-urshl-4h-trace-aarch64.h63 0x0000, 0x0000, 0x0000, 0x1000, 0x0000, 0x0000, 0x0000, 0x0000,
75 0x0000, 0x0000, 0x0000, 0x1000, 0x0000, 0x0000, 0x0000, 0x0000,
87 0x0000, 0x0000, 0x0000, 0x1000, 0x0000, 0x0000, 0x0000, 0x0000,
88 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 0x0000, 0x0000, 0x0000,
99 0x0000, 0x0000, 0x0000, 0x1000, 0x0000, 0x0000, 0x0000, 0x0000,
100 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 0x0000, 0x0000, 0x0000,
111 0x0000, 0x0000, 0x0000, 0x1000, 0x0000, 0x0000, 0x0000, 0x0000,
112 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 0x0000, 0x0000, 0x0000,
113 0x0000, 0x1000, 0x2000, 0x4000, 0x0000, 0x0000, 0x0000, 0x0000,
123 0x0000, 0x0000, 0x0000, 0x1000,
[all...]
H A Dsim-shl-8h-2opimm-trace-aarch64.h49 0x0800, 0x1000, 0x1800, 0x8000, 0xe800, 0xf000, 0xf800, 0x0000,
50 0x1000, 0x2000, 0x3000, 0x0000, 0xd000, 0xe000, 0xf000, 0x0000,
65 0x1000, 0x1800, 0x8000, 0xe800, 0xf000, 0xf800, 0x0000, 0x0800,
66 0x2000, 0x3000, 0x0000, 0xd000, 0xe000, 0xf000, 0x0000, 0x1000,
81 0x1800, 0x8000, 0xe800, 0xf000, 0xf800, 0x0000, 0x0800, 0x1000,
82 0x3000, 0x0000, 0xd000, 0xe000, 0xf000, 0x0000, 0x1000, 0x2000,
94 0xf000, 0xfd00, 0xfe00, 0xff00, 0x0000, 0x0100, 0x0200, 0x1000,
97 0x8000, 0xe800, 0xf000, 0xf800, 0x0000, 0x0800, 0x1000, 0x8000,
98 0x0000, 0xd000, 0xe000, 0xf000, 0x0000, 0x1000, 0x2000, 0x0000,
110 0xfd00, 0xfe00, 0xff00, 0x0000, 0x0100, 0x0200, 0x1000,
[all...]
/kernel/linux/linux-5.10/arch/mips/ath25/
H A Dboard.c49 if (check_radio_magic(addr + 0x1000)) in check_board_data()
61 const void __iomem *begin = limit - 0x1000; in find_board_config()
64 for (addr = begin; addr >= end; addr -= 0x1000) in find_board_config()
78 * Search forward from Board Configuration data by 0x1000 bytes in find_radio_config()
81 begin = bcfg + 0x1000; in find_radio_config()
83 for (rcfg = begin; rcfg < end; rcfg += 0x1000) in find_radio_config()
89 end = limit - 0x1000 + 0xf8; in find_radio_config()
90 for (rcfg = begin; rcfg < end; rcfg += 0x1000) in find_radio_config()
/kernel/linux/linux-6.6/arch/mips/ath25/
H A Dboard.c49 if (check_radio_magic(addr + 0x1000)) in check_board_data()
61 const void __iomem *begin = limit - 0x1000; in find_board_config()
64 for (addr = begin; addr >= end; addr -= 0x1000) in find_board_config()
78 * Search forward from Board Configuration data by 0x1000 bytes in find_radio_config()
81 begin = bcfg + 0x1000; in find_radio_config()
83 for (rcfg = begin; rcfg < end; rcfg += 0x1000) in find_radio_config()
89 end = limit - 0x1000 + 0xf8; in find_radio_config()
90 for (rcfg = begin; rcfg < end; rcfg += 0x1000) in find_radio_config()
/kernel/linux/linux-5.10/drivers/video/fbdev/
H A Dleo.c356 .size = 0x1000
361 .size = 0x1000
366 .size = 0x1000
376 .size = 0x1000
381 .size = 0x1000
386 .size = 0x1000
391 .size = 0x1000
396 .size = 0x1000
401 .size = 0x1000
406 .size = 0x1000
[all...]
/kernel/linux/linux-6.6/drivers/video/fbdev/
H A Dleo.c357 .size = 0x1000
362 .size = 0x1000
367 .size = 0x1000
377 .size = 0x1000
382 .size = 0x1000
387 .size = 0x1000
392 .size = 0x1000
397 .size = 0x1000
402 .size = 0x1000
407 .size = 0x1000
[all...]
/kernel/linux/linux-5.10/arch/mips/include/asm/mach-db1x00/
H A Dbcsr.h131 #define BCSR_STATUS_DB1200_U0RXD 0x1000 /* DB1200 */
134 #define BCSR_STATUS_DB1550_U0RXD 0x1000 /* DB1550 */
136 #define BCSR_STATUS_PB1550_U0RXD 0x1000 /* PB1550 */
142 #define BCSR_STATUS_OTGOCn 0x1000 /* DB1300 */
168 #define BCSR_BOARD_PCICFG 0x1000
183 #define BCSR_RESETS_PSC0MUX 0x1000
191 #define BCSR_RESETS_OTPWRPROT 0x1000 /* DB1300 */
223 #define BCSR_PCMCIA_PC1DRVEN 0x1000
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_hw_sequencer.c89 { 0xE00, 0xF447, 0xFDB9, 0x1000, 0x991,
90 0x12C9, 0x3A6, 0x200, 0xFB47, 0xF6B9, 0xE00, 0x1000} },
92 { 0xE00, 0xF349, 0xFEB7, 0x1000, 0x6CE, 0x16E3,
93 0x24F, 0x200, 0xFCCB, 0xF535, 0xE00, 0x1000} },
95 { 0x1000, 0xF149, 0xFEB7, 0x1004, 0x0868, 0x15B2,
96 0x01E6, 0x201, 0xFB88, 0xF478, 0x1000, 0x1004} },
98 { 0x0000, 0x0000, 0x0000, 0x1000, 0x0000, 0x0000,
99 0x0000, 0x0200, 0x0000, 0x0000, 0x0000, 0x1000} },
/kernel/linux/linux-6.6/arch/mips/include/asm/mach-db1x00/
H A Dbcsr.h131 #define BCSR_STATUS_DB1200_U0RXD 0x1000 /* DB1200 */
134 #define BCSR_STATUS_DB1550_U0RXD 0x1000 /* DB1550 */
136 #define BCSR_STATUS_PB1550_U0RXD 0x1000 /* PB1550 */
142 #define BCSR_STATUS_OTGOCn 0x1000 /* DB1300 */
168 #define BCSR_BOARD_PCICFG 0x1000
183 #define BCSR_RESETS_PSC0MUX 0x1000
191 #define BCSR_RESETS_OTPWRPROT 0x1000 /* DB1300 */
223 #define BCSR_PCMCIA_PC1DRVEN 0x1000
/kernel/linux/linux-6.6/drivers/mtd/spi-nor/
H A Dwinbond.c79 OTP_INFO(256, 3, 0x1000, 0x1000) },
87 OTP_INFO(256, 3, 0x1000, 0x1000) },
139 OTP_INFO(256, 3, 0x1000, 0x1000) },
142 OTP_INFO(256, 3, 0x1000, 0x1000) },
/kernel/linux/linux-6.6/include/uapi/linux/
H A Dmdio.h201 #define MDIO_PMA_STAT2_RXFLTABLE 0x1000 /* Receive fault ability */
206 #define MDIO_PCS_STAT2_RXFLTABLE 0x1000 /* Receive fault ability */
265 #define MDIO_PHYXS_LNSTAT_ALIGN 0x1000
301 #define MDIO_AN_10GBT_CTRL_ADV10G 0x1000 /* Advertise 10GBASE-T */
309 #define MDIO_AN_10GBT_STAT_REMOK 0x1000 /* Remote OK */
318 #define MDIO_PMA_10T1L_CTRL_2V4_EN 0x1000 /* Enable 2.4 Vpp operating mode */
329 #define MDIO_PMA_10T1L_STAT_2V4_ABLE 0x1000 /* PHY has 2.4 Vpp operating mode ability */
344 #define MDIO_AN_T1_ADV_L_FORCE_MS 0x1000 /* Force Master/slave Configuration */
354 #define MDIO_AN_T1_ADV_H_10L_TX_HI_REQ 0x1000 /* 10BASE-T1L High Level Transmit Request */
360 #define MDIO_AN_T1_LP_L_FORCE_MS 0x1000 /* L
[all...]
/kernel/linux/linux-5.10/drivers/phy/marvell/
H A Dphy-mvebu-cp110-comphy.c20 #define MVEBU_COMPHY_SERDES_CFG0(n) (0x0 + (n) * 0x1000)
28 #define MVEBU_COMPHY_SERDES_CFG1(n) (0x4 + (n) * 0x1000)
33 #define MVEBU_COMPHY_SERDES_CFG2(n) (0x8 + (n) * 0x1000)
35 #define MVEBU_COMPHY_SERDES_STATUS0(n) (0x18 + (n) * 0x1000)
39 #define MVEBU_COMPHY_PWRPLL_CTRL(n) (0x804 + (n) * 0x1000)
42 #define MVEBU_COMPHY_IMP_CAL(n) (0x80c + (n) * 0x1000)
45 #define MVEBU_COMPHY_DFE_RES(n) (0x81c + (n) * 0x1000)
47 #define MVEBU_COMPHY_COEF(n) (0x828 + (n) * 0x1000)
50 #define MVEBU_COMPHY_GEN1_S0(n) (0x834 + (n) * 0x1000)
53 #define MVEBU_COMPHY_GEN1_S1(n) (0x838 + (n) * 0x1000)
[all...]
/kernel/linux/linux-6.6/drivers/phy/marvell/
H A Dphy-mvebu-cp110-comphy.c21 #define MVEBU_COMPHY_SERDES_CFG0(n) (0x0 + (n) * 0x1000)
29 #define MVEBU_COMPHY_SERDES_CFG1(n) (0x4 + (n) * 0x1000)
34 #define MVEBU_COMPHY_SERDES_CFG2(n) (0x8 + (n) * 0x1000)
36 #define MVEBU_COMPHY_SERDES_STATUS0(n) (0x18 + (n) * 0x1000)
40 #define MVEBU_COMPHY_PWRPLL_CTRL(n) (0x804 + (n) * 0x1000)
43 #define MVEBU_COMPHY_IMP_CAL(n) (0x80c + (n) * 0x1000)
46 #define MVEBU_COMPHY_DFE_RES(n) (0x81c + (n) * 0x1000)
48 #define MVEBU_COMPHY_COEF(n) (0x828 + (n) * 0x1000)
51 #define MVEBU_COMPHY_GEN1_S0(n) (0x834 + (n) * 0x1000)
54 #define MVEBU_COMPHY_GEN1_S1(n) (0x838 + (n) * 0x1000)
[all...]
/kernel/linux/linux-5.10/drivers/dma/qcom/
H A Dbam_dma.c136 [BAM_P_SW_OFSTS] = { 0x1000, 0x00, 0x40, 0x00 },
157 [BAM_P_CTRL] = { 0x1000, 0x1000, 0x00, 0x00 },
158 [BAM_P_RST] = { 0x1004, 0x1000, 0x00, 0x00 },
159 [BAM_P_HALT] = { 0x1008, 0x1000, 0x00, 0x00 },
160 [BAM_P_IRQ_STTS] = { 0x1010, 0x1000, 0x00, 0x00 },
161 [BAM_P_IRQ_CLR] = { 0x1014, 0x1000, 0x00, 0x00 },
162 [BAM_P_IRQ_EN] = { 0x1018, 0x1000, 0x00, 0x00 },
163 [BAM_P_EVNT_DEST_ADDR] = { 0x182C, 0x00, 0x1000, 0x00 },
164 [BAM_P_EVNT_REG] = { 0x1818, 0x00, 0x1000,
[all...]
/kernel/linux/linux-6.6/drivers/dma/qcom/
H A Dbam_dma.c136 [BAM_P_SW_OFSTS] = { 0x1000, 0x00, 0x40, 0x00 },
157 [BAM_P_CTRL] = { 0x1000, 0x1000, 0x00, 0x00 },
158 [BAM_P_RST] = { 0x1004, 0x1000, 0x00, 0x00 },
159 [BAM_P_HALT] = { 0x1008, 0x1000, 0x00, 0x00 },
160 [BAM_P_IRQ_STTS] = { 0x1010, 0x1000, 0x00, 0x00 },
161 [BAM_P_IRQ_CLR] = { 0x1014, 0x1000, 0x00, 0x00 },
162 [BAM_P_IRQ_EN] = { 0x1018, 0x1000, 0x00, 0x00 },
163 [BAM_P_EVNT_DEST_ADDR] = { 0x182C, 0x00, 0x1000, 0x00 },
164 [BAM_P_EVNT_REG] = { 0x1818, 0x00, 0x1000,
[all...]
/kernel/linux/linux-5.10/arch/powerpc/include/asm/
H A Dhydra.h44 char SCSI[0x1000];
45 char ADB[0x1000];
46 char SCC_Legacy[0x1000];
47 char SCC[0x1000];
/kernel/linux/linux-6.6/arch/powerpc/include/asm/
H A Dhydra.h44 char SCSI[0x1000];
45 char ADB[0x1000];
46 char SCC_Legacy[0x1000];
47 char SCC[0x1000];
/kernel/linux/linux-5.10/include/linux/mfd/wm8350/
H A Dcore.h94 #define WM8350_VCC_FAULT_OV 0x1000
109 #define WM8350_USB_MSTR_SRC 0x1000
134 #define WM8350_CONFIG_DONE 0x1000
135 #define WM8350_CONFIG_DONE_MASK 0x1000
238 #define WM8350_CODEC_ENA 0x1000
274 #define WM8350_UV_INT 0x1000
293 #define WM8350_CHG_TO_EINT 0x1000
308 #define WM8350_CS2_EINT 0x1000
356 #define WM8350_GP12_EINT 0x1000
392 #define WM8350_IM_UV_INT 0x1000
[all...]
/kernel/linux/linux-6.6/include/linux/mfd/wm8350/
H A Dcore.h94 #define WM8350_VCC_FAULT_OV 0x1000
109 #define WM8350_USB_MSTR_SRC 0x1000
134 #define WM8350_CONFIG_DONE 0x1000
135 #define WM8350_CONFIG_DONE_MASK 0x1000
238 #define WM8350_CODEC_ENA 0x1000
274 #define WM8350_UV_INT 0x1000
293 #define WM8350_CHG_TO_EINT 0x1000
308 #define WM8350_CS2_EINT 0x1000
356 #define WM8350_GP12_EINT 0x1000
392 #define WM8350_IM_UV_INT 0x1000
[all...]

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