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/kernel/linux/linux-6.6/include/sound/ac97/
H A Dregs.h132 #define AC97_PD_PR4 0x1000 /* Power down AC-Link */
172 #define AC97_EA_PRJ 0x1000 /* Turns the PCM Surround DACs off */
197 #define AC97_INT_SENSE 0x1000 /* Sense Cycle */
224 #define AC97_MEA_PRE 0x1000 /* ADC2 power down (high) */
242 #define AC97_GPIO_LINE2_CID 0x1000 /* Caller ID path enable Line2 */
/kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/
H A Dmdio.h133 #define MDIO_PMA_STAT2_RXFLTABLE 0x1000
138 #define MDIO_PCS_STAT2_RXFLTABLE 0x1000
163 #define MDIO_PHYXS_LNSTAT_ALIGN 0x1000
178 #define MDIO_AN_10GBT_CTRL_ADV10G 0x1000
182 #define MDIO_AN_10GBT_STAT_REMOK 0x1000
/third_party/backends/backend/
H A Dsm3600-scanmtek.c259 for (i=0; i<0x1000; i++) in UploadGammaTable()
266 for (i=0; rc==SANE_STATUS_GOOD && i<0x2000; i+=0x1000) in UploadGammaTable()
267 rc=MemWriteArray(this,(i+iByteAddress)>>1,0x1000,puchGamma+i); in UploadGammaTable()
302 for (i=0; i<0x4000; i+=0x1000) in UploadGainCorrection()
303 MemWriteArray(this,(iTableOffset+i)>>1,0x1000,((unsigned char*)aGain)+i); in UploadGainCorrection()
/kernel/linux/linux-5.10/sound/soc/codecs/
H A Dwm8904.h285 #define WM8904_SR_MODE 0x1000 /* SR_MODE */
286 #define WM8904_SR_MODE_MASK 0x1000 /* SR_MODE */
315 #define WM8904_TOCLK_RATE 0x1000 /* TOCLK_RATE */
316 #define WM8904_TOCLK_RATE_MASK 0x1000 /* TOCLK_RATE */
339 #define WM8904_DACL_DATINV 0x1000 /* DACL_DATINV */
340 #define WM8904_DACL_DATINV_MASK 0x1000 /* DACL_DATINV */
394 #define WM8904_AIFDAC_TDM_CHAN 0x1000 /* AIFDAC_TDM_CHAN */
395 #define WM8904_AIFDAC_TDM_CHAN_MASK 0x1000 /* AIFDAC_TDM_CHAN */
491 #define WM8904_DAC_MONO 0x1000 /* DAC_MONO */
492 #define WM8904_DAC_MONO_MASK 0x1000 /* DAC_MON
[all...]
H A Dwm8993.h148 #define WM8993_SPKOUTL_ENA 0x1000 /* SPKOUTL_ENA */
149 #define WM8993_SPKOUTL_ENA_MASK 0x1000 /* SPKOUTL_ENA */
235 #define WM8993_LINEOUT1P_ENA 0x1000 /* LINEOUT1P_ENA */
236 #define WM8993_LINEOUT1P_ENA_MASK 0x1000 /* LINEOUT1P_ENA */
295 #define WM8993_AIFADC_TDM_CHAN 0x1000 /* AIFADC_TDM_CHAN */
296 #define WM8993_AIFADC_TDM_CHAN_MASK 0x1000 /* AIFADC_TDM_CHAN */
333 #define WM8993_AIFDAC_TDM_CHAN 0x1000 /* AIFDAC_TDM_CHAN */
334 #define WM8993_AIFDAC_TDM_CHAN_MASK 0x1000 /* AIFDAC_TDM_CHAN */
393 #define WM8993_MCLK_DIV 0x1000 /* MCLK_DIV */
394 #define WM8993_MCLK_DIV_MASK 0x1000 /* MCLK_DI
[all...]
/kernel/linux/linux-5.10/include/linux/mfd/wm831x/
H A Dregulator.h24 #define WM831X_CS1_SLPENA 0x1000 /* CS1_SLPENA */
25 #define WM831X_CS1_SLPENA_MASK 0x1000 /* CS1_SLPENA */
49 #define WM831X_CS2_SLPENA 0x1000 /* CS2_SLPENA */
50 #define WM831X_CS2_SLPENA_MASK 0x1000 /* CS2_SLPENA */
222 #define WM831X_DC1_OV_STS 0x1000 /* DC1_OV_STS */
223 #define WM831X_DC1_OV_STS_MASK 0x1000 /* DC1_OV_STS */
305 #define WM831X_DC1_PHASE 0x1000 /* DC1_PHASE */
306 #define WM831X_DC1_PHASE_MASK 0x1000 /* DC1_PHASE */
389 #define WM831X_DC2_PHASE 0x1000 /* DC2_PHASE */
390 #define WM831X_DC2_PHASE_MASK 0x1000 /* DC2_PHAS
[all...]
/kernel/linux/linux-6.6/include/linux/mfd/wm831x/
H A Dregulator.h24 #define WM831X_CS1_SLPENA 0x1000 /* CS1_SLPENA */
25 #define WM831X_CS1_SLPENA_MASK 0x1000 /* CS1_SLPENA */
49 #define WM831X_CS2_SLPENA 0x1000 /* CS2_SLPENA */
50 #define WM831X_CS2_SLPENA_MASK 0x1000 /* CS2_SLPENA */
222 #define WM831X_DC1_OV_STS 0x1000 /* DC1_OV_STS */
223 #define WM831X_DC1_OV_STS_MASK 0x1000 /* DC1_OV_STS */
305 #define WM831X_DC1_PHASE 0x1000 /* DC1_PHASE */
306 #define WM831X_DC1_PHASE_MASK 0x1000 /* DC1_PHASE */
389 #define WM831X_DC2_PHASE 0x1000 /* DC2_PHASE */
390 #define WM831X_DC2_PHASE_MASK 0x1000 /* DC2_PHAS
[all...]
/kernel/linux/linux-6.6/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-qcom-ethqos.c243 .dma_chan_offset = 0x1000,
245 .mtl_chan_offset = 0x1000,
247 .mtl_ets_ctrl_offset = 0x1000,
249 .mtl_txq_weight_offset = 0x1000,
251 .mtl_send_slp_cred_offset = 0x1000,
253 .mtl_high_cred_offset = 0x1000,
255 .mtl_low_cred_offset = 0x1000,
277 .dma_chan_offset = 0x1000,
279 .mtl_chan_offset = 0x1000,
281 .mtl_ets_ctrl_offset = 0x1000,
[all...]
/kernel/linux/linux-6.6/sound/soc/codecs/
H A Dwm8904.h285 #define WM8904_SR_MODE 0x1000 /* SR_MODE */
286 #define WM8904_SR_MODE_MASK 0x1000 /* SR_MODE */
315 #define WM8904_TOCLK_RATE 0x1000 /* TOCLK_RATE */
316 #define WM8904_TOCLK_RATE_MASK 0x1000 /* TOCLK_RATE */
339 #define WM8904_DACL_DATINV 0x1000 /* DACL_DATINV */
340 #define WM8904_DACL_DATINV_MASK 0x1000 /* DACL_DATINV */
394 #define WM8904_AIFDAC_TDM_CHAN 0x1000 /* AIFDAC_TDM_CHAN */
395 #define WM8904_AIFDAC_TDM_CHAN_MASK 0x1000 /* AIFDAC_TDM_CHAN */
491 #define WM8904_DAC_MONO 0x1000 /* DAC_MONO */
492 #define WM8904_DAC_MONO_MASK 0x1000 /* DAC_MON
[all...]
/kernel/linux/linux-5.10/drivers/net/ethernet/chelsio/cxgb/
H A Dmv88e1xxx.h26 #define GBCR_MANUAL_CONFIG_ENABLE 0x1000
31 #define GBSR_REMOTE_OK 0x1000
47 #define MV88E1XXX_INTR_PAGE_RECV 0x1000
/kernel/linux/linux-5.10/sound/soc/intel/skylake/
H A Dcnl-sst-dsp.h55 #define CNL_ADSP_W0_STAT_SZ 0x1000
57 #define CNL_ADSP_W0_UP_SZ 0x1000
59 #define CNL_ADSP_W1_SZ 0x1000
/kernel/linux/linux-6.6/drivers/virt/nitro_enclaves/
H A Dne_misc_dev_test.c17 * Add the region from 0x1000 to (0x1000 + 0x200000 - 1):
25 {0x1000, 0x200000, -EINVAL, 0, INVALID_VALUE, INVALID_VALUE},
28 * Add the region from 0x200000 to (0x200000 + 0x1000 - 1):
36 {0x200000, 0x1000, -EINVAL, 0, INVALID_VALUE, INVALID_VALUE},
96 * Add the region from 0x1000 to (0x1000 + 0x200000 - 1):
108 {0x1000, 0x200000, -EINVAL, 3, 0x600000, 0x800000},
/kernel/linux/linux-6.6/drivers/net/ethernet/chelsio/cxgb/
H A Dmv88e1xxx.h26 #define GBCR_MANUAL_CONFIG_ENABLE 0x1000
31 #define GBSR_REMOTE_OK 0x1000
47 #define MV88E1XXX_INTR_PAGE_RECV 0x1000
/kernel/linux/linux-6.6/sound/soc/intel/skylake/
H A Dcnl-sst-dsp.h55 #define CNL_ADSP_W0_STAT_SZ 0x1000
57 #define CNL_ADSP_W0_UP_SZ 0x1000
59 #define CNL_ADSP_W1_SZ 0x1000
/third_party/pcre2/pcre2/src/sljit/
H A DsljitNativeRISCV_32.c36 imm += 0x1000; in load_immediate()
49 init_value += 0x1000; in emit_const()
61 new_target += 0x1000; in sljit_set_jump_addr()
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dchangv100.c32 *psize = 0x1000; in gv100_disp_chan_user()
33 return 0x690000 + ((chan->chid.user - 1) * 0x1000); in gv100_disp_chan_user()
/kernel/linux/linux-5.10/drivers/ide/
H A Dbuddha.c190 if (!request_mem_region(board+XSURF_BASE1, 0x1000, "IDE")) in buddha_init()
192 if (!request_mem_region(board+XSURF_BASE2, 0x1000, "IDE")) in buddha_init()
195 release_mem_region(board+XSURF_BASE2, 0x1000); in buddha_init()
197 release_mem_region(board+XSURF_BASE1, 0x1000); in buddha_init()
/kernel/linux/linux-5.10/arch/powerpc/kernel/
H A Dfsl_booke_entry_mapping.S49 1: lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
76 lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
103 lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
143 lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
159 lis r6,0x1000 /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */
219 2: lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
/kernel/linux/linux-5.10/drivers/net/dsa/mv88e6xxx/
H A Dglobal1.h75 #define MV88E6XXX_G1_VTU_OP_FLUSH_ALL 0x1000
90 #define MV88E6XXX_G1_VTU_VID_VALID 0x1000
119 #define MV88E6XXX_G1_ATU_OP_FLUSH_MOVE_ALL 0x1000
228 #define MV88E6352_G1_CTL2_RMU_MODE_PORT_4 0x1000
233 #define MV88E6085_G1_CTL2_RM_ENABLE 0x1000
253 #define MV88E6XXX_G1_STATS_OP_FLUSH_ALL 0x1000
/kernel/linux/linux-6.6/arch/powerpc/kernel/
H A D85xx_entry_mapping.S49 1: lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
76 lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
103 lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
143 lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
159 lis r6,0x1000 /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */
219 2: lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
/kernel/linux/linux-5.10/drivers/misc/habanalabs/include/goya/asic_reg/
H A Dpsoc_global_conf_masks.h200 #define PSOC_GLOBAL_CONF_PERIPH_INTR_EMMC_MASK 0x1000
294 #define PSOC_GLOBAL_CONF_PRSTN_RST_CFG_CPU_MASK 0x1000
320 #define PSOC_GLOBAL_CONF_SW_ALL_RST_CFG_CPU_MASK 0x1000
346 #define PSOC_GLOBAL_CONF_WD_RST_CFG_CPU_MASK 0x1000
372 #define PSOC_GLOBAL_CONF_MNL_RST_CFG_CPU_MASK 0x1000
398 #define PSOC_GLOBAL_CONF_UNIT_RST_N_CPU_MASK 0x1000
/kernel/linux/linux-6.6/drivers/accel/habanalabs/include/goya/asic_reg/
H A Dpsoc_global_conf_masks.h200 #define PSOC_GLOBAL_CONF_PERIPH_INTR_EMMC_MASK 0x1000
294 #define PSOC_GLOBAL_CONF_PRSTN_RST_CFG_CPU_MASK 0x1000
320 #define PSOC_GLOBAL_CONF_SW_ALL_RST_CFG_CPU_MASK 0x1000
346 #define PSOC_GLOBAL_CONF_WD_RST_CFG_CPU_MASK 0x1000
372 #define PSOC_GLOBAL_CONF_MNL_RST_CFG_CPU_MASK 0x1000
398 #define PSOC_GLOBAL_CONF_UNIT_RST_N_CPU_MASK 0x1000
/kernel/linux/linux-5.10/include/linux/mfd/arizona/
H A Dregisters.h2990 #define ARIZONA_OUT1_MONO 0x1000 /* OUT1_MONO */
2991 #define ARIZONA_OUT1_MONO_MASK 0x1000 /* OUT1_MONO */
3080 #define ARIZONA_OUT2_MONO 0x1000 /* OUT2_MONO */
3081 #define ARIZONA_OUT2_MONO_MASK 0x1000 /* OUT2_MONO */
3170 #define ARIZONA_OUT3_MONO 0x1000 /* OUT3_MONO */
3171 #define ARIZONA_OUT3_MONO_MASK 0x1000 /* OUT3_MONO */
3628 #define ARIZONA_SPK1L_MUTE 0x1000 /* SPK1L_MUTE */
3629 #define ARIZONA_SPK1L_MUTE_MASK 0x1000 /* SPK1L_MUTE */
3655 #define ARIZONA_SPK2L_MUTE 0x1000 /* SPK2L_MUTE */
3656 #define ARIZONA_SPK2L_MUTE_MASK 0x1000 /* SPK2L_MUT
[all...]
/kernel/linux/linux-6.6/include/linux/mfd/arizona/
H A Dregisters.h2990 #define ARIZONA_OUT1_MONO 0x1000 /* OUT1_MONO */
2991 #define ARIZONA_OUT1_MONO_MASK 0x1000 /* OUT1_MONO */
3080 #define ARIZONA_OUT2_MONO 0x1000 /* OUT2_MONO */
3081 #define ARIZONA_OUT2_MONO_MASK 0x1000 /* OUT2_MONO */
3170 #define ARIZONA_OUT3_MONO 0x1000 /* OUT3_MONO */
3171 #define ARIZONA_OUT3_MONO_MASK 0x1000 /* OUT3_MONO */
3628 #define ARIZONA_SPK1L_MUTE 0x1000 /* SPK1L_MUTE */
3629 #define ARIZONA_SPK1L_MUTE_MASK 0x1000 /* SPK1L_MUTE */
3655 #define ARIZONA_SPK2L_MUTE 0x1000 /* SPK2L_MUTE */
3656 #define ARIZONA_SPK2L_MUTE_MASK 0x1000 /* SPK2L_MUT
[all...]
/kernel/linux/linux-6.6/include/linux/mfd/madera/
H A Dregisters.h1466 #define MADERA_FLL1_PHASEDET_ENA_MASK 0x1000
1586 #define MADERA_MICB1D_ENA 0x1000
1587 #define MADERA_MICB1D_ENA_MASK 0x1000
1600 #define MADERA_MICB2D_ENA 0x1000
1601 #define MADERA_MICB2D_ENA_MASK 0x1000
2117 #define MADERA_OUT1_MONO 0x1000
2118 #define MADERA_OUT1_MONO_MASK 0x1000
2301 #define MADERA_SPK1L_MUTE 0x1000
2302 #define MADERA_SPK1L_MUTE_MASK 0x1000
2319 #define MADERA_SPK2L_MUTE 0x1000
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