/kernel/linux/linux-5.10/drivers/gpu/drm/omapdrm/dss/ |
H A D | hdmi_wp.c | 67 int hdmi_wp_set_phy_pwr(struct hdmi_wp_data *wp, enum hdmi_phy_pwr val) in hdmi_wp_set_phy_pwr() argument 70 if (REG_GET(wp->base, HDMI_WP_PWR_CTRL, 5, 4) == val) in hdmi_wp_set_phy_pwr() 74 REG_FLD_MOD(wp->base, HDMI_WP_PWR_CTRL, val, 7, 6); in hdmi_wp_set_phy_pwr() 77 if (hdmi_wait_for_bit_change(wp->base, HDMI_WP_PWR_CTRL, 5, 4, val) in hdmi_wp_set_phy_pwr() 78 != val) { in hdmi_wp_set_phy_pwr() 79 DSSERR("Failed to set PHY power mode to %d\n", val); in hdmi_wp_set_phy_pwr() 87 int hdmi_wp_set_pll_pwr(struct hdmi_wp_data *wp, enum hdmi_pll_pwr val) in hdmi_wp_set_pll_pwr() argument 90 REG_FLD_MOD(wp->base, HDMI_WP_PWR_CTRL, val, 3, 2); in hdmi_wp_set_pll_pwr() 93 if (hdmi_wait_for_bit_change(wp->base, HDMI_WP_PWR_CTRL, 1, 0, val) in hdmi_wp_set_pll_pwr() 94 != val) { in hdmi_wp_set_pll_pwr() [all...] |
/kernel/linux/linux-5.10/drivers/mtd/maps/ |
H A D | pci.c | 40 map_word val; in mtd_pci_read8() local 41 val.x[0]= readb(map->base + map->translate(map, ofs)); in mtd_pci_read8() 42 return val; in mtd_pci_read8() 48 map_word val; in mtd_pci_read32() local 49 val.x[0] = readl(map->base + map->translate(map, ofs)); in mtd_pci_read32() 50 return val; in mtd_pci_read32() 59 static void mtd_pci_write8(struct map_info *_map, map_word val, unsigned long ofs) in mtd_pci_write8() argument 62 writeb(val.x[0], map->base + map->translate(map, ofs)); in mtd_pci_write8() 65 static void mtd_pci_write32(struct map_info *_map, map_word val, unsigned long ofs) in mtd_pci_write32() argument 68 writel(val in mtd_pci_write32() [all...] |
/kernel/linux/linux-5.10/drivers/net/ethernet/qualcomm/emac/ |
H A D | emac-sgmii.c | 92 u32 val; in emac_sgmii_link_init() local 97 val = readl(phy->base + EMAC_SGMII_PHY_AUTONEG_CFG2); in emac_sgmii_link_init() 98 val &= ~(FORCE_AN_RX_CFG | FORCE_AN_TX_CFG); in emac_sgmii_link_init() 99 val |= AN_ENABLE; in emac_sgmii_link_init() 100 writel(val, phy->base + EMAC_SGMII_PHY_AUTONEG_CFG2); in emac_sgmii_link_init() 182 u32 val; in emac_sgmii_reset_prepare() local 185 val = readl(phy->base + EMAC_EMAC_WRAPPER_CSR2); in emac_sgmii_reset_prepare() 186 writel(((val & ~PHY_RESET) | PHY_RESET), phy->base + in emac_sgmii_reset_prepare() 190 val = readl(phy->base + EMAC_EMAC_WRAPPER_CSR2); in emac_sgmii_reset_prepare() 191 writel((val in emac_sgmii_reset_prepare() [all...] |
/kernel/linux/linux-5.10/drivers/iio/adc/ |
H A D | max9611.c | 289 int *val, int *val2, long mask) in max9611_read_raw() 307 *val = MAX9611_TEMP_RAW(adc_data); in max9611_read_raw() 316 *val = MAX9611_VOLTAGE_RAW(adc_data); in max9611_read_raw() 324 *val = MAX9611_CIM_OFFSET_RAW; in max9611_read_raw() 332 *val = MAX9611_TEMP_SCALE_NUM; in max9611_read_raw() 338 *val = MAX9611_CIM_LSB_mV; in max9611_read_raw() 363 *val = MAX9611_VOLTAGE_RAW(adc_data) * in max9611_read_raw() 379 *val = MAX9611_VOLTAGE_RAW(adc_data) * in max9611_read_raw() 396 *val = MAX9611_VOLTAGE_RAW(adc_data) * in max9611_read_raw() 408 *val * in max9611_read_raw() 287 max9611_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) max9611_read_raw() argument [all...] |
/kernel/linux/linux-5.10/drivers/iio/light/ |
H A D | cros_ec_light_prox.c | 40 int *val, int *val2, long mask) in cros_ec_light_prox_read() 57 *val = data; in cros_ec_light_prox_read() 74 *val = data; in cros_ec_light_prox_read() 92 *val = st->core.calib[idx].offset; in cros_ec_light_prox_read() 109 *val = val64 >> 16; in cros_ec_light_prox_read() 114 ret = cros_ec_sensors_core_read(&st->core, chan, val, val2, in cros_ec_light_prox_read() 126 int val, int val2, long mask) in cros_ec_light_prox_write() 136 st->core.calib[idx].offset = val; in cros_ec_light_prox_write() 148 st->core.curr_range = (val << 16) | (val2 / 100); in cros_ec_light_prox_write() 155 ret = cros_ec_sensors_core_write(&st->core, chan, val, val in cros_ec_light_prox_write() 38 cros_ec_light_prox_read(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) cros_ec_light_prox_read() argument 124 cros_ec_light_prox_write(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) cros_ec_light_prox_write() argument [all...] |
/kernel/linux/linux-5.10/drivers/iio/dac/ |
H A D | ad7303.c | 56 uint8_t val) in ad7303_write() 60 st->config | val); in ad7303_write() 116 struct iio_chan_spec const *chan, int *val, int *val2, long info) in ad7303_read_raw() 124 *val = st->dac_cache[chan->channel]; in ad7303_read_raw() 132 *val = 2 * vref_uv / 1000; in ad7303_read_raw() 143 struct iio_chan_spec const *chan, int val, int val2, long mask) in ad7303_write_raw() 150 if (val >= (1 << chan->scan_type.realbits) || val < 0) in ad7303_write_raw() 154 ret = ad7303_write(st, chan->address, val); in ad7303_write_raw() 156 st->dac_cache[chan->channel] = val; in ad7303_write_raw() 55 ad7303_write(struct ad7303_state *st, unsigned int chan, uint8_t val) ad7303_write() argument 115 ad7303_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long info) ad7303_read_raw() argument 142 ad7303_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) ad7303_write_raw() argument [all...] |
/kernel/linux/linux-5.10/drivers/net/wireless/ath/wil6210/ |
H A D | txrx_edma.h | 390 u16 val = wil_rx_status_get_flow_id(msg); in wil_rx_status_get_cid() local 392 if (val & WIL_RX_EDMA_DLPF_LU_MISS_BIT) in wil_rx_status_get_cid() 394 return (val >> WIL_RX_EDMA_DLPF_LU_MISS_CID_POS) & in wil_rx_status_get_cid() 398 return (val >> WIL_RX_EDMA_DLPF_LU_HIT_CID_POS) & in wil_rx_status_get_cid() 404 u16 val = wil_rx_status_get_flow_id(msg); in wil_rx_status_get_tid() local 406 if (val & WIL_RX_EDMA_DLPF_LU_MISS_BIT) in wil_rx_status_get_tid() 408 return (val >> WIL_RX_EDMA_DLPF_LU_MISS_TID_POS) & in wil_rx_status_get_tid() 412 return val & WIL_RX_EDMA_DLPF_LU_MISS_CID_TID_MASK; in wil_rx_status_get_tid() 434 u8 val = WIL_GET_BITS(((struct wil_rx_status_compressed *)msg)->d1, in wil_rx_status_get_data_offset() local 437 switch (val) { in wil_rx_status_get_data_offset() [all...] |
/kernel/linux/linux-5.10/drivers/pci/controller/ |
H A D | pcie-tango.c | 63 u32 val; in update_msi_enable() local 66 val = readl_relaxed(pcie->base + SMP8759_ENABLE + offset); in update_msi_enable() 67 val = unmask ? val | bit : val & ~bit; in update_msi_enable() 68 writel_relaxed(val, pcie->base + SMP8759_ENABLE + offset); in update_msi_enable() 174 int where, int size, u32 *val) in smp8759_config_read() 190 ret = pci_generic_config_read(bus, devfn, where, size, val); in smp8759_config_read() 197 int where, int size, u32 val) in smp8759_config_write() 204 ret = pci_generic_config_write(bus, devfn, where, size, val); in smp8759_config_write() 173 smp8759_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) smp8759_config_read() argument 196 smp8759_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) smp8759_config_write() argument [all...] |
/kernel/linux/linux-5.10/drivers/video/fbdev/aty/ |
H A D | atyfb.h | 239 static inline void aty_st_le32(int regindex, u32 val, const struct atyfb_par *par) in aty_st_le32() argument 246 out_le32(par->ati_regbase + regindex, val); in aty_st_le32() 248 writel(val, par->ati_regbase + regindex); in aty_st_le32() 252 static inline void aty_st_le16(int regindex, u16 val, in aty_st_le16() argument 259 out_le16(par->ati_regbase + regindex, val); in aty_st_le16() 261 writel(val, par->ati_regbase + regindex); in aty_st_le16() 277 static inline void aty_st_8(int regindex, u8 val, const struct atyfb_par *par) in aty_st_8() argument 284 out_8(par->ati_regbase + regindex, val); in aty_st_8() 286 writeb(val, par->ati_regbase + regindex); in aty_st_8() 292 extern void aty_st_lcd(int index, u32 val, cons [all...] |
/kernel/linux/linux-5.10/drivers/video/fbdev/omap2/omapfb/dss/ |
H A D | hdmi_wp.c | 68 int hdmi_wp_set_phy_pwr(struct hdmi_wp_data *wp, enum hdmi_phy_pwr val) in hdmi_wp_set_phy_pwr() argument 71 if (REG_GET(wp->base, HDMI_WP_PWR_CTRL, 5, 4) == val) in hdmi_wp_set_phy_pwr() 75 REG_FLD_MOD(wp->base, HDMI_WP_PWR_CTRL, val, 7, 6); in hdmi_wp_set_phy_pwr() 78 if (hdmi_wait_for_bit_change(wp->base, HDMI_WP_PWR_CTRL, 5, 4, val) in hdmi_wp_set_phy_pwr() 79 != val) { in hdmi_wp_set_phy_pwr() 80 DSSERR("Failed to set PHY power mode to %d\n", val); in hdmi_wp_set_phy_pwr() 88 int hdmi_wp_set_pll_pwr(struct hdmi_wp_data *wp, enum hdmi_pll_pwr val) in hdmi_wp_set_pll_pwr() argument 91 REG_FLD_MOD(wp->base, HDMI_WP_PWR_CTRL, val, 3, 2); in hdmi_wp_set_pll_pwr() 94 if (hdmi_wait_for_bit_change(wp->base, HDMI_WP_PWR_CTRL, 1, 0, val) in hdmi_wp_set_pll_pwr() 95 != val) { in hdmi_wp_set_pll_pwr() [all...] |
/kernel/linux/linux-5.10/sound/pci/cs5535audio/ |
H A D | cs5535audio.c | 82 unsigned int val; in snd_cs5535audio_codec_read() local 93 val = cs_readl(cs5535au, ACC_CODEC_STATUS); in snd_cs5535audio_codec_read() 94 if ((val & STS_NEW) && reg == (val >> 24)) in snd_cs5535audio_codec_read() 101 reg, val); in snd_cs5535audio_codec_read() 103 return (unsigned short) val; in snd_cs5535audio_codec_read() 107 unsigned short reg, unsigned short val) in snd_cs5535audio_codec_write() 112 regdata |= val; in snd_cs5535audio_codec_write() 122 unsigned short reg, unsigned short val) in snd_cs5535audio_ac97_codec_write() 125 snd_cs5535audio_codec_write(cs5535au, reg, val); in snd_cs5535audio_ac97_codec_write() 106 snd_cs5535audio_codec_write(struct cs5535audio *cs5535au, unsigned short reg, unsigned short val) snd_cs5535audio_codec_write() argument 121 snd_cs5535audio_ac97_codec_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val) snd_cs5535audio_ac97_codec_write() argument [all...] |
/kernel/linux/linux-5.10/scripts/ |
H A D | markup_oops.pl | 129 my $val = $regs{$reg}; 130 if ($val =~ /^[0]+$/) { 131 $val = "0"; 133 $val =~ s/^0*//; 139 if (length($val) > 0) { 140 $str = $str . " $reg => $val "; 143 $val = ""; 147 if (length($val) > 0) { 148 $str = $str . " $reg = $val "; 249 my $val [all...] |
/kernel/linux/linux-5.10/sound/soc/stm/ |
H A D | stm32_sai.c | 156 u32 val; in stm32_sai_probe() local 224 val = FIELD_GET(SAI_IDR_ID_MASK, in stm32_sai_probe() 226 if (val == SAI_IPIDR_NUMBER) { in stm32_sai_probe() 227 val = readl_relaxed(sai->base + STM_SAI_HWCFGR); in stm32_sai_probe() 228 sai->conf.fifo_size = FIELD_GET(SAI_HWCFGR_FIFO_SIZE, val); in stm32_sai_probe() 230 val); in stm32_sai_probe() 232 val = readl_relaxed(sai->base + STM_SAI_VERR); in stm32_sai_probe() 233 sai->conf.version = val; in stm32_sai_probe() 236 FIELD_GET(SAI_VERR_MAJ_MASK, val), in stm32_sai_probe() 237 FIELD_GET(SAI_VERR_MIN_MASK, val)); in stm32_sai_probe() [all...] |
/kernel/linux/linux-5.10/tools/bpf/bpftool/ |
H A D | json_writer.c | 204 void jsonw_bool(json_writer_t *self, bool val) in jsonw_bool() argument 206 jsonw_printf(self, "%s", val ? "true" : "false"); in jsonw_bool() 247 void jsonw_string_field(json_writer_t *self, const char *prop, const char *val) in jsonw_string_field() argument 250 jsonw_string(self, val); in jsonw_string_field() 253 void jsonw_bool_field(json_writer_t *self, const char *prop, bool val) in jsonw_bool_field() argument 256 jsonw_bool(self, val); in jsonw_bool_field() 260 void jsonw_float_field(json_writer_t *self, const char *prop, double val) in jsonw_float_field() argument 263 jsonw_float(self, val); in jsonw_float_field() 270 double val) in jsonw_float_field_fmt() 273 jsonw_float_fmt(self, fmt, val); in jsonw_float_field_fmt() 267 jsonw_float_field_fmt(json_writer_t *self, const char *prop, const char *fmt, double val) jsonw_float_field_fmt() argument [all...] |
/kernel/linux/linux-5.10/drivers/watchdog/ |
H A D | i6300esb.c | 120 u8 val; in esb_timer_start() local 125 val = ESB_WDT_ENABLE | (_wdd_nowayout ? ESB_WDT_LOCK : 0x00); in esb_timer_start() 126 pci_write_config_byte(edev->pdev, ESB_LOCK_REG, val); in esb_timer_start() 133 u8 val; in esb_timer_stop() local 140 pci_read_config_byte(edev->pdev, ESB_LOCK_REG, &val); in esb_timer_stop() 143 return val & ESB_WDT_ENABLE; in esb_timer_stop() 160 u32 val; in esb_timer_set_heartbeat() local 163 * val will be 1 << 9 = 512, then write that to two in esb_timer_set_heartbeat() 166 val = time << 9; in esb_timer_set_heartbeat() 170 writel(val, ESB_TIMER1_RE in esb_timer_set_heartbeat() [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/ |
H A D | msm_gpu.h | 249 uint32_t val = gpu_read(gpu, reg); in gpu_rmw() local 251 val &= ~mask; in gpu_rmw() 252 gpu_write(gpu, reg, val | or); in gpu_rmw() 257 u64 val; in gpu_read64() local 273 val = (u64) msm_readl(gpu->mmio + (lo << 2)); in gpu_read64() 274 val |= ((u64) msm_readl(gpu->mmio + (hi << 2)) << 32); in gpu_read64() 276 return val; in gpu_read64() 279 static inline void gpu_write64(struct msm_gpu *gpu, u32 lo, u32 hi, u64 val) in gpu_write64() argument 282 msm_writel(lower_32_bits(val), gpu->mmio + (lo << 2)); in gpu_write64() 283 msm_writel(upper_32_bits(val), gp in gpu_write64() [all...] |
/kernel/linux/linux-5.10/drivers/memory/ |
H A D | bt1-l2-ctl.c | 77 static int l2_ctl_get_latency(struct l2_ctl *l2, enum l2_ctl_stall id, u32 *val) in l2_ctl_get_latency() argument 88 *val = FIELD_GET(L2_CTL_WS_STALL_MASK, data); in l2_ctl_get_latency() 91 *val = FIELD_GET(L2_CTL_TAG_STALL_MASK, data); in l2_ctl_get_latency() 94 *val = FIELD_GET(L2_CTL_DATA_STALL_MASK, data); in l2_ctl_get_latency() 103 static int l2_ctl_set_latency(struct l2_ctl *l2, enum l2_ctl_stall id, u32 val) in l2_ctl_set_latency() argument 108 val = clamp_val(val, L2_CTL_STALL_MIN, L2_CTL_STALL_MAX); in l2_ctl_set_latency() 112 data = FIELD_PREP(L2_CTL_WS_STALL_MASK, val); in l2_ctl_set_latency() 116 data = FIELD_PREP(L2_CTL_TAG_STALL_MASK, val); in l2_ctl_set_latency() 120 data = FIELD_PREP(L2_CTL_DATA_STALL_MASK, val); in l2_ctl_set_latency() [all...] |
/kernel/linux/linux-5.10/drivers/power/supply/ |
H A D | collie_battery.c | 93 union power_supply_propval *val) in collie_bat_get_property() 105 val->intval = bat->status; in collie_bat_get_property() 108 val->intval = bat->technology; in collie_bat_get_property() 111 val->intval = collie_read_bat(bat); in collie_bat_get_property() 115 val->intval = bat->bat_max; in collie_bat_get_property() 117 val->intval = bat->full_chrg; in collie_bat_get_property() 120 val->intval = bat->bat_max; in collie_bat_get_property() 123 val->intval = bat->bat_min; in collie_bat_get_property() 126 val->intval = collie_read_temp(bat); in collie_bat_get_property() 129 val in collie_bat_get_property() 91 collie_bat_get_property(struct power_supply *psy, enum power_supply_property psp, union power_supply_propval *val) collie_bat_get_property() argument [all...] |
H A D | generic-adc-battery.c | 148 enum power_supply_property psp, union power_supply_propval *val) in gab_get_property() 166 val->intval = gab_get_status(adc_bat); in gab_get_property() 169 val->intval = 0; in gab_get_property() 172 val->intval = pdata->cal_charge(result); in gab_get_property() 180 val->intval = result; in gab_get_property() 183 val->intval = bat_info->technology; in gab_get_property() 186 val->intval = bat_info->voltage_min_design; in gab_get_property() 189 val->intval = bat_info->voltage_max_design; in gab_get_property() 192 val->intval = bat_info->charge_full_design; in gab_get_property() 195 val in gab_get_property() 147 gab_get_property(struct power_supply *psy, enum power_supply_property psp, union power_supply_propval *val) gab_get_property() argument [all...] |
/kernel/linux/linux-5.10/drivers/regulator/ |
H A D | as3711-regulator.c | 32 u8 val; in as3711_set_mode_sd() local 36 val = fast_bit | low_noise_bit; in as3711_set_mode_sd() 39 val = low_noise_bit; in as3711_set_mode_sd() 42 val = 0; in as3711_set_mode_sd() 49 low_noise_bit | fast_bit, val); in as3711_set_mode_sd() 56 unsigned int val; in as3711_get_mode_sd() local 57 int ret = regmap_read(rdev->regmap, AS3711_SD_CONTROL_1, &val); in as3711_get_mode_sd() 62 if ((val & mask) == mask) in as3711_get_mode_sd() 65 if ((val & mask) == low_noise_bit) in as3711_get_mode_sd() 68 if (!(val in as3711_get_mode_sd() [all...] |
H A D | mt6380-regulator.c | 186 int ret, val = 0; in mt6380_regulator_set_mode() local 191 val = MT6380_REGULATOR_MODE_AUTO; in mt6380_regulator_set_mode() 194 val = MT6380_REGULATOR_MODE_FORCE_PWM; in mt6380_regulator_set_mode() 200 val <<= ffs(info->modeset_mask) - 1; in mt6380_regulator_set_mode() 203 info->modeset_mask, val); in mt6380_regulator_set_mode() 210 unsigned int val; in mt6380_regulator_get_mode() local 215 ret = regmap_read(rdev->regmap, info->modeset_reg, &val); in mt6380_regulator_get_mode() 219 val &= info->modeset_mask; in mt6380_regulator_get_mode() 220 val >>= ffs(info->modeset_mask) - 1; in mt6380_regulator_get_mode() 222 switch (val) { in mt6380_regulator_get_mode() [all...] |
/kernel/linux/linux-5.10/drivers/pinctrl/spear/ |
H A D | pinctrl-spear310.c | 29 .val = 0, 61 .val = 0, 93 .val = 0, 125 .val = 0, 157 .val = 0, 189 .val = 0, 221 .val = 0, 253 .val = 0, 285 .val = 0, 317 .val [all...] |
/kernel/linux/linux-5.10/drivers/staging/media/meson/vdec/ |
H A D | codec_hevc_common.c | 66 u32 val; in codec_hevc_setup_buffers_gxbb() local 82 val = buf_y_paddr | (idx << 8) | 1; in codec_hevc_setup_buffers_gxbb() 84 val); in codec_hevc_setup_buffers_gxbb() 87 val = buf_y_paddr | ((idx * 2) << 8) | 1; in codec_hevc_setup_buffers_gxbb() 89 val); in codec_hevc_setup_buffers_gxbb() 90 val = buf_uv_paddr | ((idx * 2 + 1) << 8) | 1; in codec_hevc_setup_buffers_gxbb() 92 val); in codec_hevc_setup_buffers_gxbb() 97 val = buf_y_paddr | (idx << 8) | 1; in codec_hevc_setup_buffers_gxbb() 99 val = buf_y_paddr | ((idx * 2) << 8) | 1; in codec_hevc_setup_buffers_gxbb() 103 amvdec_write_dos(core, HEVCD_MPP_ANC2AXI_TBL_CMD_ADDR, val); in codec_hevc_setup_buffers_gxbb() [all...] |
/kernel/linux/linux-6.6/drivers/media/platform/ti/cal/ |
H A D | cal.h | 286 static inline void cal_write(struct cal_dev *cal, u32 offset, u32 val) in cal_write() argument 288 iowrite32(val, cal->base + offset); in cal_write() 299 u32 val = cal_read(cal, offset); in cal_write_field() local 301 val &= ~mask; in cal_write_field() 302 val |= (value << __ffs(mask)) & mask; in cal_write_field() 303 cal_write(cal, offset, val); in cal_write_field() 308 u32 val = *valp; in cal_set_field() local 310 val &= ~mask; in cal_set_field() 311 val |= (field << __ffs(mask)) & mask; in cal_set_field() 312 *valp = val; in cal_set_field() [all...] |
/kernel/linux/linux-6.6/drivers/memory/ |
H A D | bt1-l2-ctl.c | 77 static int l2_ctl_get_latency(struct l2_ctl *l2, enum l2_ctl_stall id, u32 *val) in l2_ctl_get_latency() argument 88 *val = FIELD_GET(L2_CTL_WS_STALL_MASK, data); in l2_ctl_get_latency() 91 *val = FIELD_GET(L2_CTL_TAG_STALL_MASK, data); in l2_ctl_get_latency() 94 *val = FIELD_GET(L2_CTL_DATA_STALL_MASK, data); in l2_ctl_get_latency() 103 static int l2_ctl_set_latency(struct l2_ctl *l2, enum l2_ctl_stall id, u32 val) in l2_ctl_set_latency() argument 108 val = clamp_val(val, L2_CTL_STALL_MIN, L2_CTL_STALL_MAX); in l2_ctl_set_latency() 112 data = FIELD_PREP(L2_CTL_WS_STALL_MASK, val); in l2_ctl_set_latency() 116 data = FIELD_PREP(L2_CTL_TAG_STALL_MASK, val); in l2_ctl_set_latency() 120 data = FIELD_PREP(L2_CTL_DATA_STALL_MASK, val); in l2_ctl_set_latency() [all...] |