18c2ecf20Sopenharmony_ci/*
28c2ecf20Sopenharmony_ci * Driver for the ST Microelectronics SPEAr310 pinmux
38c2ecf20Sopenharmony_ci *
48c2ecf20Sopenharmony_ci * Copyright (C) 2012 ST Microelectronics
58c2ecf20Sopenharmony_ci * Viresh Kumar <vireshk@kernel.org>
68c2ecf20Sopenharmony_ci *
78c2ecf20Sopenharmony_ci * This file is licensed under the terms of the GNU General Public
88c2ecf20Sopenharmony_ci * License version 2. This program is licensed "as is" without any
98c2ecf20Sopenharmony_ci * warranty of any kind, whether express or implied.
108c2ecf20Sopenharmony_ci */
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_ci#include <linux/err.h>
138c2ecf20Sopenharmony_ci#include <linux/init.h>
148c2ecf20Sopenharmony_ci#include <linux/of_device.h>
158c2ecf20Sopenharmony_ci#include <linux/platform_device.h>
168c2ecf20Sopenharmony_ci#include "pinctrl-spear3xx.h"
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ci#define DRIVER_NAME "spear310-pinmux"
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ci/* addresses */
218c2ecf20Sopenharmony_ci#define PMX_CONFIG_REG			0x08
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ci/* emi_cs_0_to_5_pins */
248c2ecf20Sopenharmony_cistatic const unsigned emi_cs_0_to_5_pins[] = { 45, 46, 47, 48, 49, 50 };
258c2ecf20Sopenharmony_cistatic struct spear_muxreg emi_cs_0_to_5_muxreg[] = {
268c2ecf20Sopenharmony_ci	{
278c2ecf20Sopenharmony_ci		.reg = PMX_CONFIG_REG,
288c2ecf20Sopenharmony_ci		.mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK,
298c2ecf20Sopenharmony_ci		.val = 0,
308c2ecf20Sopenharmony_ci	},
318c2ecf20Sopenharmony_ci};
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_cistatic struct spear_modemux emi_cs_0_to_5_modemux[] = {
348c2ecf20Sopenharmony_ci	{
358c2ecf20Sopenharmony_ci		.muxregs = emi_cs_0_to_5_muxreg,
368c2ecf20Sopenharmony_ci		.nmuxregs = ARRAY_SIZE(emi_cs_0_to_5_muxreg),
378c2ecf20Sopenharmony_ci	},
388c2ecf20Sopenharmony_ci};
398c2ecf20Sopenharmony_ci
408c2ecf20Sopenharmony_cistatic struct spear_pingroup emi_cs_0_to_5_pingroup = {
418c2ecf20Sopenharmony_ci	.name = "emi_cs_0_to_5_grp",
428c2ecf20Sopenharmony_ci	.pins = emi_cs_0_to_5_pins,
438c2ecf20Sopenharmony_ci	.npins = ARRAY_SIZE(emi_cs_0_to_5_pins),
448c2ecf20Sopenharmony_ci	.modemuxs = emi_cs_0_to_5_modemux,
458c2ecf20Sopenharmony_ci	.nmodemuxs = ARRAY_SIZE(emi_cs_0_to_5_modemux),
468c2ecf20Sopenharmony_ci};
478c2ecf20Sopenharmony_ci
488c2ecf20Sopenharmony_cistatic const char *const emi_cs_0_to_5_grps[] = { "emi_cs_0_to_5_grp" };
498c2ecf20Sopenharmony_cistatic struct spear_function emi_cs_0_to_5_function = {
508c2ecf20Sopenharmony_ci	.name = "emi",
518c2ecf20Sopenharmony_ci	.groups = emi_cs_0_to_5_grps,
528c2ecf20Sopenharmony_ci	.ngroups = ARRAY_SIZE(emi_cs_0_to_5_grps),
538c2ecf20Sopenharmony_ci};
548c2ecf20Sopenharmony_ci
558c2ecf20Sopenharmony_ci/* uart1_pins */
568c2ecf20Sopenharmony_cistatic const unsigned uart1_pins[] = { 0, 1 };
578c2ecf20Sopenharmony_cistatic struct spear_muxreg uart1_muxreg[] = {
588c2ecf20Sopenharmony_ci	{
598c2ecf20Sopenharmony_ci		.reg = PMX_CONFIG_REG,
608c2ecf20Sopenharmony_ci		.mask = PMX_FIRDA_MASK,
618c2ecf20Sopenharmony_ci		.val = 0,
628c2ecf20Sopenharmony_ci	},
638c2ecf20Sopenharmony_ci};
648c2ecf20Sopenharmony_ci
658c2ecf20Sopenharmony_cistatic struct spear_modemux uart1_modemux[] = {
668c2ecf20Sopenharmony_ci	{
678c2ecf20Sopenharmony_ci		.muxregs = uart1_muxreg,
688c2ecf20Sopenharmony_ci		.nmuxregs = ARRAY_SIZE(uart1_muxreg),
698c2ecf20Sopenharmony_ci	},
708c2ecf20Sopenharmony_ci};
718c2ecf20Sopenharmony_ci
728c2ecf20Sopenharmony_cistatic struct spear_pingroup uart1_pingroup = {
738c2ecf20Sopenharmony_ci	.name = "uart1_grp",
748c2ecf20Sopenharmony_ci	.pins = uart1_pins,
758c2ecf20Sopenharmony_ci	.npins = ARRAY_SIZE(uart1_pins),
768c2ecf20Sopenharmony_ci	.modemuxs = uart1_modemux,
778c2ecf20Sopenharmony_ci	.nmodemuxs = ARRAY_SIZE(uart1_modemux),
788c2ecf20Sopenharmony_ci};
798c2ecf20Sopenharmony_ci
808c2ecf20Sopenharmony_cistatic const char *const uart1_grps[] = { "uart1_grp" };
818c2ecf20Sopenharmony_cistatic struct spear_function uart1_function = {
828c2ecf20Sopenharmony_ci	.name = "uart1",
838c2ecf20Sopenharmony_ci	.groups = uart1_grps,
848c2ecf20Sopenharmony_ci	.ngroups = ARRAY_SIZE(uart1_grps),
858c2ecf20Sopenharmony_ci};
868c2ecf20Sopenharmony_ci
878c2ecf20Sopenharmony_ci/* uart2_pins */
888c2ecf20Sopenharmony_cistatic const unsigned uart2_pins[] = { 43, 44 };
898c2ecf20Sopenharmony_cistatic struct spear_muxreg uart2_muxreg[] = {
908c2ecf20Sopenharmony_ci	{
918c2ecf20Sopenharmony_ci		.reg = PMX_CONFIG_REG,
928c2ecf20Sopenharmony_ci		.mask = PMX_TIMER_0_1_MASK,
938c2ecf20Sopenharmony_ci		.val = 0,
948c2ecf20Sopenharmony_ci	},
958c2ecf20Sopenharmony_ci};
968c2ecf20Sopenharmony_ci
978c2ecf20Sopenharmony_cistatic struct spear_modemux uart2_modemux[] = {
988c2ecf20Sopenharmony_ci	{
998c2ecf20Sopenharmony_ci		.muxregs = uart2_muxreg,
1008c2ecf20Sopenharmony_ci		.nmuxregs = ARRAY_SIZE(uart2_muxreg),
1018c2ecf20Sopenharmony_ci	},
1028c2ecf20Sopenharmony_ci};
1038c2ecf20Sopenharmony_ci
1048c2ecf20Sopenharmony_cistatic struct spear_pingroup uart2_pingroup = {
1058c2ecf20Sopenharmony_ci	.name = "uart2_grp",
1068c2ecf20Sopenharmony_ci	.pins = uart2_pins,
1078c2ecf20Sopenharmony_ci	.npins = ARRAY_SIZE(uart2_pins),
1088c2ecf20Sopenharmony_ci	.modemuxs = uart2_modemux,
1098c2ecf20Sopenharmony_ci	.nmodemuxs = ARRAY_SIZE(uart2_modemux),
1108c2ecf20Sopenharmony_ci};
1118c2ecf20Sopenharmony_ci
1128c2ecf20Sopenharmony_cistatic const char *const uart2_grps[] = { "uart2_grp" };
1138c2ecf20Sopenharmony_cistatic struct spear_function uart2_function = {
1148c2ecf20Sopenharmony_ci	.name = "uart2",
1158c2ecf20Sopenharmony_ci	.groups = uart2_grps,
1168c2ecf20Sopenharmony_ci	.ngroups = ARRAY_SIZE(uart2_grps),
1178c2ecf20Sopenharmony_ci};
1188c2ecf20Sopenharmony_ci
1198c2ecf20Sopenharmony_ci/* uart3_pins */
1208c2ecf20Sopenharmony_cistatic const unsigned uart3_pins[] = { 37, 38 };
1218c2ecf20Sopenharmony_cistatic struct spear_muxreg uart3_muxreg[] = {
1228c2ecf20Sopenharmony_ci	{
1238c2ecf20Sopenharmony_ci		.reg = PMX_CONFIG_REG,
1248c2ecf20Sopenharmony_ci		.mask = PMX_UART0_MODEM_MASK,
1258c2ecf20Sopenharmony_ci		.val = 0,
1268c2ecf20Sopenharmony_ci	},
1278c2ecf20Sopenharmony_ci};
1288c2ecf20Sopenharmony_ci
1298c2ecf20Sopenharmony_cistatic struct spear_modemux uart3_modemux[] = {
1308c2ecf20Sopenharmony_ci	{
1318c2ecf20Sopenharmony_ci		.muxregs = uart3_muxreg,
1328c2ecf20Sopenharmony_ci		.nmuxregs = ARRAY_SIZE(uart3_muxreg),
1338c2ecf20Sopenharmony_ci	},
1348c2ecf20Sopenharmony_ci};
1358c2ecf20Sopenharmony_ci
1368c2ecf20Sopenharmony_cistatic struct spear_pingroup uart3_pingroup = {
1378c2ecf20Sopenharmony_ci	.name = "uart3_grp",
1388c2ecf20Sopenharmony_ci	.pins = uart3_pins,
1398c2ecf20Sopenharmony_ci	.npins = ARRAY_SIZE(uart3_pins),
1408c2ecf20Sopenharmony_ci	.modemuxs = uart3_modemux,
1418c2ecf20Sopenharmony_ci	.nmodemuxs = ARRAY_SIZE(uart3_modemux),
1428c2ecf20Sopenharmony_ci};
1438c2ecf20Sopenharmony_ci
1448c2ecf20Sopenharmony_cistatic const char *const uart3_grps[] = { "uart3_grp" };
1458c2ecf20Sopenharmony_cistatic struct spear_function uart3_function = {
1468c2ecf20Sopenharmony_ci	.name = "uart3",
1478c2ecf20Sopenharmony_ci	.groups = uart3_grps,
1488c2ecf20Sopenharmony_ci	.ngroups = ARRAY_SIZE(uart3_grps),
1498c2ecf20Sopenharmony_ci};
1508c2ecf20Sopenharmony_ci
1518c2ecf20Sopenharmony_ci/* uart4_pins */
1528c2ecf20Sopenharmony_cistatic const unsigned uart4_pins[] = { 39, 40 };
1538c2ecf20Sopenharmony_cistatic struct spear_muxreg uart4_muxreg[] = {
1548c2ecf20Sopenharmony_ci	{
1558c2ecf20Sopenharmony_ci		.reg = PMX_CONFIG_REG,
1568c2ecf20Sopenharmony_ci		.mask = PMX_UART0_MODEM_MASK,
1578c2ecf20Sopenharmony_ci		.val = 0,
1588c2ecf20Sopenharmony_ci	},
1598c2ecf20Sopenharmony_ci};
1608c2ecf20Sopenharmony_ci
1618c2ecf20Sopenharmony_cistatic struct spear_modemux uart4_modemux[] = {
1628c2ecf20Sopenharmony_ci	{
1638c2ecf20Sopenharmony_ci		.muxregs = uart4_muxreg,
1648c2ecf20Sopenharmony_ci		.nmuxregs = ARRAY_SIZE(uart4_muxreg),
1658c2ecf20Sopenharmony_ci	},
1668c2ecf20Sopenharmony_ci};
1678c2ecf20Sopenharmony_ci
1688c2ecf20Sopenharmony_cistatic struct spear_pingroup uart4_pingroup = {
1698c2ecf20Sopenharmony_ci	.name = "uart4_grp",
1708c2ecf20Sopenharmony_ci	.pins = uart4_pins,
1718c2ecf20Sopenharmony_ci	.npins = ARRAY_SIZE(uart4_pins),
1728c2ecf20Sopenharmony_ci	.modemuxs = uart4_modemux,
1738c2ecf20Sopenharmony_ci	.nmodemuxs = ARRAY_SIZE(uart4_modemux),
1748c2ecf20Sopenharmony_ci};
1758c2ecf20Sopenharmony_ci
1768c2ecf20Sopenharmony_cistatic const char *const uart4_grps[] = { "uart4_grp" };
1778c2ecf20Sopenharmony_cistatic struct spear_function uart4_function = {
1788c2ecf20Sopenharmony_ci	.name = "uart4",
1798c2ecf20Sopenharmony_ci	.groups = uart4_grps,
1808c2ecf20Sopenharmony_ci	.ngroups = ARRAY_SIZE(uart4_grps),
1818c2ecf20Sopenharmony_ci};
1828c2ecf20Sopenharmony_ci
1838c2ecf20Sopenharmony_ci/* uart5_pins */
1848c2ecf20Sopenharmony_cistatic const unsigned uart5_pins[] = { 41, 42 };
1858c2ecf20Sopenharmony_cistatic struct spear_muxreg uart5_muxreg[] = {
1868c2ecf20Sopenharmony_ci	{
1878c2ecf20Sopenharmony_ci		.reg = PMX_CONFIG_REG,
1888c2ecf20Sopenharmony_ci		.mask = PMX_UART0_MODEM_MASK,
1898c2ecf20Sopenharmony_ci		.val = 0,
1908c2ecf20Sopenharmony_ci	},
1918c2ecf20Sopenharmony_ci};
1928c2ecf20Sopenharmony_ci
1938c2ecf20Sopenharmony_cistatic struct spear_modemux uart5_modemux[] = {
1948c2ecf20Sopenharmony_ci	{
1958c2ecf20Sopenharmony_ci		.muxregs = uart5_muxreg,
1968c2ecf20Sopenharmony_ci		.nmuxregs = ARRAY_SIZE(uart5_muxreg),
1978c2ecf20Sopenharmony_ci	},
1988c2ecf20Sopenharmony_ci};
1998c2ecf20Sopenharmony_ci
2008c2ecf20Sopenharmony_cistatic struct spear_pingroup uart5_pingroup = {
2018c2ecf20Sopenharmony_ci	.name = "uart5_grp",
2028c2ecf20Sopenharmony_ci	.pins = uart5_pins,
2038c2ecf20Sopenharmony_ci	.npins = ARRAY_SIZE(uart5_pins),
2048c2ecf20Sopenharmony_ci	.modemuxs = uart5_modemux,
2058c2ecf20Sopenharmony_ci	.nmodemuxs = ARRAY_SIZE(uart5_modemux),
2068c2ecf20Sopenharmony_ci};
2078c2ecf20Sopenharmony_ci
2088c2ecf20Sopenharmony_cistatic const char *const uart5_grps[] = { "uart5_grp" };
2098c2ecf20Sopenharmony_cistatic struct spear_function uart5_function = {
2108c2ecf20Sopenharmony_ci	.name = "uart5",
2118c2ecf20Sopenharmony_ci	.groups = uart5_grps,
2128c2ecf20Sopenharmony_ci	.ngroups = ARRAY_SIZE(uart5_grps),
2138c2ecf20Sopenharmony_ci};
2148c2ecf20Sopenharmony_ci
2158c2ecf20Sopenharmony_ci/* fsmc_pins */
2168c2ecf20Sopenharmony_cistatic const unsigned fsmc_pins[] = { 34, 35, 36 };
2178c2ecf20Sopenharmony_cistatic struct spear_muxreg fsmc_muxreg[] = {
2188c2ecf20Sopenharmony_ci	{
2198c2ecf20Sopenharmony_ci		.reg = PMX_CONFIG_REG,
2208c2ecf20Sopenharmony_ci		.mask = PMX_SSP_CS_MASK,
2218c2ecf20Sopenharmony_ci		.val = 0,
2228c2ecf20Sopenharmony_ci	},
2238c2ecf20Sopenharmony_ci};
2248c2ecf20Sopenharmony_ci
2258c2ecf20Sopenharmony_cistatic struct spear_modemux fsmc_modemux[] = {
2268c2ecf20Sopenharmony_ci	{
2278c2ecf20Sopenharmony_ci		.muxregs = fsmc_muxreg,
2288c2ecf20Sopenharmony_ci		.nmuxregs = ARRAY_SIZE(fsmc_muxreg),
2298c2ecf20Sopenharmony_ci	},
2308c2ecf20Sopenharmony_ci};
2318c2ecf20Sopenharmony_ci
2328c2ecf20Sopenharmony_cistatic struct spear_pingroup fsmc_pingroup = {
2338c2ecf20Sopenharmony_ci	.name = "fsmc_grp",
2348c2ecf20Sopenharmony_ci	.pins = fsmc_pins,
2358c2ecf20Sopenharmony_ci	.npins = ARRAY_SIZE(fsmc_pins),
2368c2ecf20Sopenharmony_ci	.modemuxs = fsmc_modemux,
2378c2ecf20Sopenharmony_ci	.nmodemuxs = ARRAY_SIZE(fsmc_modemux),
2388c2ecf20Sopenharmony_ci};
2398c2ecf20Sopenharmony_ci
2408c2ecf20Sopenharmony_cistatic const char *const fsmc_grps[] = { "fsmc_grp" };
2418c2ecf20Sopenharmony_cistatic struct spear_function fsmc_function = {
2428c2ecf20Sopenharmony_ci	.name = "fsmc",
2438c2ecf20Sopenharmony_ci	.groups = fsmc_grps,
2448c2ecf20Sopenharmony_ci	.ngroups = ARRAY_SIZE(fsmc_grps),
2458c2ecf20Sopenharmony_ci};
2468c2ecf20Sopenharmony_ci
2478c2ecf20Sopenharmony_ci/* rs485_0_pins */
2488c2ecf20Sopenharmony_cistatic const unsigned rs485_0_pins[] = { 19, 20, 21, 22, 23 };
2498c2ecf20Sopenharmony_cistatic struct spear_muxreg rs485_0_muxreg[] = {
2508c2ecf20Sopenharmony_ci	{
2518c2ecf20Sopenharmony_ci		.reg = PMX_CONFIG_REG,
2528c2ecf20Sopenharmony_ci		.mask = PMX_MII_MASK,
2538c2ecf20Sopenharmony_ci		.val = 0,
2548c2ecf20Sopenharmony_ci	},
2558c2ecf20Sopenharmony_ci};
2568c2ecf20Sopenharmony_ci
2578c2ecf20Sopenharmony_cistatic struct spear_modemux rs485_0_modemux[] = {
2588c2ecf20Sopenharmony_ci	{
2598c2ecf20Sopenharmony_ci		.muxregs = rs485_0_muxreg,
2608c2ecf20Sopenharmony_ci		.nmuxregs = ARRAY_SIZE(rs485_0_muxreg),
2618c2ecf20Sopenharmony_ci	},
2628c2ecf20Sopenharmony_ci};
2638c2ecf20Sopenharmony_ci
2648c2ecf20Sopenharmony_cistatic struct spear_pingroup rs485_0_pingroup = {
2658c2ecf20Sopenharmony_ci	.name = "rs485_0_grp",
2668c2ecf20Sopenharmony_ci	.pins = rs485_0_pins,
2678c2ecf20Sopenharmony_ci	.npins = ARRAY_SIZE(rs485_0_pins),
2688c2ecf20Sopenharmony_ci	.modemuxs = rs485_0_modemux,
2698c2ecf20Sopenharmony_ci	.nmodemuxs = ARRAY_SIZE(rs485_0_modemux),
2708c2ecf20Sopenharmony_ci};
2718c2ecf20Sopenharmony_ci
2728c2ecf20Sopenharmony_cistatic const char *const rs485_0_grps[] = { "rs485_0" };
2738c2ecf20Sopenharmony_cistatic struct spear_function rs485_0_function = {
2748c2ecf20Sopenharmony_ci	.name = "rs485_0",
2758c2ecf20Sopenharmony_ci	.groups = rs485_0_grps,
2768c2ecf20Sopenharmony_ci	.ngroups = ARRAY_SIZE(rs485_0_grps),
2778c2ecf20Sopenharmony_ci};
2788c2ecf20Sopenharmony_ci
2798c2ecf20Sopenharmony_ci/* rs485_1_pins */
2808c2ecf20Sopenharmony_cistatic const unsigned rs485_1_pins[] = { 14, 15, 16, 17, 18 };
2818c2ecf20Sopenharmony_cistatic struct spear_muxreg rs485_1_muxreg[] = {
2828c2ecf20Sopenharmony_ci	{
2838c2ecf20Sopenharmony_ci		.reg = PMX_CONFIG_REG,
2848c2ecf20Sopenharmony_ci		.mask = PMX_MII_MASK,
2858c2ecf20Sopenharmony_ci		.val = 0,
2868c2ecf20Sopenharmony_ci	},
2878c2ecf20Sopenharmony_ci};
2888c2ecf20Sopenharmony_ci
2898c2ecf20Sopenharmony_cistatic struct spear_modemux rs485_1_modemux[] = {
2908c2ecf20Sopenharmony_ci	{
2918c2ecf20Sopenharmony_ci		.muxregs = rs485_1_muxreg,
2928c2ecf20Sopenharmony_ci		.nmuxregs = ARRAY_SIZE(rs485_1_muxreg),
2938c2ecf20Sopenharmony_ci	},
2948c2ecf20Sopenharmony_ci};
2958c2ecf20Sopenharmony_ci
2968c2ecf20Sopenharmony_cistatic struct spear_pingroup rs485_1_pingroup = {
2978c2ecf20Sopenharmony_ci	.name = "rs485_1_grp",
2988c2ecf20Sopenharmony_ci	.pins = rs485_1_pins,
2998c2ecf20Sopenharmony_ci	.npins = ARRAY_SIZE(rs485_1_pins),
3008c2ecf20Sopenharmony_ci	.modemuxs = rs485_1_modemux,
3018c2ecf20Sopenharmony_ci	.nmodemuxs = ARRAY_SIZE(rs485_1_modemux),
3028c2ecf20Sopenharmony_ci};
3038c2ecf20Sopenharmony_ci
3048c2ecf20Sopenharmony_cistatic const char *const rs485_1_grps[] = { "rs485_1" };
3058c2ecf20Sopenharmony_cistatic struct spear_function rs485_1_function = {
3068c2ecf20Sopenharmony_ci	.name = "rs485_1",
3078c2ecf20Sopenharmony_ci	.groups = rs485_1_grps,
3088c2ecf20Sopenharmony_ci	.ngroups = ARRAY_SIZE(rs485_1_grps),
3098c2ecf20Sopenharmony_ci};
3108c2ecf20Sopenharmony_ci
3118c2ecf20Sopenharmony_ci/* tdm_pins */
3128c2ecf20Sopenharmony_cistatic const unsigned tdm_pins[] = { 10, 11, 12, 13 };
3138c2ecf20Sopenharmony_cistatic struct spear_muxreg tdm_muxreg[] = {
3148c2ecf20Sopenharmony_ci	{
3158c2ecf20Sopenharmony_ci		.reg = PMX_CONFIG_REG,
3168c2ecf20Sopenharmony_ci		.mask = PMX_MII_MASK,
3178c2ecf20Sopenharmony_ci		.val = 0,
3188c2ecf20Sopenharmony_ci	},
3198c2ecf20Sopenharmony_ci};
3208c2ecf20Sopenharmony_ci
3218c2ecf20Sopenharmony_cistatic struct spear_modemux tdm_modemux[] = {
3228c2ecf20Sopenharmony_ci	{
3238c2ecf20Sopenharmony_ci		.muxregs = tdm_muxreg,
3248c2ecf20Sopenharmony_ci		.nmuxregs = ARRAY_SIZE(tdm_muxreg),
3258c2ecf20Sopenharmony_ci	},
3268c2ecf20Sopenharmony_ci};
3278c2ecf20Sopenharmony_ci
3288c2ecf20Sopenharmony_cistatic struct spear_pingroup tdm_pingroup = {
3298c2ecf20Sopenharmony_ci	.name = "tdm_grp",
3308c2ecf20Sopenharmony_ci	.pins = tdm_pins,
3318c2ecf20Sopenharmony_ci	.npins = ARRAY_SIZE(tdm_pins),
3328c2ecf20Sopenharmony_ci	.modemuxs = tdm_modemux,
3338c2ecf20Sopenharmony_ci	.nmodemuxs = ARRAY_SIZE(tdm_modemux),
3348c2ecf20Sopenharmony_ci};
3358c2ecf20Sopenharmony_ci
3368c2ecf20Sopenharmony_cistatic const char *const tdm_grps[] = { "tdm_grp" };
3378c2ecf20Sopenharmony_cistatic struct spear_function tdm_function = {
3388c2ecf20Sopenharmony_ci	.name = "tdm",
3398c2ecf20Sopenharmony_ci	.groups = tdm_grps,
3408c2ecf20Sopenharmony_ci	.ngroups = ARRAY_SIZE(tdm_grps),
3418c2ecf20Sopenharmony_ci};
3428c2ecf20Sopenharmony_ci
3438c2ecf20Sopenharmony_ci/* pingroups */
3448c2ecf20Sopenharmony_cistatic struct spear_pingroup *spear310_pingroups[] = {
3458c2ecf20Sopenharmony_ci	SPEAR3XX_COMMON_PINGROUPS,
3468c2ecf20Sopenharmony_ci	&emi_cs_0_to_5_pingroup,
3478c2ecf20Sopenharmony_ci	&uart1_pingroup,
3488c2ecf20Sopenharmony_ci	&uart2_pingroup,
3498c2ecf20Sopenharmony_ci	&uart3_pingroup,
3508c2ecf20Sopenharmony_ci	&uart4_pingroup,
3518c2ecf20Sopenharmony_ci	&uart5_pingroup,
3528c2ecf20Sopenharmony_ci	&fsmc_pingroup,
3538c2ecf20Sopenharmony_ci	&rs485_0_pingroup,
3548c2ecf20Sopenharmony_ci	&rs485_1_pingroup,
3558c2ecf20Sopenharmony_ci	&tdm_pingroup,
3568c2ecf20Sopenharmony_ci};
3578c2ecf20Sopenharmony_ci
3588c2ecf20Sopenharmony_ci/* functions */
3598c2ecf20Sopenharmony_cistatic struct spear_function *spear310_functions[] = {
3608c2ecf20Sopenharmony_ci	SPEAR3XX_COMMON_FUNCTIONS,
3618c2ecf20Sopenharmony_ci	&emi_cs_0_to_5_function,
3628c2ecf20Sopenharmony_ci	&uart1_function,
3638c2ecf20Sopenharmony_ci	&uart2_function,
3648c2ecf20Sopenharmony_ci	&uart3_function,
3658c2ecf20Sopenharmony_ci	&uart4_function,
3668c2ecf20Sopenharmony_ci	&uart5_function,
3678c2ecf20Sopenharmony_ci	&fsmc_function,
3688c2ecf20Sopenharmony_ci	&rs485_0_function,
3698c2ecf20Sopenharmony_ci	&rs485_1_function,
3708c2ecf20Sopenharmony_ci	&tdm_function,
3718c2ecf20Sopenharmony_ci};
3728c2ecf20Sopenharmony_ci
3738c2ecf20Sopenharmony_cistatic const struct of_device_id spear310_pinctrl_of_match[] = {
3748c2ecf20Sopenharmony_ci	{
3758c2ecf20Sopenharmony_ci		.compatible = "st,spear310-pinmux",
3768c2ecf20Sopenharmony_ci	},
3778c2ecf20Sopenharmony_ci	{},
3788c2ecf20Sopenharmony_ci};
3798c2ecf20Sopenharmony_ci
3808c2ecf20Sopenharmony_cistatic int spear310_pinctrl_probe(struct platform_device *pdev)
3818c2ecf20Sopenharmony_ci{
3828c2ecf20Sopenharmony_ci	spear3xx_machdata.groups = spear310_pingroups;
3838c2ecf20Sopenharmony_ci	spear3xx_machdata.ngroups = ARRAY_SIZE(spear310_pingroups);
3848c2ecf20Sopenharmony_ci	spear3xx_machdata.functions = spear310_functions;
3858c2ecf20Sopenharmony_ci	spear3xx_machdata.nfunctions = ARRAY_SIZE(spear310_functions);
3868c2ecf20Sopenharmony_ci
3878c2ecf20Sopenharmony_ci	pmx_init_addr(&spear3xx_machdata, PMX_CONFIG_REG);
3888c2ecf20Sopenharmony_ci	pmx_init_gpio_pingroup_addr(spear3xx_machdata.gpio_pingroups,
3898c2ecf20Sopenharmony_ci			spear3xx_machdata.ngpio_pingroups, PMX_CONFIG_REG);
3908c2ecf20Sopenharmony_ci
3918c2ecf20Sopenharmony_ci	spear3xx_machdata.modes_supported = false;
3928c2ecf20Sopenharmony_ci
3938c2ecf20Sopenharmony_ci	return spear_pinctrl_probe(pdev, &spear3xx_machdata);
3948c2ecf20Sopenharmony_ci}
3958c2ecf20Sopenharmony_ci
3968c2ecf20Sopenharmony_cistatic struct platform_driver spear310_pinctrl_driver = {
3978c2ecf20Sopenharmony_ci	.driver = {
3988c2ecf20Sopenharmony_ci		.name = DRIVER_NAME,
3998c2ecf20Sopenharmony_ci		.of_match_table = spear310_pinctrl_of_match,
4008c2ecf20Sopenharmony_ci	},
4018c2ecf20Sopenharmony_ci	.probe = spear310_pinctrl_probe,
4028c2ecf20Sopenharmony_ci};
4038c2ecf20Sopenharmony_ci
4048c2ecf20Sopenharmony_cistatic int __init spear310_pinctrl_init(void)
4058c2ecf20Sopenharmony_ci{
4068c2ecf20Sopenharmony_ci	return platform_driver_register(&spear310_pinctrl_driver);
4078c2ecf20Sopenharmony_ci}
4088c2ecf20Sopenharmony_ciarch_initcall(spear310_pinctrl_init);
409