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Searched refs:val (Results 5851 - 5875 of 21273) sorted by relevance

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/kernel/linux/linux-6.6/drivers/counter/
H A Dti-ecap-capture.c161 static void ecap_cnt_count_set_val(struct counter_device *counter, unsigned int reg, u32 val) in ecap_cnt_count_set_val() argument
166 regmap_write(ecap_dev->regmap, reg, val); in ecap_cnt_count_set_val()
171 struct counter_count *count, u64 *val) in ecap_cnt_count_read()
173 *val = ecap_cnt_count_get_val(counter, ECAP_TSCNT_REG); in ecap_cnt_count_read()
179 struct counter_count *count, u64 val) in ecap_cnt_count_write()
181 if (val > U32_MAX) in ecap_cnt_count_write()
184 ecap_cnt_count_set_val(counter, ECAP_TSCNT_REG, val); in ecap_cnt_count_write()
289 struct counter_count *count, u64 *val) in ecap_cnt_nb_ovf_read()
293 *val = atomic_read(&ecap_dev->nb_ovf); in ecap_cnt_nb_ovf_read()
299 struct counter_count *count, u64 val) in ecap_cnt_nb_ovf_write()
170 ecap_cnt_count_read(struct counter_device *counter, struct counter_count *count, u64 *val) ecap_cnt_count_read() argument
178 ecap_cnt_count_write(struct counter_device *counter, struct counter_count *count, u64 val) ecap_cnt_count_write() argument
288 ecap_cnt_nb_ovf_read(struct counter_device *counter, struct counter_count *count, u64 *val) ecap_cnt_nb_ovf_read() argument
298 ecap_cnt_nb_ovf_write(struct counter_device *counter, struct counter_count *count, u64 val) ecap_cnt_nb_ovf_write() argument
311 ecap_cnt_ceiling_read(struct counter_device *counter, struct counter_count *count, u64 *val) ecap_cnt_ceiling_read() argument
[all...]
/kernel/linux/linux-6.6/drivers/clocksource/
H A Dingenic-sysost.c150 int val; in ingenic_ost_percpu_timer_set_rate() local
152 val = readl(ost_clk->ost->base + info->ostccr_reg); in ingenic_ost_percpu_timer_set_rate()
153 val &= ~OSTCCR_PRESCALE1_MASK; in ingenic_ost_percpu_timer_set_rate()
154 val |= FIELD_PREP(OSTCCR_PRESCALE1_MASK, prescale); in ingenic_ost_percpu_timer_set_rate()
155 writel(val, ost_clk->ost->base + info->ostccr_reg); in ingenic_ost_percpu_timer_set_rate()
166 int val; in ingenic_ost_global_timer_set_rate() local
168 val = readl(ost_clk->ost->base + info->ostccr_reg); in ingenic_ost_global_timer_set_rate()
169 val &= ~OSTCCR_PRESCALE2_MASK; in ingenic_ost_global_timer_set_rate()
170 val |= FIELD_PREP(OSTCCR_PRESCALE2_MASK, prescale); in ingenic_ost_global_timer_set_rate()
171 writel(val, ost_cl in ingenic_ost_global_timer_set_rate()
275 int val, err; ingenic_ost_register_clock() local
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/kernel/linux/linux-6.6/drivers/dma/dw-edma/
H A Ddw-edma-pcie.c120 u32 val, map; in dw_edma_pcie_get_vsec_dma_data() local
129 pci_read_config_dword(pdev, vsec + PCI_VNDR_HEADER, &val); in dw_edma_pcie_get_vsec_dma_data()
130 if (PCI_VNDR_HEADER_REV(val) != 0x00 || in dw_edma_pcie_get_vsec_dma_data()
131 PCI_VNDR_HEADER_LEN(val) != 0x18) in dw_edma_pcie_get_vsec_dma_data()
135 pci_read_config_dword(pdev, vsec + 0x8, &val); in dw_edma_pcie_get_vsec_dma_data()
136 map = FIELD_GET(DW_PCIE_VSEC_DMA_MAP, val); in dw_edma_pcie_get_vsec_dma_data()
143 pdata->rg.bar = FIELD_GET(DW_PCIE_VSEC_DMA_BAR, val); in dw_edma_pcie_get_vsec_dma_data()
145 pci_read_config_dword(pdev, vsec + 0xc, &val); in dw_edma_pcie_get_vsec_dma_data()
147 FIELD_GET(DW_PCIE_VSEC_DMA_WR_CH, val)); in dw_edma_pcie_get_vsec_dma_data()
149 FIELD_GET(DW_PCIE_VSEC_DMA_RD_CH, val)); in dw_edma_pcie_get_vsec_dma_data()
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/kernel/linux/linux-6.6/drivers/net/ethernet/chelsio/inline_crypto/chtls/
H A Dchtls_hw.c25 u64 mask, u64 val, u8 cookie, int no_reply) in __set_tcb_field_direct()
35 req->val = cpu_to_be64(val); in __set_tcb_field_direct()
42 u64 mask, u64 val, u8 cookie, int no_reply) in __set_tcb_field()
53 __set_tcb_field_direct(csk, req, word, mask, val, cookie, no_reply); in __set_tcb_field()
61 static int chtls_set_tcb_field(struct sock *sk, u16 word, u64 mask, u64 val) in chtls_set_tcb_field() argument
80 __set_tcb_field(sk, skb, word, mask, val, 0, 1); in chtls_set_tcb_field()
92 u64 mask, u64 val, u8 cookie, in chtls_set_tcb_field_rpl_skb()
105 __set_tcb_field(sk, skb, word, mask, val, cookie, 0); in chtls_set_tcb_field_rpl_skb()
112 int chtls_set_tcb_tflag(struct sock *sk, unsigned int bit_pos, int val) in chtls_set_tcb_tflag() argument
23 __set_tcb_field_direct(struct chtls_sock *csk, struct cpl_set_tcb_field *req, u16 word, u64 mask, u64 val, u8 cookie, int no_reply) __set_tcb_field_direct() argument
41 __set_tcb_field(struct sock *sk, struct sk_buff *skb, u16 word, u64 mask, u64 val, u8 cookie, int no_reply) __set_tcb_field() argument
91 chtls_set_tcb_field_rpl_skb(struct sock *sk, u16 word, u64 mask, u64 val, u8 cookie, int through_l2t) chtls_set_tcb_field_rpl_skb() argument
128 chtls_set_tcb_quiesce(struct sock *sk, int val) chtls_set_tcb_quiesce() argument
134 chtls_set_quiesce_ctrl(struct sock *sk, int val) chtls_set_quiesce_ctrl() argument
[all...]
/kernel/linux/linux-6.6/drivers/iio/proximity/
H A Dsrf08.c204 struct iio_chan_spec const *channel, int *val, in srf08_read_raw()
218 *val = ret; in srf08_read_raw()
222 *val = 0; in srf08_read_raw()
260 static ssize_t srf08_write_range_mm(struct srf08_data *data, unsigned int val) in srf08_write_range_mm() argument
267 ret = val / 43 - 1; in srf08_write_range_mm()
268 mod = val % 43; in srf08_write_range_mm()
284 data->range_mm = val; in srf08_write_range_mm()
347 unsigned int val) in srf08_write_sensitivity()
353 if (!val) in srf08_write_sensitivity()
357 if (val in srf08_write_sensitivity()
203 srf08_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *channel, int *val, int *val2, long mask) srf08_read_raw() argument
346 srf08_write_sensitivity(struct srf08_data *data, unsigned int val) srf08_write_sensitivity() argument
388 unsigned int val; srf08_store_sensitivity() local
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/kernel/linux/linux-6.6/drivers/net/ppp/
H A Dppp_synctty.c280 int err, val; in ppp_synctty_ioctl() local
308 val = 0; in ppp_synctty_ioctl()
309 if (put_user(val, p)) in ppp_synctty_ioctl()
389 int err, val; in ppp_sync_ioctl() local
397 val = ap->flags | ap->rbits; in ppp_sync_ioctl()
398 if (put_user(val, (int __user *) argp)) in ppp_sync_ioctl()
403 if (get_user(val, (int __user *) argp)) in ppp_sync_ioctl()
405 ap->flags = val & ~SC_RCV_BITS; in ppp_sync_ioctl()
407 ap->rbits = val & SC_RCV_BITS; in ppp_sync_ioctl()
454 if (get_user(val, (in in ppp_sync_ioctl()
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/kernel/linux/linux-6.6/drivers/net/phy/
H A Dicplus.c410 u16 val; in ip101a_g_config_intr() local
419 val = IP101A_G_IRQ_PIN_USED; in ip101a_g_config_intr()
421 IP101A_G_IRQ_CONF_STATUS, val); in ip101a_g_config_intr()
423 val = IP101A_G_IRQ_ALL_MASK; in ip101a_g_config_intr()
425 IP101A_G_IRQ_CONF_STATUS, val); in ip101a_g_config_intr()
483 int oldval, val, ret; in ip101a_g_has_page_register() local
493 val = phy_read(phydev, IP101G_PAGE_CONTROL); in ip101a_g_has_page_register()
494 if (val < 0) in ip101a_g_has_page_register()
495 return val; in ip101a_g_has_page_register()
501 return val in ip101a_g_has_page_register()
551 int val; ip101g_get_stat() local
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/kernel/linux/linux-6.6/drivers/media/i2c/
H A Dtw2804.c171 ctrl->val = read_reg(client, TW2804_REG_GAIN, 0); in tw2804_g_volatile_ctrl()
175 ctrl->val = read_reg(client, TW2804_REG_CHROMA_GAIN, 0); in tw2804_g_volatile_ctrl()
179 ctrl->val = read_reg(client, TW2804_REG_BLUE_BALANCE, 0); in tw2804_g_volatile_ctrl()
183 ctrl->val = read_reg(client, TW2804_REG_RED_BALANCE, 0); in tw2804_g_volatile_ctrl()
202 if (ctrl->val == 0) in tw2804_s_ctrl()
213 reg = (reg & ~(0x03)) | (ctrl->val == 0 ? 0x02 : 0x03); in tw2804_s_ctrl()
217 return write_reg(client, TW2804_REG_GAIN, ctrl->val, 0); in tw2804_s_ctrl()
220 return write_reg(client, TW2804_REG_CHROMA_GAIN, ctrl->val, 0); in tw2804_s_ctrl()
223 return write_reg(client, TW2804_REG_BLUE_BALANCE, ctrl->val, 0); in tw2804_s_ctrl()
226 return write_reg(client, TW2804_REG_RED_BALANCE, ctrl->val, in tw2804_s_ctrl()
[all...]
/kernel/linux/linux-6.6/drivers/pci/controller/
H A Dpcie-mt7621.c110 static inline void pcie_write(struct mt7621_pcie *pcie, u32 val, u32 reg) in pcie_write() argument
112 writel_relaxed(val, pcie->base + reg); in pcie_write()
121 u32 val, u32 reg) in pcie_port_write()
123 writel_relaxed(val, port->base + reg); in pcie_port_write()
153 u32 reg, u32 val) in write_config()
158 pcie_write(pcie, val, RALINK_PCI_CONFIG_DATA); in write_config()
404 u32 val; in mt7621_pcie_enable_port() local
407 val = pcie_read(pcie, RALINK_PCI_PCIMSK_ADDR); in mt7621_pcie_enable_port()
408 val |= PCIE_PORT_INT_EN(slot); in mt7621_pcie_enable_port()
409 pcie_write(pcie, val, RALINK_PCI_PCIMSK_ADD in mt7621_pcie_enable_port()
120 pcie_port_write(struct mt7621_pcie_port *port, u32 val, u32 reg) pcie_port_write() argument
152 write_config(struct mt7621_pcie *pcie, unsigned int dev, u32 reg, u32 val) write_config() argument
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/
H A Ddrm_mode_object.c268 * @val: value the property should be set to
284 struct drm_property *property, uint64_t val) in drm_object_property_set_value()
293 obj->properties->values[i] = val; in drm_object_property_set_value()
304 uint64_t *val) in __drm_object_property_get_prop_value()
310 *val = obj->properties->values[i]; in __drm_object_property_get_prop_value()
320 uint64_t *val) in __drm_object_property_get_value()
329 return drm_atomic_get_property(obj, property, val); in __drm_object_property_get_value()
331 return __drm_object_property_get_prop_value(obj, property, val); in __drm_object_property_get_value()
338 * @val: storage for the property value
352 struct drm_property *property, uint64_t *val) in drm_object_property_get_value()
283 drm_object_property_set_value(struct drm_mode_object *obj, struct drm_property *property, uint64_t val) drm_object_property_set_value() argument
302 __drm_object_property_get_prop_value(struct drm_mode_object *obj, struct drm_property *property, uint64_t *val) __drm_object_property_get_prop_value() argument
318 __drm_object_property_get_value(struct drm_mode_object *obj, struct drm_property *property, uint64_t *val) __drm_object_property_get_value() argument
351 drm_object_property_get_value(struct drm_mode_object *obj, struct drm_property *property, uint64_t *val) drm_object_property_get_value() argument
376 drm_object_property_get_default_value(struct drm_mode_object *obj, struct drm_property *property, uint64_t *val) drm_object_property_get_default_value() argument
396 uint64_t val; drm_mode_object_get_properties() local
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/gma500/
H A Dpsb_irq.c153 u32 val, addr; in gma_sgx_interrupt() local
156 val = PSB_RSGX32(PSB_CR_2D_BLIT_STATUS); in gma_sgx_interrupt()
159 val = PSB_RSGX32(PSB_CR_BIF_INT_STAT); in gma_sgx_interrupt()
161 if (val) { in gma_sgx_interrupt()
162 if (val & _PSB_CBI_STAT_PF_N_RW) in gma_sgx_interrupt()
167 if (val & _PSB_CBI_STAT_FAULT_CACHE) in gma_sgx_interrupt()
169 if (val & _PSB_CBI_STAT_FAULT_TA) in gma_sgx_interrupt()
171 if (val & _PSB_CBI_STAT_FAULT_VDM) in gma_sgx_interrupt()
173 if (val & _PSB_CBI_STAT_FAULT_2D) in gma_sgx_interrupt()
175 if (val in gma_sgx_interrupt()
[all...]
/kernel/linux/linux-6.6/drivers/iio/dac/
H A Dad5686.c73 unsigned int val, ref_bit_msk; in ad5686_write_dac_powerdown() local
109 val = ((st->pwr_down_mask & st->pwr_down_mode) << shift); in ad5686_write_dac_powerdown()
111 val |= ref_bit_msk; in ad5686_write_dac_powerdown()
114 address, val >> (address * 2)); in ad5686_write_dac_powerdown()
121 int *val, in ad5686_read_raw()
135 *val = (ret >> chan->scan_type.shift) & in ad5686_read_raw()
139 *val = st->vref_mv; in ad5686_read_raw()
148 int val, in ad5686_write_raw()
157 if (val > (1 << chan->scan_type.realbits) || val < in ad5686_write_raw()
119 ad5686_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long m) ad5686_read_raw() argument
146 ad5686_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) ad5686_write_raw() argument
457 unsigned int val, ref_bit_msk; ad5686_probe() local
[all...]
H A Dad5791.c108 static int ad5791_spi_write(struct ad5791_state *st, u8 addr, u32 val) in ad5791_spi_write() argument
112 (val & AD5791_DAC_MASK)); in ad5791_spi_write()
117 static int ad5791_spi_read(struct ad5791_state *st, u8 addr, u32 *val) in ad5791_spi_read() argument
140 *val = be32_to_cpu(st->data[2].d32); in ad5791_spi_read()
248 int *val, in ad5791_read_raw()
258 ret = ad5791_spi_read(st, chan->address, val); in ad5791_read_raw()
261 *val &= AD5791_DAC_MASK; in ad5791_read_raw()
262 *val >>= chan->scan_type.shift; in ad5791_read_raw()
265 *val = st->vref_mv; in ad5791_read_raw()
271 *val in ad5791_read_raw()
246 ad5791_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long m) ad5791_read_raw() argument
317 ad5791_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) ad5791_write_raw() argument
[all...]
/kernel/linux/linux-6.6/drivers/iio/
H A Dindustrialio-event.c282 bool val; in iio_ev_state_store() local
284 ret = kstrtobool(buf, &val); in iio_ev_state_store()
290 iio_ev_attr_dir(this_attr), val); in iio_ev_state_store()
301 int val; in iio_ev_state_show() local
303 val = indio_dev->info->read_event_config(indio_dev, in iio_ev_state_show()
306 if (val < 0) in iio_ev_state_show()
307 return val; in iio_ev_state_show()
309 return sysfs_emit(buf, "%d\n", val); in iio_ev_state_show()
318 int val, val2, val_arr[2]; in iio_ev_value_show() local
324 &val, in iio_ev_value_show()
339 int val, val2; iio_ev_value_store() local
[all...]
/kernel/linux/linux-6.6/drivers/iio/cdc/
H A Dad7150.c103 int *val, in ad7150_read_raw()
117 *val = ret >> 4; in ad7150_read_raw()
125 *val = ret; in ad7150_read_raw()
134 *val = 1000; in ad7150_read_raw()
138 *val = -(12288 >> 4); /* To match shift in _RAW */ in ad7150_read_raw()
142 *val = 100; in ad7150_read_raw()
329 int *val, int *val2) in ad7150_read_event_value()
339 *val = chip->thresh_sensitivity[rising][chan->channel]; in ad7150_read_event_value()
342 *val = chip->threshold[rising][chan->channel]; in ad7150_read_event_value()
348 *val in ad7150_read_event_value()
101 ad7150_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) ad7150_read_raw() argument
324 ad7150_read_event_value(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir, enum iio_event_info info, int *val, int *val2) ad7150_read_event_value() argument
356 ad7150_write_event_value(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir, enum iio_event_info info, int val, int val2) ad7150_write_event_value() argument
[all...]
/kernel/linux/linux-6.6/sound/core/oss/
H A Drate.c70 signed int val; in resample_expand() local
107 val = S1 + ((S2 - S1) * (signed int)pos) / BITS; in resample_expand()
108 if (val < -32768) in resample_expand()
109 val = -32768; in resample_expand()
110 else if (val > 32767) in resample_expand()
111 val = 32767; in resample_expand()
112 *dst = val; in resample_expand()
129 signed int val; in resample_shrink() local
165 val = S1 + ((S2 - S1) * (signed int)pos) / BITS; in resample_shrink()
166 if (val < in resample_shrink()
[all...]
/kernel/linux/linux-6.6/tools/virtio/
H A Dvirtio_test.c161 unsigned long long val; in wait_for_interrupt() local
165 read(dev->fds[i].fd, &val, sizeof val); in wait_for_interrupt()
282 .val = 'h',
286 .val = 'E',
290 .val = 'e',
294 .val = 'I',
298 .val = 'i',
302 .val = '1',
306 .val
[all...]
/kernel/linux/linux-6.6/sound/pci/au88x0/
H A Dau88x0_synth.c23 u32 val);
159 u16 val)
183 u32 val) in vortex_wt_SetReg()
209 WT_RUN(wt), (int)val); in vortex_wt_SetReg()
211 hwwrite(vortex->mmio, WT_RUN(wt), val); in vortex_wt_SetReg()
216 WT_PARM(wt,0), (int)val); in vortex_wt_SetReg()
218 hwwrite(vortex->mmio, WT_PARM(wt, 0), val); in vortex_wt_SetReg()
223 WT_PARM(wt,1), (int)val); in vortex_wt_SetReg()
225 hwwrite(vortex->mmio, WT_PARM(wt, 1), val); in vortex_wt_SetReg()
230 WT_PARM(wt,2), (int)val); in vortex_wt_SetReg()
182 vortex_wt_SetReg(vortex_t * vortex, unsigned char reg, int wt, u32 val) vortex_wt_SetReg() argument
[all...]
/kernel/linux/linux-6.6/sound/pci/ice1712/
H A Dwm8766.c166 u16 val = wm->regs[WM8766_REG_IFCTRL] & ~WM8766_IF_MASK; in snd_wm8766_set_if() local
169 snd_wm8766_write(wm, WM8766_REG_IFCTRL, val | dac); in snd_wm8766_set_if()
174 u16 val = wm->regs[WM8766_REG_DACR1]; in snd_wm8766_volume_restore() local
176 snd_wm8766_write(wm, WM8766_REG_DACR1, val | WM8766_VOL_UPDATE); in snd_wm8766_volume_restore()
241 u16 val, regval1, regval2; in snd_wm8766_ctl_put() local
253 val = wm->regs[wm->ctl[n].reg1] & ~wm->ctl[n].mask1; in snd_wm8766_ctl_put()
254 val |= regval1 << __ffs(wm->ctl[n].mask1); in snd_wm8766_ctl_put()
258 val &= ~wm->ctl[n].mask2; in snd_wm8766_ctl_put()
259 val |= regval2 << __ffs(wm->ctl[n].mask2); in snd_wm8766_ctl_put()
261 snd_wm8766_write(wm, wm->ctl[n].reg1, val); in snd_wm8766_ctl_put()
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/kernel/linux/linux-6.6/sound/soc/codecs/
H A Dcs42xx8.c218 u32 val; in cs42xx8_set_dai_fmt() local
223 val = CS42XX8_INTF_DAC_DIF_LEFTJ | CS42XX8_INTF_ADC_DIF_LEFTJ; in cs42xx8_set_dai_fmt()
226 val = CS42XX8_INTF_DAC_DIF_I2S | CS42XX8_INTF_ADC_DIF_I2S; in cs42xx8_set_dai_fmt()
229 val = CS42XX8_INTF_DAC_DIF_RIGHTJ | CS42XX8_INTF_ADC_DIF_RIGHTJ; in cs42xx8_set_dai_fmt()
232 val = CS42XX8_INTF_DAC_DIF_TDM | CS42XX8_INTF_ADC_DIF_TDM; in cs42xx8_set_dai_fmt()
241 CS42XX8_INTF_ADC_DIF_MASK, val); in cs42xx8_set_dai_fmt()
269 u32 i, val, mask; in cs42xx8_hw_params() local
339 val = cs42xx8_ratios[i].mfreq; in cs42xx8_hw_params()
343 CS42XX8_FUNCMOD_xC_FM(tx, fm[tx]) | val); in cs42xx8_hw_params()
516 int ret, val, in cs42xx8_probe() local
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/kernel/linux/linux-6.6/lib/
H A Drbtree_test.c23 u32 val; member
80 #define NODE_VAL(node) ((node)->val)
90 u32 val = node->val; in insert_augmented() local
96 if (parent->augmented < val) in insert_augmented()
97 parent->augmented = val; in insert_augmented()
104 node->augmented = val; in insert_augmented()
114 u32 val = node->val; in insert_augmented_cached() local
121 if (parent->augmented < val) in insert_augmented_cached()
[all...]
/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/flashboot/include/
H A Dhi_boot_rom.h33 #define hi_reg_write(addr, val) (*(volatile hi_u32*)(uintptr_t)(addr) = (val))
39 #define hi_reg_read(addr, val) ((val) = *(volatile hi_u32*)(uintptr_t)(addr))
45 #define hi_reg_write16(addr, val) (*(volatile hi_u16*)(uintptr_t)(addr) = (val))
51 #define hi_reg_read16(addr, val) ((val) = *(volatile hi_u16*)(uintptr_t)(addr))
1185 * @param val [IN] type #hi_u8,I/O multiplexing.See the functions below: CNcomment:IO复用功能。
1215 hi_u32 hi_io_set_func(hi_io_name id, hi_u8 val);
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/kernel/linux/linux-5.10/drivers/clk/meson/
H A Dclk-pll.c105 u64 val = (u64)rate * n; in __pll_params_with_frac() local
112 val = DIV_ROUND_CLOSEST_ULL(val * frac_max, parent_rate); in __pll_params_with_frac()
114 val = div_u64(val * frac_max, parent_rate); in __pll_params_with_frac()
116 val -= m * frac_max; in __pll_params_with_frac()
118 return min((unsigned int)val, (frac_max - 1)); in __pll_params_with_frac()
158 u64 val = (u64)rate * n; in meson_clk_get_pll_range_m() local
161 return DIV_ROUND_CLOSEST_ULL(val, parent_rate); in meson_clk_get_pll_range_m()
163 return div_u64(val, parent_rat in meson_clk_get_pll_range_m()
[all...]
/kernel/linux/linux-5.10/drivers/crypto/
H A Dexynos-rng.c92 static void exynos_rng_writel(struct exynos_rng_dev *rng, u32 val, u32 offset) in exynos_rng_writel() argument
94 writel_relaxed(val, rng->mem + offset); in exynos_rng_writel()
100 u32 val; in exynos_rng_set_seed() local
112 val = seed[i] << 24; in exynos_rng_set_seed()
113 val |= seed[i + 1] << 16; in exynos_rng_set_seed()
114 val |= seed[i + 2] << 8; in exynos_rng_set_seed()
115 val |= seed[i + 3] << 0; in exynos_rng_set_seed()
117 exynos_rng_writel(rng, val, EXYNOS_RNG_SEED(seed_reg)); in exynos_rng_set_seed()
120 val = exynos_rng_readl(rng, EXYNOS_RNG_STATUS); in exynos_rng_set_seed()
121 if (!(val in exynos_rng_set_seed()
[all...]
/kernel/linux/linux-5.10/drivers/gpio/
H A Dgpio-ixp4xx.c90 u32 val; in ixp4xx_gpio_irq_set_type() local
134 val = __raw_readl(g->base + int_reg); in ixp4xx_gpio_irq_set_type()
135 val &= ~(IXP4XX_GPIO_STYLE_MASK << (line * IXP4XX_GPIO_STYLE_SIZE)); in ixp4xx_gpio_irq_set_type()
136 __raw_writel(val, g->base + int_reg); in ixp4xx_gpio_irq_set_type()
141 val = __raw_readl(g->base + int_reg); in ixp4xx_gpio_irq_set_type()
142 val |= (int_style << (line * IXP4XX_GPIO_STYLE_SIZE)); in ixp4xx_gpio_irq_set_type()
143 __raw_writel(val, g->base + int_reg); in ixp4xx_gpio_irq_set_type()
146 val = __raw_readl(g->base + IXP4XX_REG_GPOE); in ixp4xx_gpio_irq_set_type()
147 val |= BIT(d->hwirq); in ixp4xx_gpio_irq_set_type()
148 __raw_writel(val, in ixp4xx_gpio_irq_set_type()
[all...]

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