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/kernel/linux/linux-5.10/arch/arm64/kvm/vgic/
H A Dvgic-mmio-v3.c33 int upper = lower + 8 * len - 1; in update_64bit_reg() local
35 reg &= ~GENMASK_ULL(upper, lower); in update_64bit_reg()
189 /* The upper word is RAZ for us. */ in vgic_mmio_read_irouter()
205 /* The upper word is WI for us since we don't implement Aff3. */ in vgic_mmio_write_irouter()
944 /* bail out if the upper three levels don't match */ in match_mpidr()
972 * This ICC_SGI1R_EL1 register contains the upper three affinity levels of the
/kernel/linux/linux-5.10/arch/powerpc/kvm/
H A Dbook3s_emulate.c637 void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, bool upper, in kvmppc_set_bat() argument
640 if (upper) { in kvmppc_set_bat()
/kernel/linux/linux-6.6/arch/arm64/kvm/vgic/
H A Dvgic-mmio-v3.c33 int upper = lower + 8 * len - 1; in update_64bit_reg() local
35 reg &= ~GENMASK_ULL(upper, lower); in update_64bit_reg()
203 /* The upper word is RAZ for us. */ in vgic_mmio_read_irouter()
219 /* The upper word is WI for us since we don't implement Aff3. */ in vgic_mmio_write_irouter()
560 * If the guest wrote only to the upper 32bit part of the in vgic_mmio_write_invlpi()
1042 /* bail out if the upper three levels don't match */ in match_mpidr()
1070 * This ICC_SGI1R_EL1 register contains the upper three affinity levels of the
/kernel/linux/linux-6.6/arch/m68k/fpsp040/
H A Dfpsp.h162 .set stag_mask,0xE0 | upper 3 bits are source tag type
183 .set dtag_mask,0xE0 | upper 3 bits are dest type tag
/kernel/linux/linux-6.6/arch/powerpc/kvm/
H A Dbook3s_emulate.c633 void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, bool upper, in kvmppc_set_bat() argument
636 if (upper) { in kvmppc_set_bat()
/kernel/linux/linux-5.10/net/tipc/
H A Dgroup.c367 seq->upper = grp->instance; in tipc_group_self()
684 evt.s.seq.upper = m->instance; in tipc_group_create_event()
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramgf100.c519 ubase = lcomm + func->upper; in gf100_ram_ctor()
658 .upper = 0x0200000000ULL,
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramgf100.c519 ubase = lcomm + func->upper; in gf100_ram_ctor()
658 .upper = 0x0200000000ULL,
/kernel/linux/linux-6.6/net/tipc/
H A Dgroup.c368 seq->upper = grp->instance; in tipc_group_self()
685 evt.s.seq.upper = m->instance; in tipc_group_create_event()
/third_party/openssl/crypto/bn/asm/
H A Dbn-c64xplus.asm202 [!A2] SHRU A3,31,A1 ; upper bit
211 SHRU A3,31,A1 ; upper bit
/third_party/vk-gl-cts/external/vulkan-docs/src/scripts/
H A DgenRef.py70 """Return True if name is an API extension name (ends with an upper-case
1087 for page in sorted(pages, key=str.upper):
1089 letter = page[0:1].upper()
H A Dgenerator.py68 if feature.category.upper() in ['ARB', 'KHR', 'OES']:
704 expandName = re.sub(r'([0-9]+|[a-z_])([A-Z0-9])', r'\1_\2', groupName).upper()
/third_party/python/Include/internal/
H A Dpycore_ast.h485 expr_ty upper; member
795 expr_ty _PyAST_Slice(expr_ty lower, expr_ty upper, expr_ty step, int lineno,
/third_party/python/Python/
H A Dast_unparse.c774 if (e->v.Slice.upper) { in append_ast_slice()
775 APPEND_EXPR(e->v.Slice.upper, PR_TEST); in append_ast_slice()
/third_party/protobuf/python/google/protobuf/
H A Ddescriptor.py1001 result.append(c.upper())
1029 result.append(c.upper())
/third_party/python/Lib/test/
H A Dtest_strptime.py406 if tz_name.upper() in ("UTC", "GMT"):
446 self.assertTrue(_strptime._strptime_time(strf_output.upper(), "%B"),
H A Dtest_wsgiref.py441 for alt in hop, hop.title(), hop.upper(), hop.lower():
448 for alt in hop, hop.title(), hop.upper(), hop.lower():
/third_party/vulkan-headers/registry/
H A Dgenerator.py68 if feature.category.upper() in ['ARB', 'KHR', 'OES']:
704 expandName = re.sub(r'([0-9]+|[a-z_])([A-Z0-9])', r'\1_\2', groupName).upper()
/third_party/node/deps/v8/src/execution/loong64/
H A Dsimulator-loong64.cc912 // Set ONLY lower 32-bits, leaving upper bits untouched. in set_fpu_register_word()
921 // Set ONLY upper 32-bits, leaving lower bits untouched. in set_fpu_register_hi_word()
2960 set_fpu_register(fd_reg(), kFPUInvalidResult); // Trash upper 32 bits. in DecodeTypeOp10()
3961 set_fpu_register(fd_reg(), kFPUInvalidResult); // Trash upper 32 bits.
5013 float upper = std::ceil(fj); in DecodeTypeOp22() local
5018 if (upper - fj < fj - lower) { in DecodeTypeOp22()
5019 result = upper; in DecodeTypeOp22()
5020 } else if (upper - fj > fj - lower) { in DecodeTypeOp22()
5023 temp_result = upper / 2; in DecodeTypeOp22()
5026 result = upper; in DecodeTypeOp22()
5055 double upper = std::ceil(fj); DecodeTypeOp22() local
[all...]
/third_party/node/deps/v8/src/execution/mips64/
H A Dsimulator-mips64.cc817 FPUregisters_[2 * i + 1] = 0; // upper part for MSA ASE in Simulator()
884 // Set ONLY lower 32-bits, leaving upper bits untouched. in set_fpu_register_word()
896 // Set ONLY upper 32-bits, leaving lower bits untouched. in set_fpu_register_hi_word()
2703 float upper = std::ceil(fs); in DecodeTypeRegisterSRsType() local
2707 if (upper - fs < fs - lower) { in DecodeTypeRegisterSRsType()
2708 result = upper; in DecodeTypeRegisterSRsType()
2709 } else if (upper - fs > fs - lower) { in DecodeTypeRegisterSRsType()
2712 temp_result = upper / 2; in DecodeTypeRegisterSRsType()
2715 result = upper; in DecodeTypeRegisterSRsType()
2722 result = (fs > 0 ? lower : upper); in DecodeTypeRegisterSRsType()
3078 double upper = std::ceil(fs); DecodeTypeRegisterDRsType() local
[all...]
/third_party/node/deps/v8/src/execution/mips/
H A Dsimulator-mips.cc874 FPUregisters_[2 * i + 1] = 0; // upper part for MSA ASE in Simulator()
940 // Set ONLY lower 32-bits, leaving upper bits untouched. in set_fpu_register_word()
948 // Set ONLY upper 32-bits, leaving lower bits untouched. in set_fpu_register_hi_word()
2695 double upper = std::ceil(fs); in DecodeTypeRegisterDRsType() local
2699 if (upper - fs < fs - lower) { in DecodeTypeRegisterDRsType()
2700 result = upper; in DecodeTypeRegisterDRsType()
2701 } else if (upper - fs > fs - lower) { in DecodeTypeRegisterDRsType()
2704 temp_result = upper / 2; in DecodeTypeRegisterDRsType()
2707 result = upper; in DecodeTypeRegisterDRsType()
2714 result = (fs > 0 ? lower : upper); in DecodeTypeRegisterDRsType()
3183 float upper = std::ceil(fs); DecodeTypeRegisterSRsType() local
[all...]
/third_party/libfuse/lib/
H A Dfuse.c596 struct node **upper; in remerge_id() local
599 upper = &t->array[t->split + t->size / 2]; in remerge_id()
600 if (*upper) { in remerge_id()
606 *nodep = *upper; in remerge_id()
607 *upper = NULL; in remerge_id()
713 struct node **upper; in remerge_name() local
716 upper = &t->array[t->split + t->size / 2]; in remerge_name()
717 if (*upper) { in remerge_name()
723 *nodep = *upper; in remerge_name()
724 *upper in remerge_name()
[all...]
/third_party/vk-gl-cts/external/vulkancts/scripts/
H A Dgen_framework.py1079 name = name.upper()
1147 prefix += enum.name[i].upper()
2596 structureEnumPattern = f'VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_(\w+)_{FeaturesOrProperties.upper()}(\w+)'
3129 reqStruct = 'Vk' + req[0].upper() + req[1:]
3151 reqStruct = 'Vk' + req[0].upper() + req[1:]
3205 metaCondition = 'defined(CTS_USES_' + mandatoryVariant.upper() + ')'
3257 metaCondition = metaCondition + ' || defined(CTS_USES_' + v[3][0].upper() + ')'
3301 metaCondition = metaCondition + ' || defined(CTS_USES_' + mandatory_variant[0].upper() + ')'
/kernel/linux/linux-6.6/arch/parisc/net/
H A Dbpf_jit_comp32.c162 /* Sign-extend into upper bits. */ in emit_imm32()
1285 /* Swap upper and lower halves, then each half. */ in bpf_jit_emit_insn()
1404 u32 upper = insn1.imm; in bpf_jit_emit_insn() local
1409 WARN_ON(upper); /* we are 32-bit! */ in bpf_jit_emit_insn()
1410 upper = 0; in bpf_jit_emit_insn()
1414 emit_imm64(rd, upper, lower, ctx); in bpf_jit_emit_insn()
/kernel/linux/linux-5.10/drivers/net/phy/mscc/
H A Dmscc_ptp.c111 u32 reg, bypass, cnt = 0, lower = val & 0xffff, upper = val >> 16; in vsc85xx_ts_write_csr() local
139 if (!cond || (cond && upper)) in vsc85xx_ts_write_csr()
140 phy_ts_base_write(phydev, MSCC_PHY_TS_CSR_DATA_MSB, upper); in vsc85xx_ts_write_csr()
154 if (cond && upper) in vsc85xx_ts_write_csr()

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