/kernel/linux/linux-6.6/tools/lib/bpf/ |
H A D | relo_core.c | 976 insn->src_reg = 0; in bpf_core_poison_insn() 1118 insn[0].src_reg != 0 || insn[0].off != 0 || in bpf_core_patch_insn() 1120 insn[1].src_reg != 0 || insn[1].off != 0) { in bpf_core_patch_insn() 1145 insn->src_reg, insn->dst_reg, insn->off, insn->imm); in bpf_core_patch_insn()
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H A D | libbpf.c | 732 insn->src_reg == BPF_PSEUDO_CALL && in insn_is_subprog_call() 744 return is_ldimm64_insn(insn) && insn->src_reg == BPF_PSEUDO_FUNC; in insn_is_pseudo_func() 4095 if (insn->src_reg != BPF_PSEUDO_CALL) { in bpf_program__record_reloc() 5918 insn->src_reg = 0; in poison_map_ldimm64() 5945 insn->src_reg = 0; in poison_kfunc_call() 5975 insn[0].src_reg = BPF_PSEUDO_MAP_IDX; in bpf_object__relocate_data() 5978 insn[0].src_reg = BPF_PSEUDO_MAP_FD; in bpf_object__relocate_data() 5989 insn[0].src_reg = BPF_PSEUDO_MAP_IDX_VALUE; in bpf_object__relocate_data() 5992 insn[0].src_reg = BPF_PSEUDO_MAP_VALUE; in bpf_object__relocate_data() 6003 insn[0].src_reg in bpf_object__relocate_data() [all...] |
/third_party/libbpf/src/ |
H A D | relo_core.c | 976 insn->src_reg = 0; in bpf_core_poison_insn() 1118 insn[0].src_reg != 0 || insn[0].off != 0 || in bpf_core_patch_insn() 1120 insn[1].src_reg != 0 || insn[1].off != 0) { in bpf_core_patch_insn() 1145 insn->src_reg, insn->dst_reg, insn->off, insn->imm); in bpf_core_patch_insn()
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/kernel/linux/linux-5.10/kernel/bpf/ |
H A D | cgroup.c | 1804 BPF_SIZE(si->code), si->dst_reg, si->src_reg, in sysctl_convert_ctx_access() 1813 * register is used since neither src_reg nor dst_reg can be in sysctl_convert_ctx_access() 1819 if (si->src_reg == treg || si->dst_reg == treg) in sysctl_convert_ctx_access() 1821 if (si->src_reg == treg || si->dst_reg == treg) in sysctl_convert_ctx_access() 1831 BPF_SIZEOF(u32), treg, si->src_reg, in sysctl_convert_ctx_access() 1840 si->dst_reg, si->src_reg, in sysctl_convert_ctx_access() 1947 si->dst_reg, si->src_reg, \
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H A D | core.c | 55 #define SRC regs[insn->src_reg] 300 (dst[i].src_reg == BPF_PSEUDO_MAP_FD || in bpf_prog_calc_tag() 301 dst[i].src_reg == BPF_PSEUDO_MAP_VALUE)) { in bpf_prog_calc_tag() 307 dst[i].src_reg == 0 && in bpf_prog_calc_tag() 406 if (insn->src_reg != BPF_PSEUDO_CALL) in bpf_adj_branches() 940 *func_addr_fixed = insn->src_reg != BPF_PSEUDO_CALL; in bpf_jit_get_func_addr() 995 if (from->dst_reg == BPF_REG_AX || from->src_reg == BPF_REG_AX) in bpf_jit_blind_insn() 1674 STX_XADD_W: /* lock xadd *(u32 *)(dst_reg + off16) += src_reg */ in ___bpf_prog_run() 1678 STX_XADD_DW: /* lock xadd *(u64 *)(dst_reg + off16) += src_reg */ in ___bpf_prog_run()
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/third_party/mesa3d/src/freedreno/ir2/ |
H A D | disasm-a2xx.c | 354 printf(" = R%u.", vtx->src_reg); in print_fetch_vtx() 418 printf(" = R%u.", tex->src_reg); in print_fetch_tex()
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/third_party/mesa3d/src/intel/compiler/ |
H A D | brw_vec4_cmod_propagation.cpp | 172 src_reg temp(v, glsl_type::vec4_type, 1); in opt_cmod_propagation_local()
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H A D | brw_vec4_reg_allocate.cpp | 488 src_reg temp = inst->src[i]; in spill_reg()
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/kernel/linux/linux-6.6/arch/x86/net/ |
H A D | bpf_jit_comp32.c | 194 /* Encode 'dst_reg' and 'src_reg' registers into IA32 opcode 'byte' */ 195 static u8 add_2reg(u8 byte, u32 dst_reg, u32 src_reg) in add_2reg() argument 197 return byte + dst_reg + (src_reg << 3); in add_2reg() 1676 const bool sstk = insn->src_reg != BPF_REG_AX; in do_jit() 1679 const u8 *src = bpf2ia32[insn->src_reg]; in do_jit() 1951 /* STX: *(u8*)(dst_reg + off) = src_reg */ in do_jit() 2012 /* LDX: dst_reg = *(u8*)(src_reg + off) */ in do_jit() 2091 if (insn->src_reg == BPF_PSEUDO_CALL) in do_jit() 2094 if (insn->src_reg == BPF_PSEUDO_KFUNC_CALL) { in do_jit()
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/third_party/vixl/src/aarch64/ |
H A D | macro-assembler-aarch64.cc | 1833 CPURegister src_reg = src.GetCPURegister(); in Emit() local 1834 if (dst_reg.IsRegister() && src_reg.IsRegister()) { in Emit() 1835 Mov(Register(dst_reg), Register(src_reg)); in Emit() 1836 } else if (dst_reg.IsVRegister() && src_reg.IsVRegister()) { in Emit() 1837 Fmov(VRegister(dst_reg), VRegister(src_reg)); in Emit() 1840 Fmov(Register(dst_reg), VRegister(src_reg)); in Emit() 1842 Fmov(VRegister(dst_reg), Register(src_reg)); in Emit()
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/kernel/linux/linux-6.6/arch/arm64/net/ |
H A D | bpf_jit_comp.c | 450 const u8 src = bpf2a64[insn->src_reg]; in emit_lse_atomic() 466 /* lock *(u32/u64 *)(dst_reg + off) <op>= src_reg */ in emit_lse_atomic() 480 /* src_reg = atomic_fetch_<op>(dst_reg + off, src_reg) */ in emit_lse_atomic() 494 /* src_reg = atomic_xchg(dst_reg + off, src_reg); */ in emit_lse_atomic() 498 /* r0 = atomic_cmpxchg(dst_reg + off, r0, src_reg); */ in emit_lse_atomic() 520 const u8 src = bpf2a64[insn->src_reg]; in emit_ll_sc_atomic() 541 /* lock *(u32/u64 *)(dst_reg + off) <op>= src_reg */ in emit_ll_sc_atomic() 559 /* src_reg in emit_ll_sc_atomic() [all...] |
/kernel/linux/linux-5.10/drivers/pinctrl/cirrus/ |
H A D | pinctrl-lochnagar.c | 371 .src_reg = LOCHNAGAR1_##ID##_SEL, \ 383 .src_reg = LOCHNAGAR2_##ID##_CTRL, \ 396 u16 src_reg; member 871 ret = regmap_update_bits(regmap, aif->src_reg, aif->src_mask, op); in lochnagar_aif_set_mux()
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/kernel/linux/linux-6.6/drivers/pinctrl/cirrus/ |
H A D | pinctrl-lochnagar.c | 373 .src_reg = LOCHNAGAR1_##ID##_SEL, \ 385 .src_reg = LOCHNAGAR2_##ID##_CTRL, \ 398 u16 src_reg; member 873 ret = regmap_update_bits(regmap, aif->src_reg, aif->src_mask, op); in lochnagar_aif_set_mux()
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/third_party/node/deps/v8/src/wasm/baseline/ |
H A D | liftoff-assembler.cc | 823 Register src_reg = std::get<1>(tuple); in MergeStackWith() local 827 if (src_reg == *dst_reg || *dst_reg == no_reg) continue; in MergeStackWith() 831 } else if (src_reg != no_reg) { in MergeStackWith() 835 LiftoffRegister{src_reg}, kPointerKind); in MergeStackWith()
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/kernel/linux/linux-5.10/arch/x86/net/ |
H A D | bpf_jit_comp32.c | 194 /* Encode 'dst_reg' and 'src_reg' registers into IA32 opcode 'byte' */ 195 static u8 add_2reg(u8 byte, u32 dst_reg, u32 src_reg) in add_2reg() argument 197 return byte + dst_reg + (src_reg << 3); in add_2reg() 1495 const bool sstk = insn->src_reg != BPF_REG_AX; in do_jit() 1498 const u8 *src = bpf2ia32[insn->src_reg]; in do_jit() 1770 /* STX: *(u8*)(dst_reg + off) = src_reg */ in do_jit() 1831 /* LDX: dst_reg = *(u8*)(src_reg + off) */ in do_jit() 1910 if (insn->src_reg == BPF_PSEUDO_CALL) in do_jit()
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/kernel/linux/linux-5.10/tools/bpf/bpftool/ |
H A D | cfg.c | 143 if (cur->src_reg != BPF_PSEUDO_CALL) in cfg_partition_funcs()
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/kernel/linux/linux-6.6/tools/bpf/bpftool/ |
H A D | cfg.c | 143 if (cur->src_reg != BPF_PSEUDO_CALL) in cfg_partition_funcs()
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/third_party/mesa3d/src/freedreno/ir3/ |
H A D | ir3_ra.c | 2070 struct ir3_register *src_reg = ir3_src_create(pcopy, INVALID_REG, flags); in insert_liveout_copy() local 2071 src_reg->wrmask = reg->wrmask; in insert_liveout_copy() 2072 src_reg->size = reg->size; in insert_liveout_copy() 2073 assign_reg(pcopy, src_reg, ra_physreg_to_num(src, reg->flags)); in insert_liveout_copy()
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H A D | ir3.h | 795 int ir3_flut(struct ir3_register *src_reg); 1995 struct ir3_register *src_reg = __ssa_src(instr, src, IR3_REG_ARRAY); in ir3_MOV() local 1996 src_reg->array = src->dsts[0]->array; in ir3_MOV()
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/kernel/linux/linux-5.10/arch/riscv/net/ |
H A D | bpf_jit_comp64.c | 362 *rs = bpf_to_rv_reg(insn->src_reg, ctx); in init_regs() 859 if (insn->src_reg != BPF_PSEUDO_CALL) in bpf_jit_emit_insn()
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/kernel/linux/linux-6.6/arch/loongarch/net/ |
H A D | bpf_jit.c | 283 const u8 src = regmap[insn->src_reg]; in emit_atomic() 460 const u8 src = regmap[insn->src_reg]; in build_insn()
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/kernel/linux/linux-5.10/kernel/trace/ |
H A D | bpf_trace.c | 1880 data), si->dst_reg, si->src_reg, in pe_prog_convert_ctx_access() 1888 data), si->dst_reg, si->src_reg, in pe_prog_convert_ctx_access() 1896 regs), si->dst_reg, si->src_reg, in pe_prog_convert_ctx_access()
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/third_party/mesa3d/src/mesa/program/ |
H A D | program_parse.y | 142 struct asm_src_register src_reg; 214 %type <src_reg> srcReg scalarUse scalarSrcReg swizzleSrcReg 221 %type <src_reg> progParamArrayMem progParamArrayAbs progParamArrayRel
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/third_party/node/deps/v8/src/wasm/baseline/arm64/ |
H A D | liftoff-assembler-arm64.h | 728 Register src_reg = liftoff::CalculateActualAddress( in AtomicLoad() local 733 Ldarb(dst.gp().W(), src_reg); in AtomicLoad() 737 Ldarh(dst.gp().W(), src_reg); in AtomicLoad() 741 Ldar(dst.gp().W(), src_reg); in AtomicLoad() 744 Ldar(dst.gp().X(), src_reg); in AtomicLoad()
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/third_party/node/deps/v8/src/wasm/baseline/riscv64/ |
H A D | liftoff-assembler-riscv64.h | 562 Register src_reg = src_op.offset() == 0 ? src_op.rm() : kScratchReg; in Load() local 564 TurboAssembler::Add64(src_reg, src_op.rm(), src_op.offset()); in Load() 566 vl(dst.fp().toV(), src_reg, 0, E8); in Load() 762 Register src_reg = liftoff::CalculateActualAddress( in AtomicLoad() local 768 lbu(dst.gp(), src_reg, 0); in AtomicLoad() 774 lhu(dst.gp(), src_reg, 0); in AtomicLoad() 780 lw(dst.gp(), src_reg, 0); in AtomicLoad() 785 ld(dst.gp(), src_reg, 0); in AtomicLoad() 1065 Register src_reg = src.offset() == 0 ? src.rm() : kScratchReg; in Fill() local 1067 TurboAssembler::Add64(src_reg, sr in Fill() [all...] |