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/third_party/node/deps/v8/src/codegen/loong64/
H A Dmacro-assembler-loong64.cc3814 void TurboAssembler::Float32Max(FPURegister dst, FPURegister src1, in CallRecordWriteStub() argument
3817 if (src1 == src2) { in CallRecordWriteStub()
3818 Move_s(dst, src1); in CallRecordWriteStub()
3823 CompareIsNanF32(src1, src2); in CallRecordWriteStub()
3826 fmax_s(dst, src1, src2); in CallRecordWriteStub()
3829 void TurboAssembler::Float32MaxOutOfLine(FPURegister dst, FPURegister src1, in CallRecordWriteStub() argument
3831 fadd_s(dst, src1, src2); in CallRecordWriteStub()
3834 void TurboAssembler::Float32Min(FPURegister dst, FPURegister src1, in CallRecordWriteStub() argument
3837 if (src1 == src2) { in CallRecordWriteStub()
3838 Move_s(dst, src1); in CallRecordWriteStub()
3849 Float32MinOutOfLine(FPURegister dst, FPURegister src1, FPURegister src2) CallRecordWriteStub() argument
3854 Float64Max(FPURegister dst, FPURegister src1, FPURegister src2, Label* out_of_line) CallRecordWriteStub() argument
3869 Float64MaxOutOfLine(FPURegister dst, FPURegister src1, FPURegister src2) CallRecordWriteStub() argument
3874 Float64Min(FPURegister dst, FPURegister src1, FPURegister src2, Label* out_of_line) CallRecordWriteStub() argument
3889 Float64MinOutOfLine(FPURegister dst, FPURegister src1, FPURegister src2) CallRecordWriteStub() argument
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/third_party/ffmpeg/libavresample/x86/
H A Daudio_convert.asm242 cglobal conv_s16p_to_s16_2ch, 3,4,5, dst, src0, len, src1
289 cglobal conv_s16p_to_s16_6ch, 3,8,7, dst, src0, len, src1, src2, src3, src4, src5
291 cglobal conv_s16p_to_s16_6ch, 2,7,7, dst, src0, src1, src2, src3, src4, src5
402 cglobal conv_s16p_to_flt_2ch, 3,4,6, dst, src0, len, src1
452 cglobal conv_s16p_to_flt_6ch, 3,8,8, dst, src, len, src1, src2, src3, src4, src5
454 cglobal conv_s16p_to_flt_6ch, 2,7,8, dst, src, src1, src2, src3, src4, src5
555 cglobal conv_fltp_to_s16_2ch, 3,4,3, dst, src0, len, src1
598 cglobal conv_fltp_to_s16_6ch, 3,8,7, dst, src, len, src1, src2, src3, src4, src5
600 cglobal conv_fltp_to_s16_6ch, 2,7,7, dst, src, src1, src2, src3, src4, src5
711 cglobal conv_fltp_to_flt_2ch, 3,4,5, dst, src0, len, src1
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/third_party/mesa3d/src/mesa/program/
H A Dprogram_parse.y96 const struct asm_src_register *src1, const struct asm_src_register *src2);
100 const struct asm_src_register *src1, const struct asm_src_register *src2);
104 const struct asm_src_register *src0, const struct asm_src_register *src1,
2077 const struct asm_src_register *src1,
2096 if (src1 != NULL) {
2097 inst->Base.SrcReg[1] = src1->Base;
2098 inst->SrcReg[1] = *src1;
2116 const struct asm_src_register *src1,
2125 asm_instruction_set_operands(inst, dst, src0, src1, src2);
2136 const struct asm_src_register *src1,
[all...]
/third_party/node/deps/v8/src/codegen/arm64/
H A Dmacro-assembler-arm64.cc71 const CPURegister& src1 = registers.PopHighestIndex(); in PushCPURegList() local
75 PushHelper(count, size, src0, src1, src2, src3); in PushCPURegList()
1116 void TurboAssembler::Push(const CPURegister& src0, const CPURegister& src1, in Push() argument
1120 DCHECK(AreSameSizeAndType(src0, src1, src2, src3, src4, src5, src6, src7)); in Push()
1126 PushHelper(4, size, src0, src1, src2, src3); in Push()
1177 const CPURegister& src1, in PushHelper()
1183 DCHECK(AreSameSizeAndType(src0, src1, src2, src3)); in PushHelper()
1190 DCHECK(src1.IsNone() && src2.IsNone() && src3.IsNone()); in PushHelper()
1195 stp(src1, src0, MemOperand(sp, -2 * size, PreIndex)); in PushHelper()
1199 stp(src2, src1, MemOperan in PushHelper()
1176 PushHelper(int count, int size, const CPURegister& src0, const CPURegister& src1, const CPURegister& src2, const CPURegister& src3) PushHelper() argument
1252 PokePair(const CPURegister& src1, const CPURegister& src2, int offset) PokePair() argument
1494 MovePair(Register dst0, Register src0, Register dst1, Register src1) MovePair() argument
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/third_party/ffmpeg/libavcodec/mips/
H A Dhevc_lpf_sao_msa.c984 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; in hevc_loopfilter_chroma_ver_msa() local
1007 LD_UB8(src, stride, src0, src1, src2, src3, src4, src5, src6, src7); in hevc_loopfilter_chroma_ver_msa()
1008 TRANSPOSE8x4_UB_UH(src0, src1, src2, src3, src4, src5, src6, src7, in hevc_loopfilter_chroma_ver_msa()
1046 v16u8 src0, src1, src2, src3; in hevc_sao_band_filter_4width_msa() local
1061 LD_UB4(src, src_stride, src0, src1, src2, src3); in hevc_sao_band_filter_4width_msa()
1070 ILVEV_D2_SB(src0, src1, src2, src3, src0_r, src1_r); in hevc_sao_band_filter_4width_msa()
1081 LD_UB4(src, src_stride, src0, src1, src2, src3); in hevc_sao_band_filter_4width_msa()
1088 ILVEV_D2_SB(src0, src1, src2, src3, src0_r, src1_r); in hevc_sao_band_filter_4width_msa()
1108 v16u8 src0, src1, src2, src3; in hevc_sao_band_filter_8width_msa() local
1122 LD_UB4(src, src_stride, src0, src1, src in hevc_sao_band_filter_8width_msa()
1182 v16u8 src0, src1, src2, src3; hevc_sao_band_filter_16multiple_msa() local
1358 v16u8 src0, src1, dst0, src_minus10, src_minus11, src_plus10, src_plus11; hevc_sao_edge_filter_0degree_8width_msa() local
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H A Dhevcpred_msa.c272 v16i8 src0, src1, src2, src3; in hevc_intra_pred_horiz_16x16_msa() local
285 src1 = __msa_fill_b(inp1); in hevc_intra_pred_horiz_16x16_msa()
289 ST_SB4(src0, src1, src2, src3, tmp_dst, stride); in hevc_intra_pred_horiz_16x16_msa()
316 v16i8 src0, src1, src2, src3; in hevc_intra_pred_horiz_32x32_msa() local
325 src1 = __msa_fill_b(inp1); in hevc_intra_pred_horiz_32x32_msa()
331 ST_SB2(src1, src1, dst, 16); in hevc_intra_pred_horiz_32x32_msa()
552 uint32_t src0, src1; in hevc_intra_pred_plane_4x4_msa() local
560 src1 = LW(src_left); in hevc_intra_pred_plane_4x4_msa()
565 src_vec1 = (v16i8) __msa_insert_w((v4i32) zero, 0, src1); in hevc_intra_pred_plane_4x4_msa()
599 uint64_t src0, src1; hevc_intra_pred_plane_8x8_msa() local
667 v16u8 src0, src1; hevc_intra_pred_plane_16x16_msa() local
748 v16i8 src0, src1; process_intra_upper_16x16_msa() local
831 v16i8 src0, src1; process_intra_lower_16x16_msa() local
1768 v16u8 src1, src2; intra_predict_vert_32x32_msa() local
[all...]
H A Dsbrdsp_mips.c316 static void sbr_qmf_deint_bfly_mips(float *v, const float *src0, const float *src1) in sbr_qmf_deint_bfly_mips() argument
324 float *psrc1 = (float*)&src1[63]; in sbr_qmf_deint_bfly_mips()
331 "lwc1 %[temp1], 0(%[src1]) \n\t" in sbr_qmf_deint_bfly_mips()
333 "lwc1 %[temp4], -4(%[src1]) \n\t" in sbr_qmf_deint_bfly_mips()
335 "lwc1 %[temp7], -8(%[src1]) \n\t" in sbr_qmf_deint_bfly_mips()
337 "lwc1 %[temp10], -12(%[src1]) \n\t" in sbr_qmf_deint_bfly_mips()
355 "lwc1 %[temp1], -16(%[src1]) \n\t" in sbr_qmf_deint_bfly_mips()
357 "lwc1 %[temp4], -20(%[src1]) \n\t" in sbr_qmf_deint_bfly_mips()
359 "lwc1 %[temp7], -24(%[src1]) \n\t" in sbr_qmf_deint_bfly_mips()
361 "lwc1 %[temp10], -28(%[src1]) \ in sbr_qmf_deint_bfly_mips()
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/third_party/node/deps/v8/src/compiler/backend/ia32/
H A Dcode-generator-ia32.cc487 Operand src1 = i.InputOperand(instr->InputCount() == 2 ? 1 : 0); \
490 __ v##opcode(i.OutputSimd128Register(), src0, src1); \
493 __ opcode(i.OutputSimd128Register(), src1); \
2317 XMMRegister src1 = i.InputSimd128Register(0); in AssembleArchInstruction() local
2321 __ vpminsd(kScratchDoubleReg, src1, src2); in AssembleArchInstruction()
2324 DCHECK_EQ(dst, src1); in AssembleArchInstruction()
2423 XMMRegister src1 = i.InputSimd128Register(0); in AssembleArchInstruction() local
2425 __ vpmaxud(kScratchDoubleReg, src1, src2); in AssembleArchInstruction()
2442 XMMRegister src1 = i.InputSimd128Register(0); in AssembleArchInstruction() local
2444 __ vpminud(kScratchDoubleReg, src1, src in AssembleArchInstruction()
2580 XMMRegister src1 = i.InputSimd128Register(0); AssembleArchInstruction() local
2638 XMMRegister src1 = i.InputSimd128Register(0); AssembleArchInstruction() local
2657 XMMRegister src1 = i.InputSimd128Register(0); AssembleArchInstruction() local
2873 XMMRegister src1 = i.InputSimd128Register(0); AssembleArchInstruction() local
2932 XMMRegister src1 = i.InputSimd128Register(0); AssembleArchInstruction() local
2950 XMMRegister src1 = i.InputSimd128Register(0); AssembleArchInstruction() local
3062 Operand src1 = i.InputOperand(1); AssembleArchInstruction() local
4417 Operand src1 = g.ToOperand(source); AssembleSwap() local
[all...]
/third_party/node/deps/v8/src/wasm/baseline/mips64/
H A Dliftoff-assembler-mips64.h2186 LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) { \
2187 TurboAssembler::ExtMulLow(type, dst.fp().toW(), src1.fp().toW(), \
2191 LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) { \
2192 TurboAssembler::ExtMulHigh(type, dst.fp().toW(), src1.fp().toW(), \
2220 LiftoffRegister src1, in emit_i16x8_q15mulr_sat_s()
2222 mulr_q_h(dst.fp().toW(), src1.fp().toW(), src2.fp().toW()); in emit_i16x8_q15mulr_sat_s()
2413 LiftoffRegister src1, in emit_s128_select()
2417 bsel_v(dst.fp().toW(), src2.fp().toW(), src1.fp().toW()); in emit_s128_select()
2419 xor_v(kSimd128ScratchReg, src1.fp().toW(), src2.fp().toW()); in emit_s128_select()
3369 LiftoffRegister src1, in emit_i8x16_replace_lane()
2219 emit_i16x8_q15mulr_sat_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_q15mulr_sat_s() argument
2412 emit_s128_select(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, LiftoffRegister mask) emit_s128_select() argument
3368 emit_i8x16_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i8x16_replace_lane() argument
3378 emit_i16x8_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i16x8_replace_lane() argument
3388 emit_i32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i32x4_replace_lane() argument
3398 emit_i64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i64x2_replace_lane() argument
3408 emit_f32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_f32x4_replace_lane() argument
3419 emit_f64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_f64x2_replace_lane() argument
[all...]
/third_party/mesa3d/src/amd/compiler/tests/
H A Dtest_optimizer.cpp608 Temp src1 = variable
611 writeout(6, bld.sop2(aco_opcode::s_and_b64, bld.def(bld.lm), bld.def(s1, scc), src0, src1));
617 src1 =
620 writeout(7, bld.sop2(aco_opcode::s_or_b64, bld.def(bld.lm), bld.def(s1, scc), src0, src1));
626 src1 = bld.vopc(aco_opcode::v_cmp_lt_f32, bld.def(bld.lm), Operand::c32(0x40800000u), inputs[3]);
628 writeout(8, bld.sop2(aco_opcode::s_or_b64, bld.def(bld.lm), bld.def(s1, scc), src0, src1));
634 src1 = bld.vopc(aco_opcode::v_cmp_lt_f32, bld.def(bld.lm), Operand::c32(0x40800000u), inputs[0]);
636 writeout(9, bld.sop2(aco_opcode::s_or_b64, bld.def(bld.lm), bld.def(s1, scc), src0, src1));
664 src1 = bld.vopc(aco_opcode::v_cmp_lt_f16, bld.def(bld.lm), Operand::c16(nan16), inputs[0]);
666 writeout(12, bld.sop2(aco_opcode::s_or_b64, bld.def(bld.lm), bld.def(s1, scc), src0, src1));
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/third_party/ffmpeg/libavcodec/
H A Dlagarith.c242 static void add_lag_median_prediction(uint8_t *dst, uint8_t *src1, in add_lag_median_prediction() argument
257 l = mid_pred(l, src1[i], l + src1[i] - lt) + diff[i]; in add_lag_median_prediction()
258 lt = src1[i]; in add_lag_median_prediction()
H A Drv30dsp.c64 const int src1 = src[1 *srcStride];\
73 OP(dst[0*dstStride], (-(srcA+src2) + src0*C1 + src1*C2 + 8)>>4);\
74 OP(dst[1*dstStride], (-(src0+src3) + src1*C1 + src2*C2 + 8)>>4);\
75 OP(dst[2*dstStride], (-(src1+src4) + src2*C1 + src3*C2 + 8)>>4);\
H A Dhpeldsp.c40 const uint8_t *src1, \
51 a = AV_RN32(&src1[i * src_stride1]); \
55 a = AV_RN32(&src1[i * src_stride1 + 4]); \
/third_party/ffmpeg/libavcodec/ppc/
H A Dh264qpel.c213 static inline void put_pixels16_l2_altivec( uint8_t * dst, const uint8_t * src1, in put_pixels16_l2_altivec() argument
225 a = unaligned_load(i * src_stride1, src1); in put_pixels16_l2_altivec()
253 static inline void avg_pixels16_l2_altivec( uint8_t * dst, const uint8_t * src1, in avg_pixels16_l2_altivec() argument
266 a = unaligned_load(i * src_stride1, src1); in avg_pixels16_l2_altivec()
/third_party/wpa_supplicant/wpa_supplicant-2.9/src/utils/
H A Dcommon.c734 const u8 *src1, size_t src1_len, in merge_byte_arrays()
741 if (src1) { in merge_byte_arrays()
743 os_memcpy(res, src1, res_len); in merge_byte_arrays()
747 os_memcpy(res, src1, src1_len); in merge_byte_arrays()
733 merge_byte_arrays(u8 *res, size_t res_len, const u8 *src1, size_t src1_len, const u8 *src2, size_t src2_len) merge_byte_arrays() argument
/third_party/ffmpeg/libavcodec/aarch64/
H A Dvp9mc_16bpp_neon.S119 // Extract a vector from src1-src2 and src4-src5 (src1-src3 and src4-src6
123 .macro extmlal dst1, dst2, dst3, dst4, dst5, dst6, dst7, dst8, src1, src2, src3, src4, src5, src6, offset, size
124 ext v20.16b, \src1\().16b, \src2\().16b, #(2*\offset)
386 // Evaluate the filter twice in parallel, from the inputs src1-src9 into dst1-dst2
387 // (src1-src8 into dst1, src2-src9 into dst2).
388 .macro convolve4 dst1, dst2, src1, src2, src3, src4, src5, src6, src7, src8, src9, tmp1, tmp2
389 smull \dst1\().4s, \src1\().4h, v0.h[0]
409 // Evaluate the filter twice in parallel, from the inputs src1-src9 into dst1-dst4
410 // (src1
[all...]
H A Dsbrdsp_init_aarch64.c30 void ff_sbr_qmf_deint_bfly_neon(float *v, const float *src0, const float *src1);
/third_party/ffmpeg/libavfilter/
H A Dvf_showinfo.c658 const uint16_t *src1 = (const uint16_t *)src; in update_sample_stats_16() local
663 *sum += av_bswap16(src1[i]); in update_sample_stats_16()
664 *sum2 += (uint32_t)av_bswap16(src1[i]) * (uint32_t)av_bswap16(src1[i]); in update_sample_stats_16()
666 *sum += src1[i]; in update_sample_stats_16()
667 *sum2 += (uint32_t)src1[i] * (uint32_t)src1[i]; in update_sample_stats_16()
/third_party/mesa3d/src/broadcom/compiler/
H A Dv3d_compiler.h1094 struct qreg src0, struct qreg src1);
1096 struct qreg src0, struct qreg src1);
1417 struct qreg src0, struct qreg src1)
1420 vir_MOV_dest(c, t, src1);
1448 vir_UMUL(struct v3d_compile *c, struct qreg src0, struct qreg src1)
1450 vir_MULTOP(c, src0, src1);
1451 return vir_UMUL24(c, src0, src1);
/third_party/ffmpeg/libswscale/
H A Dhscale.c173 uint8_t ** src1 = desc->src->plane[1].line; in chr_h_scale() local
187 c->hcscale_fast(c, (uint16_t*)dst1[dst_pos1+i], (uint16_t*)dst2[dst_pos2+i], dstW, src1[src_pos1+i], src2[src_pos2+i], srcW, xInc); in chr_h_scale() local
189 c->hcScale(c, (uint16_t*)dst1[dst_pos1+i], dstW, src1[src_pos1+i], instance->filter, instance->filter_pos, instance->filter_size); in chr_h_scale()
/third_party/skia/third_party/externals/libwebp/src/dsp/
H A Ddsp.h382 typedef double (*VP8SSIMGetClippedFunc)(const uint8_t* src1, int stride1,
389 // 8 rows at offset src1 and src2
390 typedef double (*VP8SSIMGetFunc)(const uint8_t* src1, int stride1,
398 typedef uint32_t (*VP8AccumulateSSEFunc)(const uint8_t* src1,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
H A DSIOptimizeExecMaskingPreRA.cpp112 auto Op = TII.getNamedOperand(MI, AMDGPU::OpName::src1); in getOrNonExecReg()
232 MachineOperand *Op2 = TII->getNamedOperand(*Cmp, AMDGPU::OpName::src1); in optimizeVcndVcmpPair()
248 Op2 = TII->getNamedOperand(*Sel, AMDGPU::OpName::src1); in optimizeVcndVcmpPair()
/third_party/skia/gm/
H A Dimage.cpp93 SkRect src1, src2, src3; in test_surface() local
94 src1.setIWH(surf->width(), surf->height()); in test_surface()
105 canvas->drawImageRect(imgR, src1, dst1, sampling, usePaint ? &paint : nullptr, in test_surface()
/foundation/arkui/ace_engine_lite/frameworks/src/core/stylemgr/
H A Dapp_style.h89 static bool MergeAnimationString(char* dest, uint16_t destSz, const char * const src1, const char * const src2);
/third_party/ffmpeg/libavcodec/arm/
H A Dsbrdsp_init_arm.c32 void ff_sbr_qmf_deint_bfly_neon(float *v, const float *src0, const float *src1);

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