| /foundation/graphic/graphic_2d/rosen/modules/render_service_base/src/platform/ohos/ |
| H A D | rs_render_service_connection_proxy.cpp | 347 pixelMap.reset(Media::PixelMap::Unmarshalling(reply)); in CreatePixelMapFromSurface()
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| /foundation/multimodalinput/input/service/connect_manager/src/ |
| H A D | multimodal_input_connect_proxy.cpp | 2254 (*newPixelMapPtr).reset(Media::PixelMap::Unmarshalling(reply)); in GetPointerSnapshot()
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| /foundation/multimodalinput/input/service/subscriber/test/ |
| H A D | key_subscriber_handler_test.cpp | 787 subscriber->keyEvent_.reset(); in HWTEST_F()
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| /foundation/distributeddatamgr/pasteboard/services/core/src/ |
| H A D | pasteboard_service.cpp | 2034 dataType.reset(); in GenerateDataType()
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| /foundation/window/window_manager/window_scene/session/host/src/ |
| H A D | session.cpp | 1242 surfaceNode.reset(); in Disconnect()
2089 TLOGI(WmsLogTag::WMS_MAIN, "reset snapshot id: %{public}d", session->GetPersistentId()); in SaveSnapshot()
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| /kernel/linux/linux-5.10/drivers/clk/qcom/ |
| H A D | gcc-sm8150.c | 13 #include <linux/reset-controller.h>
23 #include "reset.h"
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| /kernel/linux/linux-5.10/drivers/clk/tegra/ |
| H A D | clk-tegra210.c | 18 #include <dt-bindings/reset/tegra210-car.h>
278 /* Tegra CPU clock and reset control regs */
743 /* Defaults assert PLL reset, and set IDDQ */ in tegra210_pllcx_set_defaults()
3372 /* Tegra210 CPU clock and reset control functions */
3380 } while (!(reg & (1 << cpu))); /* check CPU been reset or not */ in tegra210_wait_cpu_in_reset()
3456 /* restore saved context of peripheral clocks and reset state */ in tegra210_clk_resume()
3578 * tegra210_clock_assert_dfll_dvco_reset - assert the DFLL's DVCO reset
3580 * Assert the reset line of the DFLL's DVCO. No return value.
3593 * tegra210_clock_deassert_dfll_dvco_reset - deassert the DFLL's DVCO reset
3595 * Deassert the reset lin
[all...] |
| /kernel/linux/linux-5.10/drivers/net/ethernet/intel/ixgbe/ |
| H A D | ixgbe_type.h | 2090 /* EEPROM reset Write Enable latch */
3494 s32 (*reset)(struct ixgbe_hw *); member
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| /kernel/linux/linux-5.10/drivers/net/ethernet/mediatek/ |
| H A D | mtk_eth_soc.c | 17 #include <linux/reset.h>
285 /* Assert/release MT7623 RXC reset */ in mtk_mac_config()
2437 dev_err(eth->dev, "MAC reset failed!\n"); in mtk_hw_init()
2573 dev_dbg(eth->dev, "[%s][%d] reset\n", __func__, __LINE__); in mtk_pending_work()
2610 dev_dbg(eth->dev, "[%s][%d] reset done\n", __func__, __LINE__); in mtk_pending_work()
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| /kernel/linux/linux-5.10/drivers/net/ethernet/ibm/emac/ |
| H A D | core.c | 342 DBG(dev, "reset" NL); in emac_reset()
345 /* 40x erratum suggests stopping RX channel before reset, in emac_reset()
357 * Note: The PHY must provide a TX Clk in order to perform a soft reset in emac_reset()
360 * After a soft reset, select the external clock. in emac_reset()
363 * ethernet cable is not attached. This causes the reset to timeout in emac_reset()
369 * the first reset fails. in emac_reset()
374 /* No PHY: select internal loop clock before reset */ in emac_reset()
378 /* PHY present: select external clock before reset */ in emac_reset()
400 /* No PHY: restore external clock source after reset */ in emac_reset()
411 emac_report_timeout_error(dev, "reset timeou in emac_reset()
[all...] |
| /kernel/linux/linux-5.10/drivers/media/platform/coda/ |
| H A D | coda-common.c | 29 #include <linux/reset.h>
3197 dev_err(&pdev->dev, "failed get reset control: %d\n", ret); in coda_probe()
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| /kernel/linux/linux-5.10/drivers/net/ethernet/qlogic/qlcnic/ |
| H A D | qlcnic_main.c | 47 MODULE_PARM_DESC(auto_fw_reset, "Auto firmware reset (0=disabled, 1=enabled)");
1556 /* Set the NPAR config data after FW reset */ in qlcnic_reset_npar_config()
2110 kfree(adapter->ahw->reset.buff); in qlcnic_free_adapter_resources()
2186 netdev_info(adapter->netdev, "%s: soft reset complete\n", __func__); in qlcnic_reset_hw_context()
3055 netdev_err(netdev, "Tx timeout, reset the adapter.\n"); in qlcnic_tx_timeout()
3062 netdev_err(netdev, "Tx timeout, reset adapter context.\n"); in qlcnic_tx_timeout()
3523 /* Dont ack if this instance is the reset owner */ in qlcnic_detach_work()
3735 "Device is being reset.\n"); in qlcnic_check_health()
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| /kernel/linux/linux-5.10/drivers/net/ethernet/broadcom/bnxt/ |
| H A D | bnxt_ethtool.c | 2099 netdev_info(bp->dev, "PF does not have admin privileges to flash or reset the device\n"); in bnxt_print_admin_err()
2176 /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */ in bnxt_firmware_reset()
2183 /* Self-reset ChiMP upon next PCIe reset: */ in bnxt_firmware_reset()
2189 /* Self-reset APE upon next PCIe reset: */ in bnxt_firmware_reset()
3433 netdev_info(dev, "Firmware reset request successful.\n"); in bnxt_reset()
3457 netdev_info(dev, "Reload driver to complete reset\n"); in bnxt_reset()
3960 .reset
[all...] |
| /kernel/linux/linux-5.10/drivers/phy/cadence/ |
| H A D | phy-cadence-torrent.c | 22 #include <linux/reset.h>
782 /* reset the link by asserting phy_l00_reset_n low */ in cdns_torrent_dp_set_lanes()
787 * Assert lane reset on unused lanes and lane 0 so they remain in reset in cdns_torrent_dp_set_lanes()
799 /* Wait, until PHY gets ready after releasing PHY reset signal. */ in cdns_torrent_dp_set_lanes()
982 /* take out of reset */ in cdns_torrent_dp_init()
1227 /* Set reset register values to disable SSC */ in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
1402 /* Set reset register values to disable SSC */ in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
1615 /* Take the PHY lane group out of reset */ in cdns_torrent_phy_on()
1618 /* Take the PHY out of reset */ in cdns_torrent_phy_on()
[all...] |
| /kernel/linux/linux-5.10/drivers/usb/host/ |
| H A D | oxu210hp-hcd.c | 128 #define CMD_LRESET (1<<7) /* partial reset (no ports, etc) */
133 #define CMD_RESET (1<<1) /* reset HC not bus */
185 /* 11:10 for detecting lowspeed devices (reset vs release ownership) */
187 #define PORT_RESET (1<<8) /* reset port */
801 dbg_cmd(oxu, "reset", command); in ehci_reset()
855 /* if reset finished and it's still not enabled -- handoff */ in check_reset_complete()
2595 /* reset S-frame and (maybe) C-frame masks */ in qh_schedule()
3083 /* Called during probe() after chip reset completes.
3641 /* GetPortStatus clears reset */ in oxu_hub_control()
3713 /* force reset t in oxu_hub_control()
[all...] |
| /kernel/linux/linux-5.10/drivers/usb/gadget/udc/ |
| H A D | tegra-xudc.c | 26 #include <linux/reset.h>
|
| /kernel/linux/linux-5.10/sound/pci/cs46xx/ |
| H A D | cs46xx_lib.c | 95 * 4. Read ACCTL = 460h, DCV should be reset by now and 460h = 17h in snd_cs46xx_codec_read()
122 * set RSTN - ARST# inactive, AC97 codec not reset in snd_cs46xx_codec_read()
150 * ACCTL = 460h, DCV should be reset by now and 460h = 17h in snd_cs46xx_codec_read()
235 * 4. Read ACCTL = 460h, DCV should be reset by now and 460h = 07h in snd_cs46xx_codec_write()
246 * reset CRW - Write command in snd_cs46xx_codec_write()
249 * set RSTN - ARST# inactive, AC97 codec not reset in snd_cs46xx_codec_write()
272 * ACCTL = 460h, DCV should be reset by now and 460h = 07h in snd_cs46xx_codec_write()
554 * Chip reset
562 * Write the reset bit of the SP control register. in snd_cs46xx_reset()
690 dev_err(chip->card->dev, "SPCR_RUNFR never reset\ in snd_cs46xx_proc_start()
[all...] |
| /kernel/linux/linux-6.6/drivers/net/ethernet/amd/xgbe/ |
| H A D | xgbe-phy-v2.c | 298 /* MDIO PHY reset types */
990 /* Reset PHY - wait for self-clearing reset bit to clear */ in xgbe_phy_belfuse_phy_quirks()
2139 /* Mailbox command timed out, reset of RX block is required. in xgbe_phy_rx_reset()
2140 * This can be done by asseting the reset bit and wait for in xgbe_phy_rx_reset()
2149 netif_err(pdata, link, pdata->netdev, "firmware mailbox reset performed\n"); in xgbe_phy_rx_reset()
2234 netif_dbg(pdata, link, pdata->netdev, "receiver reset complete\n"); in xgbe_phy_rrc()
2946 /* No link, attempt a receiver reset cycle */ in xgbe_phy_link_status()
3138 dev_err(pdata->dev, "unsupported MDIO reset (%#x)\n", in xgbe_phy_mdio_reset_setup()
3522 /* Check for and validate MDIO reset support */ in xgbe_phy_init()
3766 phy_impl->reset in xgbe_init_function_ptrs_phy_v2()
[all...] |
| /kernel/linux/linux-6.6/drivers/net/ethernet/broadcom/bnxt/ |
| H A D | bnxt_ethtool.c | 2181 netdev_info(bp->dev, "PF does not have admin privileges to flash or reset the device\n"); in bnxt_print_admin_err()
2266 /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */ in bnxt_firmware_reset()
2273 /* Self-reset ChiMP upon next PCIe reset: */ in bnxt_firmware_reset()
2279 /* Self-reset APE upon next PCIe reset: */ in bnxt_firmware_reset()
3812 netdev_info(dev, "Firmware reset request successful.\n"); in bnxt_reset()
3836 netdev_info(dev, "Reload driver to complete reset\n"); in bnxt_reset()
4184 .reset
[all...] |
| /kernel/linux/linux-6.6/drivers/net/ethernet/ibm/emac/ |
| H A D | core.c | 344 DBG(dev, "reset" NL); in emac_reset()
347 /* 40x erratum suggests stopping RX channel before reset, in emac_reset()
359 * Note: The PHY must provide a TX Clk in order to perform a soft reset in emac_reset()
362 * After a soft reset, select the external clock. in emac_reset()
365 * ethernet cable is not attached. This causes the reset to timeout in emac_reset()
371 * the first reset fails. in emac_reset()
376 /* No PHY: select internal loop clock before reset */ in emac_reset()
380 /* PHY present: select external clock before reset */ in emac_reset()
402 /* No PHY: restore external clock source after reset */ in emac_reset()
413 emac_report_timeout_error(dev, "reset timeou in emac_reset()
[all...] |
| /kernel/linux/linux-6.6/drivers/net/ethernet/renesas/ |
| H A D | ravb_main.c | 30 #include <linux/reset.h>
2660 "failed to get cpg reset\n"); in ravb_probe()
3018 /* If WoL is enabled set reset mode to rearm the WoL logic */ in ravb_resume()
3025 /* All register have been reset to default values. in ravb_resume()
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/qlogic/qlcnic/ |
| H A D | qlcnic_main.c | 46 MODULE_PARM_DESC(auto_fw_reset, "Auto firmware reset (0=disabled, 1=enabled)");
1552 /* Set the NPAR config data after FW reset */ in qlcnic_reset_npar_config()
2106 kfree(adapter->ahw->reset.buff); in qlcnic_free_adapter_resources()
2182 netdev_info(adapter->netdev, "%s: soft reset complete\n", __func__); in qlcnic_reset_hw_context()
3028 netdev_err(netdev, "Tx timeout, reset the adapter.\n"); in qlcnic_tx_timeout()
3035 netdev_err(netdev, "Tx timeout, reset adapter context.\n"); in qlcnic_tx_timeout()
3494 /* Dont ack if this instance is the reset owner */ in qlcnic_detach_work()
3706 "Device is being reset.\n"); in qlcnic_check_health()
|
| /kernel/linux/linux-6.6/drivers/tty/serial/ |
| H A D | sh-sci.c | 40 #include <linux/reset.h>
1690 * cleared, so we have to reset tx_dma_len accordingly, and stop any in sci_flush_buffer()
2630 * reset values could still be set, simply mask them out. in sci_set_termios()
3289 "failed to get reset ctrl\n")); in sci_parse_dt()
3293 dev_err(&pdev->dev, "failed to deassert reset %d\n", ret); in sci_parse_dt()
|
| /kernel/linux/linux-6.6/drivers/usb/gadget/udc/ |
| H A D | tegra-xudc.c | 25 #include <linux/reset.h>
|
| /kernel/linux/linux-6.6/drivers/usb/host/ |
| H A D | oxu210hp-hcd.c | 128 #define CMD_LRESET (1<<7) /* partial reset (no ports, etc) */
133 #define CMD_RESET (1<<1) /* reset HC not bus */
185 /* 11:10 for detecting lowspeed devices (reset vs release ownership) */
187 #define PORT_RESET (1<<8) /* reset port */
801 dbg_cmd(oxu, "reset", command); in ehci_reset()
855 /* if reset finished and it's still not enabled -- handoff */ in check_reset_complete()
2596 /* reset S-frame and (maybe) C-frame masks */ in qh_schedule()
3084 /* Called during probe() after chip reset completes.
3642 /* GetPortStatus clears reset */ in oxu_hub_control()
3714 /* force reset t in oxu_hub_control()
[all...] |