Lines Matching refs:reset
18 #include <dt-bindings/reset/tegra210-car.h>
278 /* Tegra CPU clock and reset control regs */
743 /* Defaults assert PLL reset, and set IDDQ */
3372 /* Tegra210 CPU clock and reset control functions */
3380 } while (!(reg & (1 << cpu))); /* check CPU been reset or not */
3456 /* restore saved context of peripheral clocks and reset state */
3578 * tegra210_clock_assert_dfll_dvco_reset - assert the DFLL's DVCO reset
3580 * Assert the reset line of the DFLL's DVCO. No return value.
3593 * tegra210_clock_deassert_dfll_dvco_reset - deassert the DFLL's DVCO reset
3595 * Deassert the reset line of the DFLL's DVCO, allowing the DVCO to