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Searched refs:reset (Results 3801 - 3825 of 3973) sorted by relevance

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/kernel/linux/linux-5.10/drivers/net/ethernet/realtek/
H A Dr8169_main.c434 PMEStatus = (1 << 0), /* PME status can be reset by PCI RST# */
1627 * reset by a power cycle, while the counter values collected by the in rtl8169_init_counter_offsets()
1628 * driver are reset at every driver unload/load cycle. in rtl8169_init_counter_offsets()
2088 /* At least one firmware doesn't reset tp->ocp_base. */ in r8169_apply_firmware()
2091 /* PHY soft reset may still be in progress */ in r8169_apply_firmware()
2703 /* work around an issue when PCI reset occurs during L2/L3 state */ in rtl_pcie_state_l2l3_disable()
4680 goto reset; in rtl_task()
4684 reset: in rtl_task()
/kernel/linux/linux-5.10/drivers/net/wireless/ath/ath10k/
H A Dwmi-tlv.c3004 u32 reset) in ath10k_wmi_tlv_op_gen_request_peer_stats_info()
3024 cmd->reset_after_request = __cpu_to_le32(reset); in ath10k_wmi_tlv_op_gen_request_peer_stats_info()
3000 ath10k_wmi_tlv_op_gen_request_peer_stats_info(struct ath10k *ar, u32 vdev_id, enum wmi_peer_stats_info_request_type type, u8 *addr, u32 reset) ath10k_wmi_tlv_op_gen_request_peer_stats_info() argument
/kernel/linux/linux-5.10/drivers/net/ethernet/dec/tulip/
H A Dde4x5.c341 Fix init_connection() to remove extra device reset.
342 Fix MAC/PHY reset ordering in dc21140m_autoconf().
345 Fix MII PHY reset problem from work done by
383 0.535 21-Feb-98 Fix Ethernet Address PROM reset bug for DC21040.
491 int reset; /* Hard reset required? */ member
502 int reset; /* Hard reset required? */ member
512 u_char *rst; /* Start of reset sequence in SROM */
853 u_char *rst; /* Pointer to Type 5 reset inf
[all...]
/kernel/linux/linux-5.10/drivers/pci/
H A Dquirks.c11 * Init/reset quirks for USB host controllers should be in the USB quirks
3626 * Some NVIDIA GPU devices do not work with bus reset, SBR needs to be
3638 * Some Atheros AR9xxx and QCA988x chips do not behave after a bus reset.
3641 * and typically causes the system to hang or reset when access is attempted.
3653 * reset when used with certain child devices. After the reset, config
3659 * Some TI KeyStone C667X devices do not support bus/hot reset. The PCIESS
3661 * the device stops working. Prevent bus reset for these devices. With
3671 * We can't do a bus reset on root bus devices, but an ineffective in quirk_no_pm_reset()
3672 * PM reset ma in quirk_no_pm_reset()
[all...]
/kernel/linux/linux-6.6/drivers/net/ethernet/realtek/
H A Dr8169_main.c428 PMEStatus = (1 << 0), /* PME status can be reset by PCI RST# */
1657 * reset by a power cycle, while the counter values collected by the in rtl8169_init_counter_offsets()
1658 * driver are reset at every driver unload/load cycle. in rtl8169_init_counter_offsets()
2174 /* At least one firmware doesn't reset tp->ocp_base. */ in r8169_apply_firmware()
2177 /* PHY soft reset may still be in progress */ in r8169_apply_firmware()
2723 /* work around an issue when PCI reset occurs during L2/L3 state */ in rtl_pcie_state_l2l3_disable()
2786 /* reset ephy tx/rx disable timer */ in rtl_hw_aspm_clkreq_enable()
4569 /* if chip isn't accessible, reset bus to revive it */ in rtl_task()
4573 netdev_err(tp->dev, "Can't reset secondary PCI bus, detach NIC\n"); in rtl_task()
4584 goto reset; in rtl_task()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v7_0.c3467 adev->gfx.rlc.funcs->reset(adev); in gfx_v7_0_rlc_resume()
4170 .reset = gfx_v7_0_rlc_reset,
4886 // XXX soft reset the gfx block only in gfx_v7_0_priv_inst_irq()
/kernel/linux/linux-6.6/drivers/net/wireless/ath/ath10k/
H A Dwmi-tlv.c3015 u32 reset) in ath10k_wmi_tlv_op_gen_request_peer_stats_info()
3035 cmd->reset_after_request = __cpu_to_le32(reset); in ath10k_wmi_tlv_op_gen_request_peer_stats_info()
3011 ath10k_wmi_tlv_op_gen_request_peer_stats_info(struct ath10k *ar, u32 vdev_id, enum wmi_peer_stats_info_request_type type, u8 *addr, u32 reset) ath10k_wmi_tlv_op_gen_request_peer_stats_info() argument
/kernel/linux/linux-6.6/drivers/net/wireless/realtek/rtw89/
H A Dcore.h2977 void (*reset)(struct rtw89_dev *rtwdev); member
4475 rtwdev->hci.ops->reset(rtwdev); in rtw89_hci_reset()
/kernel/linux/linux-6.6/drivers/pci/
H A Dquirks.c11 * Init/reset quirks for USB host controllers should be in the USB quirks
2044 * reset is performed too soon after transition to D0, extend d3hot_delay
3729 * Some NVIDIA GPU devices do not work with bus reset, SBR needs to be
3741 * Some Atheros AR9xxx and QCA988x chips do not behave after a bus reset.
3744 * and typically causes the system to hang or reset when access is attempted.
3756 * reset when used with certain child devices. After the reset, config
3762 * Some TI KeyStone C667X devices do not support bus/hot reset. The PCIESS
3764 * the device stops working. Prevent bus reset for these devices. With
3774 * We can't do a bus reset o in quirk_no_pm_reset()
[all...]
/kernel/linux/linux-6.6/tools/testing/selftests/net/
H A Dfcnal-test.sh1198 # verify TCP reset sent and received
1332 # verify TCP reset received
1378 # verify TCP reset received
2770 # verify TCP reset received
2922 # verify TCP reset received
2994 # verify TCP reset received
3945 log_test_addr ${a} $? 1 "Global server, reject with TCP-reset on Rx"
3970 log_subsection "TCP reset"
3973 run_cmd iptables -A INPUT -p tcp --dport 12345 -j REJECT --reject-with tcp-reset
4002 log_test_addr ${a} $? 1 "Global server, reject with TCP-reset o
[all...]
/kernel/linux/linux-5.10/drivers/net/ethernet/sun/
H A Dniu.c717 u32 reset; in esr_reset() local
742 err = esr_read_reset(np, &reset); in esr_reset()
745 if (reset != 0) { in esr_reset()
747 np->port, reset); in esr_reset()
1281 netdev_err(np->dev, "Port %u PHY will not reset (bmcr=%04x)\n", in bcm8704_reset()
1645 netdev_err(np->dev, "Port %u MII would not reset, bmcr[%04x]\n", in mii_reset()
5472 dev_err(np->device, "Port %u TX BMAC would not reset, BTXMAC_SW_RST[%llx]\n", in niu_reset_tx_bmac()
5577 dev_err(np->device, "Port %u RX XMAC would not reset, XRXMAC_SW_RST[%llx]\n", in niu_reset_rx_xmac()
5598 dev_err(np->device, "Port %u RX BMAC would not reset, BRXMAC_SW_RST[%llx]\n", in niu_reset_rx_bmac()
5806 /* This looks hookey but the RX MAC reset w in niu_init_mac()
[all...]
/kernel/linux/linux-5.10/drivers/scsi/
H A Dipr.c283 "9070: IOA requested reset"},
359 "8157: IOA error requiring IOA reset to recover"},
429 "FFFB: SCSI bus was reset"},
435 "FFFB: SCSI bus was reset by another initiator"},
2140 "phy reset problem",
2525 /* Tell the midlayer we had a bus reset so it will handle the UA properly */ in ipr_handle_log_data()
2673 * adapter reset.
2689 "Adapter being reset due to command timeout.\n"); in ipr_timeout()
2706 * adapter reset.
2928 /* Signal end of block transfer. Set reset aler in ipr_get_ldump_data_section()
[all...]
/kernel/linux/linux-6.6/drivers/net/ethernet/sun/
H A Dniu.c736 u32 reset; in esr_reset() local
761 err = esr_read_reset(np, &reset); in esr_reset()
764 if (reset != 0) { in esr_reset()
766 np->port, reset); in esr_reset()
1300 netdev_err(np->dev, "Port %u PHY will not reset (bmcr=%04x)\n", in bcm8704_reset()
1664 netdev_err(np->dev, "Port %u MII would not reset, bmcr[%04x]\n", in mii_reset()
5491 dev_err(np->device, "Port %u TX BMAC would not reset, BTXMAC_SW_RST[%llx]\n", in niu_reset_tx_bmac()
5596 dev_err(np->device, "Port %u RX XMAC would not reset, XRXMAC_SW_RST[%llx]\n", in niu_reset_rx_xmac()
5617 dev_err(np->device, "Port %u RX BMAC would not reset, BRXMAC_SW_RST[%llx]\n", in niu_reset_rx_bmac()
5825 /* This looks hookey but the RX MAC reset w in niu_init_mac()
[all...]
/kernel/linux/linux-5.10/drivers/net/ethernet/marvell/mvpp2/
H A Dmvpp2_main.c1941 /* Disable Legacy WRR, Disable EJP, Release from reset */ in mvpp2_defaults_set()
2569 /* Aggr TXQ no reset WA */ in mvpp2_aggr_txq_init()
4207 /* Set the GMAC & XLG MAC in reset */ in mvpp22_mode_reconfigure()
4210 /* Set the MPCS and XPCS in reset */ in mvpp22_mode_reconfigure()
4818 /* It seems we must also release the TX reset when enabling the TSU */ in mvpp2_set_ts_config()
4970 bool reset = !prog != !port->xdp_prog; in mvpp2_xdp_setup() local
4988 if (running && reset) in mvpp2_xdp_setup()
4996 if (!reset) in mvpp2_xdp_setup()
6018 /* Wait for reset to deassert */ in mvpp2_xlg_config()
6118 /* Place GMAC into reset */ in mvpp2__mac_prepare()
[all...]
/kernel/linux/linux-5.10/drivers/infiniband/hw/hns/
H A Dhns_roce_hw_v2.c953 /* When hardware reset has been completed once or more, we should stop in hns_roce_v2_cmd_hw_reseted()
956 * stage of soft reset process, we should exit with error, and then in hns_roce_v2_cmd_hw_reseted()
960 * reset process once again. in hns_roce_v2_cmd_hw_reseted()
985 /* When hardware reset is detected, we should stop sending mailbox&cmq& in hns_roce_v2_cmd_hw_resetting()
987 * exit with error. If now at HNAE3_INIT_CLIENT stage of soft reset in hns_roce_v2_cmd_hw_resetting()
991 * error to notify NIC driver to reschedule soft reset process once in hns_roce_v2_cmd_hw_resetting()
1015 /* When software reset is detected at .init_instance() function, we in hns_roce_v2_cmd_sw_resetting()
1032 unsigned long reset_stage; /* the current reset stage */ in hns_roce_v2_rst_process_cmd()
1040 /* Get information about reset from NIC driver or RoCE driver itself, in hns_roce_v2_rst_process_cmd()
1043 * reset_cnt -- The count value of completed hardware reset in hns_roce_v2_rst_process_cmd()
6277 __hns_roce_hw_v2_uninit_instance(struct hnae3_handle *handle, bool reset) __hns_roce_hw_v2_uninit_instance() argument
6336 hns_roce_hw_v2_uninit_instance(struct hnae3_handle *handle, bool reset) hns_roce_hw_v2_uninit_instance() argument
[all...]
/kernel/linux/linux-5.10/drivers/net/wireless/cisco/
H A Dairo.c2463 * Run at insmod time or after reset when the descriptors
6264 int reset = 0; in airo_set_mode() local
6268 reset = 1; in airo_set_mode()
6310 if (reset) in airo_set_mode()
8069 * Disable MAC and do soft reset on
/kernel/linux/linux-6.6/drivers/net/ethernet/ibm/
H A Dibmvnic.c109 static int ibmvnic_reset_init(struct ibmvnic_adapter *, bool reset);
673 * want to try and reuse on next reset. So don't free ltb set. in alloc_ltb_set()
791 * during reset (see init_rx_pools()), update LTB below in replenish_rx_pool()
880 * driver, triggering a reset. in replenish_rx_pool()
1576 /* Default/timeout error handling, reset and start fresh */ in ibmvnic_login()
1597 * of reset and we do not want parallel resets occurring in ibmvnic_login()
1888 /* netdev_tx_reset_queue will reset dql stats. During NON_FATAL in __ibmvnic_open()
1889 * resets, don't reset the stats because there could be batched in __ibmvnic_open()
1890 * skb's waiting to be sent. If we reset dql stats, we risk in __ibmvnic_open()
1932 /* If device failover is pending or we are about to reset, jus in ibmvnic_open()
6238 ibmvnic_reset_init(struct ibmvnic_adapter *adapter, bool reset) ibmvnic_reset_init() argument
[all...]
/kernel/linux/linux-6.6/drivers/net/ethernet/marvell/mvpp2/
H A Dmvpp2_main.c2272 /* Disable Legacy WRR, Disable EJP, Release from reset */ in mvpp2_defaults_set()
2922 /* Aggr TXQ no reset WA */ in mvpp2_aggr_txq_init()
4566 /* Set the GMAC & XLG MAC in reset */ in mvpp22_mode_reconfigure()
4569 /* Set the MPCS and XPCS in reset */ in mvpp22_mode_reconfigure()
5191 /* It seems we must also release the TX reset when enabling the TSU */ in mvpp2_set_ts_config()
5343 bool reset = !prog != !port->xdp_prog; in mvpp2_xdp_setup() local
5361 if (running && reset) in mvpp2_xdp_setup()
5369 if (!reset) in mvpp2_xdp_setup()
6353 /* Wait for reset to deassert */ in mvpp2_xlg_config()
6468 /* Place GMAC into reset */ in mvpp2_mac_prepare()
[all...]
/kernel/linux/linux-6.6/drivers/infiniband/hw/hns/
H A Dhns_roce_hw_v2.c1002 /* When hardware reset has been completed once or more, we should stop in hns_roce_v2_cmd_hw_reseted()
1005 * stage of soft reset process, we should exit with error, and then in hns_roce_v2_cmd_hw_reseted()
1009 * reset process once again. in hns_roce_v2_cmd_hw_reseted()
1034 /* When hardware reset is detected, we should stop sending mailbox&cmq& in hns_roce_v2_cmd_hw_resetting()
1036 * exit with error. If now at HNAE3_INIT_CLIENT stage of soft reset in hns_roce_v2_cmd_hw_resetting()
1040 * error to notify NIC driver to reschedule soft reset process once in hns_roce_v2_cmd_hw_resetting()
1064 /* When software reset is detected at .init_instance() function, we in hns_roce_v2_cmd_sw_resetting()
1080 unsigned long reset_stage; /* the current reset stage */ in check_aedev_reset_status()
1085 /* Get information about reset from NIC driver or RoCE driver itself, in check_aedev_reset_status()
1088 * reset_cnt -- The count value of completed hardware reset in check_aedev_reset_status()
6758 __hns_roce_hw_v2_uninit_instance(struct hnae3_handle *handle, bool reset) __hns_roce_hw_v2_uninit_instance() argument
6822 hns_roce_hw_v2_uninit_instance(struct hnae3_handle *handle, bool reset) hns_roce_hw_v2_uninit_instance() argument
[all...]
/kernel/linux/linux-6.6/drivers/net/wireless/cisco/
H A Dairo.c2459 * Run at insmod time or after reset when the descriptors
6275 int reset = 0; in airo_set_mode() local
6279 reset = 1; in airo_set_mode()
6321 if (reset) in airo_set_mode()
8071 * Disable MAC and do soft reset on
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
H A Dintel_display.c4718 /* Ensure the port clock defaults are reset when retrying. */ in intel_modeset_pipe_config()
6885 prepare_to_wait(bit_waitqueue(&to_gt(dev_priv)->reset.flags, in intel_atomic_commit_fence_wait()
6891 test_bit(I915_RESET_MODESET, &to_gt(dev_priv)->reset.flags)) in intel_atomic_commit_fence_wait()
6897 finish_wait(bit_waitqueue(&to_gt(dev_priv)->reset.flags, in intel_atomic_commit_fence_wait()
7134 * cleanup. So copy and reset the dsb structure to sync with in intel_atomic_commit_tail()
/kernel/linux/linux-5.10/drivers/dma/xilinx/
H A Dxilinx_dma.c1189 /* For AXI DMA resetting once channel will reset the in xilinx_dma_alloc_chan_resources()
1703 /* Wait for the hardware to finish reset */ in xilinx_dma_reset()
1709 dev_err(chan->dev, "reset timeout, cr %x, sr %x\n", in xilinx_dma_reset()
1959 * If reset fails, need to hard reset the system. in xilinx_dma_tx_submit()
2487 if (cfg->reset) in xilinx_vdma_channel_set_config()
/kernel/linux/linux-5.10/drivers/bus/
H A Dti-sysc.c16 #include <linux/reset.h>
119 * @pre_reset_quirk: module specific pre-reset quirk
120 * @post_reset_quirk: module specific post-reset quirk
121 * @reset_done_quirk: module specific reset done quirk
289 /* Poll on reset status */
625 * sysc_init_resets - init rstctrl reset line if configured
1065 * Some modules like DSS reset automatically on idle. Enable optional in sysc_enable_module()
1066 * reset clocks and wait for OCP softreset to complete. in sysc_enable_module()
1078 * Some modules like i2c and hdq1w have unusable reset status unless in sysc_enable_module()
1079 * the module reset quir in sysc_enable_module()
[all...]
/kernel/linux/linux-5.10/drivers/clk/qcom/
H A Dgcc-sdm845.c15 #include <linux/reset-controller.h>
26 #include "reset.h"
H A Dgcc-msm8998.c15 #include <linux/reset-controller.h>
25 #include "reset.h"

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