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/kernel/linux/linux-5.10/drivers/gpu/drm/sun4i/
H A Dsun4i_backend.h16 #include <linux/reset.h>
173 struct reset_control *reset; member
/kernel/linux/linux-5.10/drivers/reset/hisilicon/
H A Dhi6220_reset.c3 * Hisilicon Hi6220 reset controller driver
19 #include <linux/reset-controller.h>
20 #include <linux/reset.h>
134 * the clocks and deasserting reset, to avoid glitches. in hi6220_ao_deassert()
171 dev_err(dev, "failed to get reset controller regmap\n"); in hi6220_reset_probe()
211 .name = "reset-hi6220",
/kernel/linux/linux-5.10/drivers/reset/
H A Dreset-lpc18xx.c16 #include <linux/reset-controller.h>
27 /* Internal reset outputs */
60 * two reset lines going to the internal Cortex-M0 cores.
102 /* Only M0 cores require explicit reset deassert */
133 .reset = lpc18xx_rgu_reset,
225 .name = "lpc18xx-reset",
/kernel/linux/linux-6.6/drivers/mmc/host/
H A Dsdhci_f_sdh30.c18 #include <linux/reset.h>
99 .reset = sdhci_f_sdh30_reset,
/kernel/linux/linux-6.6/drivers/net/ethernet/microsoft/mana/
H A Dshm_channel.c68 static int mana_smc_poll_register(void __iomem *base, bool reset) in mana_smc_poll_register() argument
81 /* shmem reads as 0xFFFFFFFF in the reset case */ in mana_smc_poll_register()
82 if (reset && last_dword == SHMEM_VF_RESET_STATE) in mana_smc_poll_register()
/kernel/linux/linux-6.6/drivers/net/ethernet/apm/xgene/
H A Dxgene_enet_main.h143 void (*reset)(struct xgene_enet_pdata *pdata); member
160 int (*reset)(struct xgene_enet_pdata *pdata); member
/kernel/linux/linux-6.6/include/linux/pds/
H A Dpds_core_if.h166 * struct pds_core_dev_reset_cmd - Device reset command
457 struct pds_core_dev_reset_cmd reset; member
474 struct pds_core_dev_reset_comp reset; member
/kernel/linux/linux-6.6/drivers/reset/hisilicon/
H A Dhi6220_reset.c3 * Hisilicon Hi6220 reset controller driver
18 #include <linux/reset-controller.h>
19 #include <linux/reset.h>
133 * the clocks and deasserting reset, to avoid glitches. in hi6220_ao_deassert()
170 dev_err(dev, "failed to get reset controller regmap\n"); in hi6220_reset_probe()
210 .name = "reset-hi6220",
/kernel/linux/linux-6.6/drivers/reset/
H A Dreset-lpc18xx.c16 #include <linux/reset-controller.h>
27 /* Internal reset outputs */
60 * two reset lines going to the internal Cortex-M0 cores.
102 /* Only M0 cores require explicit reset deassert */
133 .reset = lpc18xx_rgu_reset,
221 .name = "lpc18xx-reset",
/kernel/linux/linux-6.6/drivers/clk/mediatek/
H A Dreset.c13 #include "reset.h"
92 .reset = mtk_reset,
98 .reset = mtk_reset_set_clr,
122 pr_err("mtk clock reset desc is NULL\n"); in mtk_register_reset_controller()
134 pr_err("Unknown reset version %d\n", desc->version); in mtk_register_reset_controller()
164 pr_err("could not register reset controller: %d\n", ret); in mtk_register_reset_controller()
182 dev_err(dev, "mtk clock reset desc is NULL\n"); in mtk_register_reset_controller_with_dev()
194 dev_err(dev, "Unknown reset version %d\n", desc->version); in mtk_register_reset_controller_with_dev()
225 dev_err(dev, "could not register reset controller: %d\n", ret); in mtk_register_reset_controller_with_dev()
/kernel/linux/linux-6.6/drivers/clk/meson/
H A Dgxbb-aoclk.c15 #include <dt-bindings/reset/gxbb-aoclkc.h>
277 .reset = gxbb_aoclk_reset,
/kernel/linux/linux-6.6/drivers/crypto/allwinner/sun4i-ss/
H A Dsun4i-ss.h20 #include <linux/reset.h>
148 struct reset_control *reset; member
/kernel/linux/linux-6.6/drivers/crypto/starfive/
H A Djh7110-cryp.h77 u32 reset :1; member
108 u32 reset :1; member
/kernel/linux/linux-6.6/drivers/net/wireless/ath/ath9k/
H A Ddebug.h30 #define RESET_STAT_INC(sc, type) do { (sc)->debug.stats.reset[type]++; } while (0)
246 u32 reset[__RESET_TYPE_MAX]; member
/kernel/linux/linux-6.6/drivers/net/wireless/mediatek/mt76/mt76x0/
H A Dinit.c44 void mt76x0_chip_onoff(struct mt76x02_dev *dev, bool enable, bool reset) in mt76x0_chip_onoff() argument
50 if (reset) { in mt76x0_chip_onoff()
117 /* Release BBP and MAC reset MAC_SYS_CTRL[1:0] = 0x0 */ in mt76x0_init_mac_registers()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/
H A Dintel_engine_pm.c81 ce->ops->reset(ce); in __engine_unpark()
83 CE_TRACE(ce, "reset { seqno:%x, *hwsp:%x, ring:%x }\n", in __engine_unpark()
213 /* Context switch failed, hope for the best! Maybe reset? */ in switch_to_kernel_context()
281 /* Must be reset upon idling, or we may miss the busy wakeup. */ in __engine_park()
308 * @engine: The engine whose pinned contexts we want to reset.
319 /* kernel context gets reset at __engine_unpark() */ in intel_engine_reset_pinned_contexts()
324 ce->ops->reset(ce); in intel_engine_reset_pinned_contexts()
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/
H A Dbase.c43 if (gpio->func->reset) in nvkm_gpio_reset()
44 gpio->func->reset(gpio, func); in nvkm_gpio_reset()
/kernel/linux/linux-6.6/drivers/hid/
H A Dhid-picolcd.h148 struct hid_report *reset);
164 struct hid_report *reset) in picolcd_init_devfs()
161 picolcd_init_devfs(struct picolcd_data *data, struct hid_report *eeprom_r, struct hid_report *eeprom_w, struct hid_report *flash_r, struct hid_report *flash_w, struct hid_report *reset) picolcd_init_devfs() argument
/kernel/linux/linux-6.6/drivers/gpu/drm/sun4i/
H A Dsun4i_backend.h16 #include <linux/reset.h>
173 struct reset_control *reset; member
/kernel/linux/linux-6.6/net/netfilter/
H A Dnft_objref.c53 const struct nft_expr *expr, bool reset) in nft_objref_dump()
162 const struct nft_expr *expr, bool reset) in nft_objref_map_dump()
52 nft_objref_dump(struct sk_buff *skb, const struct nft_expr *expr, bool reset) nft_objref_dump() argument
161 nft_objref_map_dump(struct sk_buff *skb, const struct nft_expr *expr, bool reset) nft_objref_map_dump() argument
H A Dnft_queue.c156 const struct nft_expr *expr, bool reset) in nft_queue_dump()
173 const struct nft_expr *expr, bool reset) in nft_queue_sreg_dump()
155 nft_queue_dump(struct sk_buff *skb, const struct nft_expr *expr, bool reset) nft_queue_dump() argument
172 nft_queue_sreg_dump(struct sk_buff *skb, const struct nft_expr *expr, bool reset) nft_queue_sreg_dump() argument
H A Dnft_fwd_netdev.c60 const struct nft_expr *expr, bool reset) in nft_fwd_netdev_dump()
191 const struct nft_expr *expr, bool reset) in nft_fwd_neigh_dump()
59 nft_fwd_netdev_dump(struct sk_buff *skb, const struct nft_expr *expr, bool reset) nft_fwd_netdev_dump() argument
190 nft_fwd_neigh_dump(struct sk_buff *skb, const struct nft_expr *expr, bool reset) nft_fwd_neigh_dump() argument
H A Dnft_numgen.c116 const struct nft_expr *expr, bool reset) in nft_ng_inc_dump()
173 const struct nft_expr *expr, bool reset) in nft_ng_random_dump()
115 nft_ng_inc_dump(struct sk_buff *skb, const struct nft_expr *expr, bool reset) nft_ng_inc_dump() argument
172 nft_ng_random_dump(struct sk_buff *skb, const struct nft_expr *expr, bool reset) nft_ng_random_dump() argument
/kernel/linux/linux-6.6/tools/testing/selftests/firmware/
H A Dfw_filesystem.sh5 # we reset the custom load directory to a location the user helper doesn't
118 if [ ! -f $DIR/reset ]; then
132 echo 1 > $DIR/reset
481 # a hung task, which would require a hard reset.
/third_party/gn/src/gn/
H A Dexec_process.cc265 out_write.reset();
266 err_write.reset();

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