Home
last modified time | relevance | path

Searched refs:reg2 (Results 51 - 75 of 92) sorted by relevance

1234

/third_party/mesa3d/src/panfrost/bifrost/
H A Dbifrost.h229 unsigned reg2 : 6; member
H A Dbi_pack.c267 s.reg2 = regs.slot[2]; in bi_pack_registers()
/third_party/node/deps/v8/src/baseline/arm64/
H A Dbaseline-assembler-arm64-inl.h401 static void Pop(BaselineAssembler* basm, Register reg1, Register reg2, in Pop()
403 basm->masm()->Pop(reg1, reg2); in Pop()
/third_party/ltp/tools/sparse/sparse-src/
H A Dcompile-i386.c1233 struct storage *reg1, *reg2; in emit_compare() local
1268 reg2 = get_reg_value(left, get_regclass(expr->left)); in emit_compare()
1271 insn(opbits("cmp", right_bits), right, reg2, NULL); in emit_compare()
1272 put_reg(reg2); in emit_compare()
/third_party/node/deps/v8/src/codegen/loong64/
H A Dassembler-loong64.h1095 void Include(const Register& reg1, const Register& reg2 = no_reg) { in Include()
1096 RegList list({reg1, reg2}); in Include()
1099 void Exclude(const Register& reg1, const Register& reg2 = no_reg) { in Exclude()
1100 RegList list({reg1, reg2}); in Exclude()
H A Dmacro-assembler-loong64.cc2850 void MacroAssembler::Swap(Register reg1, Register reg2, Register scratch) { in CallRecordWriteStub() argument
2852 Xor(reg1, reg1, Operand(reg2)); in CallRecordWriteStub()
2853 Xor(reg2, reg2, Operand(reg1)); in CallRecordWriteStub()
2854 Xor(reg1, reg1, Operand(reg2)); in CallRecordWriteStub()
2857 mov(reg1, reg2); in CallRecordWriteStub()
2858 mov(reg2, scratch); in CallRecordWriteStub()
4061 Register GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3, in CallRecordWriteStub() argument
4064 RegList regs = {reg1, reg2, reg3, reg4, reg5, reg6}; in CallRecordWriteStub()
H A Dmacro-assembler-loong64.h46 Register GetRegisterThatIsNotOneOf(Register reg1, Register reg2 = no_reg,
812 void Swap(Register reg1, Register reg2, Register scratch = no_reg);
/third_party/pcre2/pcre2/src/sljit/
H A DsljitNativeS390X.c3596 sljit_ins ins, reg1, reg2, base, offs = 0; in sljit_emit_mem() local
3608 reg2 = gpr(REG_PAIR_SECOND(reg)); in sljit_emit_mem()
3617 } else if (!(type & SLJIT_MEM_STORE) && (base == reg1 || base == reg2) && (offs == reg1 || offs == reg2)) { in sljit_emit_mem()
3624 } else if (memw < -0x80000 || memw > 0x7ffff - ((reg2 == reg1 + 1) ? 0 : SSIZE_OF(sw))) { in sljit_emit_mem()
3635 if (offs == 0 && reg2 == (reg1 + 1)) { in sljit_emit_mem()
3637 return push_inst(compiler, ins | R36A(reg1) | R32A(reg2) | R28A(base) | disp_s20((sljit_s32)memw)); in sljit_emit_mem()
3643 FAIL_IF(push_inst(compiler, ins | R36A(reg2) | disp_s20((sljit_s32)memw + SSIZE_OF(sw)))); in sljit_emit_mem()
3648 return push_inst(compiler, ins | R36A(reg2) | disp_s20((sljit_s32)memw + SSIZE_OF(sw))); in sljit_emit_mem()
H A DsljitNativeARM_T2_32.c72 #define IS_2_LO_REGS(reg1, reg2) \
73 (reg_map[reg1] <= 7 && reg_map[reg2] <= 7)
74 #define IS_3_LO_REGS(reg1, reg2, reg3) \
75 (reg_map[reg1] <= 7 && reg_map[reg2] <= 7 && reg_map[reg3] <= 7)
/third_party/node/deps/v8/src/codegen/arm64/
H A Dassembler-arm64.cc224 bool AreAliased(const CPURegister& reg1, const CPURegister& reg2, in AreAliased() argument
234 const CPURegister regs[] = {reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8}; in AreAliased()
260 bool AreSameSizeAndType(const CPURegister& reg1, const CPURegister& reg2, in AreSameSizeAndType() argument
266 match &= !reg2.is_valid() || reg2.IsSameSizeAndType(reg1); in AreSameSizeAndType()
276 bool AreSameFormat(const VRegister& reg1, const VRegister& reg2, in AreSameFormat() argument
279 return (!reg2.is_valid() || reg2.IsSameFormat(reg1)) && in AreSameFormat()
284 bool AreConsecutive(const VRegister& reg1, const VRegister& reg2, in AreConsecutive() argument
287 if (!reg2 in AreConsecutive()
[all...]
H A Dmacro-assembler-arm64.h2178 void Include(const Register& reg1, const Register& reg2 = NoReg) { in Include()
2179 CPURegList list(reg1, reg2); in Include()
2182 void Exclude(const Register& reg1, const Register& reg2 = NoReg) { in Exclude()
2183 CPURegList list(reg1, reg2); in Exclude()
/third_party/node/deps/v8/src/codegen/riscv64/
H A Dassembler-riscv64.h1800 void Include(const Register& reg1, const Register& reg2 = no_reg) { in Include()
1801 RegList list({reg1, reg2}); in Include()
1804 void Exclude(const Register& reg1, const Register& reg2 = no_reg) { in Exclude()
1805 RegList list({reg1, reg2}); in Exclude()
H A Dmacro-assembler-riscv64.cc3521 void MacroAssembler::Swap(Register reg1, Register reg2, Register scratch) { in Swap() argument
3523 Xor(reg1, reg1, Operand(reg2)); in Swap()
3524 Xor(reg2, reg2, Operand(reg1)); in Swap()
3525 Xor(reg1, reg1, Operand(reg2)); in Swap()
3528 Mv(reg1, reg2); in Swap()
3529 Mv(reg2, scratch); in Swap()
4952 Register GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3, in GetRegisterThatIsNotOneOf() argument
4955 RegList regs = {reg1, reg2, reg3, reg4, reg5, reg6}; in GetRegisterThatIsNotOneOf()
H A Dmacro-assembler-riscv64.h60 Register GetRegisterThatIsNotOneOf(Register reg1, Register reg2 = no_reg,
1060 void Swap(Register reg1, Register reg2, Register scratch = no_reg);
/third_party/ffmpeg/libavcodec/loongarch/
H A Dvc1dsp_lasx.c144 __m256i reg0, reg1, reg2, reg3; in ff_vc1_inv_trans_8x8_dc_lasx() local
161 const_dc, temp3, const_dc, reg0, reg1, reg2, reg3); in ff_vc1_inv_trans_8x8_dc_lasx()
162 DUP2_ARG3(__lasx_xvssrarni_bu_h, reg1, reg0, 0, reg3, reg2, 0, in ff_vc1_inv_trans_8x8_dc_lasx()
/drivers/hdf_core/framework/model/audio/core/src/
H A Daudio_parse.c254 group->regEnumCfgItem[index].reg2 = buf[step + AUDIO_ENUM_REG_CFG_RREG_INDEX]; in ParseAudioEnumRegItem()
/third_party/node/deps/v8/src/codegen/mips64/
H A Dmacro-assembler-mips64.cc4657 void MacroAssembler::Swap(Register reg1, Register reg2, Register scratch) { in CallRecordWriteStub() argument
4659 Xor(reg1, reg1, Operand(reg2)); in CallRecordWriteStub()
4660 Xor(reg2, reg2, Operand(reg1)); in CallRecordWriteStub()
4661 Xor(reg1, reg1, Operand(reg2)); in CallRecordWriteStub()
4664 mov(reg1, reg2); in CallRecordWriteStub()
4665 mov(reg2, scratch); in CallRecordWriteStub()
6073 Register GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3, in CallRecordWriteStub() argument
6076 RegList regs = {reg1, reg2, reg3, reg4, reg5, reg6}; in CallRecordWriteStub()
H A Dassembler-mips64.h1937 void Include(const Register& reg1, const Register& reg2 = no_reg) { in Include()
1938 RegList list({reg1, reg2}); in Include()
1941 void Exclude(const Register& reg1, const Register& reg2 = no_reg) { in Exclude()
1942 RegList list({reg1, reg2}); in Exclude()
H A Dmacro-assembler-mips64.h61 Register GetRegisterThatIsNotOneOf(Register reg1, Register reg2 = no_reg,
984 void Swap(Register reg1, Register reg2, Register scratch = no_reg);
/third_party/node/deps/v8/src/codegen/mips/
H A Dmacro-assembler-mips.cc4133 void MacroAssembler::Swap(Register reg1, Register reg2, Register scratch) { in CallRecordWriteStub() argument
4135 Xor(reg1, reg1, Operand(reg2)); in CallRecordWriteStub()
4136 Xor(reg2, reg2, Operand(reg1)); in CallRecordWriteStub()
4137 Xor(reg1, reg1, Operand(reg2)); in CallRecordWriteStub()
4140 mov(reg1, reg2); in CallRecordWriteStub()
4141 mov(reg2, scratch); in CallRecordWriteStub()
5530 Register GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3, in CallRecordWriteStub() argument
5533 RegList regs = {reg1, reg2, reg3, reg4, reg5, reg6}; in CallRecordWriteStub()
H A Dassembler-mips.h1907 void Include(const Register& reg1, const Register& reg2 = no_reg) { in Include()
1908 RegList list({reg1, reg2}); in Include()
1911 void Exclude(const Register& reg1, const Register& reg2 = no_reg) { in Exclude()
1912 RegList list({reg1, reg2}); in Exclude()
H A Dmacro-assembler-mips.h51 Register GetRegisterThatIsNotOneOf(Register reg1, Register reg2 = no_reg,
932 void Swap(Register reg1, Register reg2, Register scratch = no_reg);
/third_party/backends/backend/genesys/
H A Dgl841.cpp407 dev->interface->write_fe_register(0x06, dev->frontend.reg2[0]); in set_fe()
408 dev->interface->write_fe_register(0x08, dev->frontend.reg2[1]); in set_fe()
409 dev->interface->write_fe_register(0x09, dev->frontend.reg2[2]); in set_fe()
/third_party/ffmpeg/libavcodec/x86/
H A Dxvididct.asm188 ;row1, row2, reg1, reg2, clear1, arg1, clear2, arg2
H A Dh264_idct.asm770 %macro STORE_DIFFx2 8 ; add1, add2, reg1, reg2, zero, shift, source, stride

Completed in 78 milliseconds

1234