| /kernel/linux/linux-6.6/drivers/mtd/nand/raw/atmel/ |
| H A D | nand-controller.c | 574 const struct nand_op_instr *instr) in atmel_smc_nand_exec_instr()
580 switch (instr->type) { in atmel_smc_nand_exec_instr()
582 writeb(instr->ctx.cmd.opcode, in atmel_smc_nand_exec_instr()
586 for (i = 0; i < instr->ctx.addr.naddrs; i++) in atmel_smc_nand_exec_instr()
587 writeb(instr->ctx.addr.addrs[i], in atmel_smc_nand_exec_instr()
591 atmel_nand_data_in(nand, instr->ctx.data.buf.in, in atmel_smc_nand_exec_instr()
592 instr->ctx.data.len, in atmel_smc_nand_exec_instr()
593 instr->ctx.data.force_8bit); in atmel_smc_nand_exec_instr()
596 atmel_nand_data_out(nand, instr->ctx.data.buf.out, in atmel_smc_nand_exec_instr()
597 instr in atmel_smc_nand_exec_instr()
573 atmel_smc_nand_exec_instr(struct atmel_nand *nand, const struct nand_op_instr *instr) atmel_smc_nand_exec_instr() argument
643 const struct nand_op_instr *instr = &subop->instrs[i]; atmel_hsmc_exec_cmd_addr() local
663 const struct nand_op_instr *instr = subop->instrs; atmel_hsmc_exec_rw() local
681 const struct nand_op_instr *instr = subop->instrs; atmel_hsmc_exec_waitrdy() local
[all...] |
| /kernel/linux/linux-6.6/arch/arm64/kvm/ |
| H A D | trace_arm.h | 119 TP_PROTO(unsigned long vcpu_pc, unsigned long instr,
121 TP_ARGS(vcpu_pc, instr, cpsr),
125 __field( unsigned long, instr )
131 __entry->instr = instr;
135 TP_printk("Emulate MMIO at: 0x%016lx (instr: %08lx, cpsr: %08lx)",
136 __entry->vcpu_pc, __entry->instr, __entry->cpsr)
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/netronome/nfp/ |
| H A D | nfp_asm.h | 91 u16 br_get_offset(u64 instr);
92 void br_set_offset(u64 *instr, u16 offset);
93 void br_add_offset(u64 *instr, u16 offset);
135 u16 immed_get_value(u64 instr);
136 void immed_set_value(u64 *instr, u16 immed);
137 void immed_add_value(u64 *instr, u16 offset);
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/netronome/nfp/ |
| H A D | nfp_asm.h | 91 u16 br_get_offset(u64 instr);
92 void br_set_offset(u64 *instr, u16 offset);
93 void br_add_offset(u64 *instr, u16 offset);
135 u16 immed_get_value(u64 instr);
136 void immed_set_value(u64 *instr, u16 immed);
137 void immed_add_value(u64 *instr, u16 offset);
|
| /third_party/mesa3d/src/compiler/nir/ |
| H A D | nir_builtin_builder.c | 336 b->cursor = nir_before_instr(&tex->instr); in nir_get_texture_size()
378 nir_ssa_dest_init(&txs->instr, &txs->dest, in nir_get_texture_size()
380 nir_builder_instr_insert(b, &txs->instr); in nir_get_texture_size()
388 b->cursor = nir_before_instr(&tex->instr); in nir_get_texture_lod()
430 nir_ssa_dest_init(&tql->instr, &tql->dest, 2, 32, NULL); in nir_get_texture_lod()
431 nir_builder_instr_insert(b, &tql->instr); in nir_get_texture_lod()
|
| /third_party/mesa3d/src/broadcom/compiler/ |
| H A D | v3d_nir_lower_logic_ops.c | 340 nir_instr_remove(&intr->instr); in v3d_nir_lower_logic_op_instr()
345 nir_instr_rewrite_src(&intr->instr, &intr->src[0], in v3d_nir_lower_logic_op_instr()
356 nir_foreach_instr_safe(instr, block) { in v3d_nir_lower_logic_ops_block()
357 if (instr->type != nir_instr_type_intrinsic) in v3d_nir_lower_logic_ops_block()
360 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); in v3d_nir_lower_logic_ops_block()
393 b.cursor = nir_before_instr(&intr->instr); in v3d_nir_lower_logic_ops_block()
|
| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | constants-arm.h | 33 inline int DecodeConstantPoolLength(int instr) { in DecodeConstantPoolLength() argument
34 DCHECK_EQ(instr & kConstantPoolMarkerMask, kConstantPoolMarker); in DecodeConstantPoolLength()
35 return ((instr >> 4) & 0xfff0) | (instr & 0xf); in DecodeConstantPoolLength()
412 // Instruction* instr = Instruction::At(ptr);
413 // int type = instr->TypeValue();
414 // return ((type == 0) || (type == 1)) && instr->HasS();
430 static inline return_type Name(Instr instr) { \
431 char* temp = reinterpret_cast<char*>(&instr); \
468 // e.g. if instr i
[all...] |
| /third_party/node/deps/v8/src/compiler/ |
| H A D | graph-visualizer.cc | 1214 const Instruction* instr = i_json.instr_; in operator <<() local
1218 os << "\"opcode\": \"" << ArchOpcodeField::decode(instr->opcode()) << "\","; in operator <<()
1220 FlagsMode fm = FlagsModeField::decode(instr->opcode()); in operator <<()
1221 AddressingMode am = AddressingModeField::decode(instr->opcode()); in operator <<()
1223 os << " : " << AddressingModeField::decode(instr->opcode()); in operator <<()
1227 << FlagsConditionField::decode(instr->opcode()); in operator <<()
1236 const ParallelMove* pm = instr->parallel_moves()[i]; in operator <<()
1259 for (size_t i = 0; i < instr->OutputCount(); i++) { in operator <<()
1262 os << InstructionOperandAsJSON{instr->OutputAt(i), i_json.code_}; in operator <<()
1268 for (size_t i = 0; i < instr in operator <<()
[all...] |
| /kernel/linux/linux-5.10/tools/objtool/ |
| H A D | check.h | 19 s8 instr; member
53 s8 instr; member
|
| /kernel/linux/linux-6.6/tools/objtool/include/objtool/ |
| H A D | check.h | 19 s8 instr; member
53 s8 instr; member
|
| /third_party/mesa3d/src/gallium/drivers/r600/sfn/ |
| H A D | sfn_debug.h | 54 instr = 1 << 0, enumerator
103 SfnLog& operator << (nir_instr& instr);
|
| H A D | sfn_instr_alu.cpp | 373 /* can't have two differen't indirect addresses in the same instr */ in replace_source()
649 sfn_log << SfnLog::instr << "Split " << *this << "\n"; in split()
681 auto instr = new AluInstr(m_opcode, dst, src, {}, 1); in split() local
682 instr->set_blockid(block_id(), index()); in split()
686 instr->set_alu_flag(alu_src0_neg); in split()
688 instr->set_alu_flag(alu_src1_neg); in split()
690 instr->set_alu_flag(alu_src2_neg); in split()
692 instr->set_alu_flag(alu_src0_abs); in split()
694 instr->set_alu_flag(alu_src1_abs); in split()
697 instr in split()
703 sfn_log << SfnLog::instr << " " << *instr << "\\n"; split() local
1070 visit(AluGroup *instr) visit() argument
1078 visit(Block *instr) visit() argument
1084 visit(IfInstr *instr) visit() argument
2157 emit_create_vec(const nir_alu_instr& instr, unsigned nc, Shader& shader) emit_create_vec() argument
[all...] |
| /third_party/node/deps/v8/src/debug/wasm/gdb-server/ |
| H A D | gdb-remote-util.cc | 57 std::vector<std::string> StringSplit(const string& instr, const char* delim) { in StringSplit() argument
60 const char* in = instr.data(); in StringSplit()
|
| /third_party/skia/third_party/externals/spirv-cross/ |
| H A D | spirv_parser.hpp | 50 void parse(const Instruction &instr);
51 const uint32_t *stream(const Instruction &instr) const;
|
| /third_party/node/deps/v8/src/execution/mips/ |
| H A D | simulator-mips.cc | 58 void Stop(Instruction* instr);
91 void MipsDebugger::Stop(Instruction* instr) { in Stop() argument
93 uint32_t code = instr->Bits(25, 6); in Stop()
369 Instruction* instr = reinterpret_cast<Instruction*>(sim_->get_pc()); in Debug() local
370 if (!(instr->IsTrap()) || in Debug()
371 instr->InstructionBits() == rtCallRedirInstr) { in Debug()
836 Instruction* instr) { in CheckICache()
837 intptr_t address = reinterpret_cast<intptr_t>(instr); in CheckICache()
847 CHECK_EQ(0, memcmp(reinterpret_cast<void*>(instr), in CheckICache()
1936 int Simulator::ReadW(int32_t addr, Instruction* instr, TraceTyp argument
835 CheckICache(base::CustomMatcherHashMap* i_cache, Instruction* instr) CheckICache() argument
1966 WriteW(int32_t addr, int value, Instruction* instr) WriteW() argument
1989 WriteConditionalW(int32_t addr, int32_t value, Instruction* instr, int32_t rt_reg) WriteConditionalW() argument
2020 ReadD(int32_t addr, Instruction* instr) ReadD() argument
2031 WriteD(int32_t addr, double value, Instruction* instr) WriteD() argument
2045 ReadHU(int32_t addr, Instruction* instr) ReadHU() argument
2057 ReadH(int32_t addr, Instruction* instr) ReadH() argument
2069 WriteH(int32_t addr, uint16_t value, Instruction* instr) WriteH() argument
2084 WriteH(int32_t addr, int16_t value, Instruction* instr) WriteH() argument
2132 ReadMem(int32_t addr, Instruction* instr) ReadMem() argument
2147 WriteMem(int32_t addr, T value, Instruction* instr) WriteMem() argument
2178 Format(Instruction* instr, const char* format) Format() argument
2476 HandleStop(uint32_t code, Instruction* instr) HandleStop() argument
2485 IsStopInstruction(Instruction* instr) IsStopInstruction() argument
[all...] |
| /kernel/linux/linux-5.10/arch/arm64/kernel/ |
| H A D | traps.c | 287 u32 instr; in user_insn_read() local
295 instr = le16_to_cpu(instr_le); in user_insn_read()
296 if (aarch32_insn_is_wide(instr)) { in user_insn_read()
302 instr = (instr << 16) | instr2; in user_insn_read()
309 instr = le32_to_cpu(instr_le); in user_insn_read()
312 *insnp = instr; in user_insn_read()
|
| /third_party/mesa3d/src/compiler/isaspec/ |
| H A D | decode.c | 717 bitmask_t instr = { 0 }; in decode() local
719 next_instruction(&instr, &instrs[state->n * BITMASK_WORDS]); in decode()
730 state->n, instr.bitset); in decode()
736 state->options->instr_cb(state->options->cbdata, state->n, instr.bitset); in decode()
739 const struct isa_bitset *b = find_bitset(state, __instruction, instr); in decode()
741 print(state, "no match: %"BITSET_FORMAT"\n", BITSET_VALUE(instr.bitset)); in decode()
746 struct decode_scope *scope = push_scope(state, b, instr); in decode()
|
| /third_party/mesa3d/src/imagination/rogue/ |
| H A D | rogue_encode.c | 767 * \param[in] instr The instruction to be encoded.
771 bool rogue_encode_instr(const struct rogue_instr *instr, FILE *fp) in rogue_encode_instr() argument
777 ASSERT_OPCODE_RANGE(instr->opcode); in rogue_encode_instr()
779 instr_encoding = &instr_encodings[instr->opcode]; in rogue_encode_instr()
793 CHECKF(rogue_encode_flag(!!(instr->flags & flag), in rogue_encode_instr()
806 CHECKF(rogue_encode_operand(&instr->operands[operand_index], in rogue_encode_instr()
838 foreach_instr (instr, &shader->instr_list) in rogue_encode_shader()
839 CHECKF(rogue_encode_instr(instr, fp), "Failed to encode instruction."); in rogue_encode_shader()
|
| /third_party/mesa3d/src/panfrost/util/ |
| H A D | pan_lower_framebuffer.c | 550 nir_ssa_def_rewrite_uses_after(&intr->dest.ssa, unpacked, &intr->instr); in pan_lower_fb_load()
564 nir_foreach_instr_safe(instr, block) { in pan_lower_framebuffer()
565 if (instr->type != nir_instr_type_intrinsic) in pan_lower_framebuffer()
568 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); in pan_lower_framebuffer()
608 b.cursor = nir_before_instr(instr); in pan_lower_framebuffer()
611 b.cursor = nir_after_instr(instr); in pan_lower_framebuffer()
615 nir_instr_remove(instr); in pan_lower_framebuffer()
|
| /kernel/linux/linux-5.10/arch/arm64/include/asm/ |
| H A D | uaccess.h | 256 #define __get_user_asm(instr, alt_instr, reg, x, addr, err, feature) \
258 "1:"ALTERNATIVE(instr " " reg "1, [%2]\n", \
321 #define __put_user_asm(instr, alt_instr, reg, x, addr, err, feature) \
323 "1:"ALTERNATIVE(instr " " reg "1, [%2]\n", \
|
| /kernel/linux/linux-5.10/arch/powerpc/kernel/ |
| H A D | vecemu.c | 264 struct ppc_inst instr; in emulate_altivec() local
269 if (get_user_instr(instr, (void __user *)regs->nip)) in emulate_altivec()
272 word = ppc_inst_val(instr); in emulate_altivec()
273 if (ppc_inst_primary_opcode(instr) != 4) in emulate_altivec()
|
| /kernel/linux/linux-6.6/arch/powerpc/kernel/ |
| H A D | vecemu.c | 264 ppc_inst_t instr; in emulate_altivec() local
269 if (get_user_instr(instr, (void __user *)regs->nip)) in emulate_altivec()
272 word = ppc_inst_val(instr); in emulate_altivec()
273 if (ppc_inst_primary_opcode(instr) != 4) in emulate_altivec()
|
| /third_party/mesa3d/src/amd/common/ |
| H A D | ac_nir_opt_outputs.c | 198 b->cursor = nir_after_instr(&cur_chan->store_intr->instr); in ac_eliminate_duplicated_output()
263 nir_foreach_instr_safe(instr, block) { in ac_nir_optimize_outputs()
264 if (instr->type != nir_instr_type_intrinsic) in ac_nir_optimize_outputs()
267 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); in ac_nir_optimize_outputs()
|
| /kernel/linux/linux-5.10/drivers/mtd/nand/raw/ |
| H A D | denali.c | 1110 const struct nand_op_instr *instr) in denali_exec_instr()
1114 switch (instr->type) { in denali_exec_instr()
1117 &instr->ctx.cmd.opcode, 1); in denali_exec_instr()
1121 instr->ctx.addr.addrs, in denali_exec_instr()
1122 instr->ctx.addr.naddrs); in denali_exec_instr()
1126 instr->ctx.data.buf.in, in denali_exec_instr()
1127 instr->ctx.data.len, in denali_exec_instr()
1128 !instr->ctx.data.force_8bit && in denali_exec_instr()
1133 instr->ctx.data.buf.out, in denali_exec_instr()
1134 instr in denali_exec_instr()
1109 denali_exec_instr(struct nand_chip *chip, const struct nand_op_instr *instr) denali_exec_instr() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/mtd/nand/raw/ |
| H A D | denali.c | 1110 const struct nand_op_instr *instr) in denali_exec_instr()
1114 switch (instr->type) { in denali_exec_instr()
1117 &instr->ctx.cmd.opcode, 1); in denali_exec_instr()
1121 instr->ctx.addr.addrs, in denali_exec_instr()
1122 instr->ctx.addr.naddrs); in denali_exec_instr()
1126 instr->ctx.data.buf.in, in denali_exec_instr()
1127 instr->ctx.data.len, in denali_exec_instr()
1128 !instr->ctx.data.force_8bit && in denali_exec_instr()
1133 instr->ctx.data.buf.out, in denali_exec_instr()
1134 instr in denali_exec_instr()
1109 denali_exec_instr(struct nand_chip *chip, const struct nand_op_instr *instr) denali_exec_instr() argument
[all...] |