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Searched refs:hwirq (Results 51 - 75 of 716) sorted by relevance

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/kernel/linux/linux-6.6/drivers/misc/cxl/
H A Dirq.c174 irq_hw_number_t hwirq = irqd_to_hwirq(irq_get_irq_data(irq)); in cxl_irq_afu() local
192 irq_off = hwirq - ctx->irqs.offset[r]; in cxl_irq_afu()
201 WARN(1, "Received AFU IRQ out of range for pe %i (virq %i hwirq %lx)\n", in cxl_irq_afu()
202 ctx->pe, irq, hwirq); in cxl_irq_afu()
206 trace_cxl_afu_irq(ctx, afu_irq, irq, hwirq); in cxl_irq_afu()
207 pr_devel("Received AFU interrupt %i for pe: %i (virq %i hwirq %lx)\n", in cxl_irq_afu()
208 afu_irq, ctx->pe, irq, hwirq); in cxl_irq_afu()
224 unsigned int cxl_map_irq(struct cxl *adapter, irq_hw_number_t hwirq, in cxl_map_irq() argument
231 virq = irq_create_mapping(NULL, hwirq); in cxl_map_irq()
238 cxl_ops->setup_irq(adapter, hwirq, vir in cxl_map_irq()
263 int hwirq, virq; cxl_register_one_irq() local
359 irq_hw_number_t hwirq; afu_register_hwirqs() local
404 irq_hw_number_t hwirq; afu_release_irqs() local
[all...]
/kernel/linux/linux-6.6/drivers/irqchip/
H A Dirq-loongson-pch-pic.c83 pch_pic_bitset(priv, PCH_PIC_MASK, d->hwirq); in pch_pic_mask_irq()
91 writel(BIT(PIC_REG_BIT(d->hwirq)), in pch_pic_unmask_irq()
92 priv->base + PCH_PIC_CLR + PIC_REG_IDX(d->hwirq) * 4); in pch_pic_unmask_irq()
95 pch_pic_bitclr(priv, PCH_PIC_MASK, d->hwirq); in pch_pic_unmask_irq()
105 pch_pic_bitset(priv, PCH_PIC_EDGE, d->hwirq); in pch_pic_set_type()
106 pch_pic_bitclr(priv, PCH_PIC_POL, d->hwirq); in pch_pic_set_type()
110 pch_pic_bitset(priv, PCH_PIC_EDGE, d->hwirq); in pch_pic_set_type()
111 pch_pic_bitset(priv, PCH_PIC_POL, d->hwirq); in pch_pic_set_type()
115 pch_pic_bitclr(priv, PCH_PIC_EDGE, d->hwirq); in pch_pic_set_type()
116 pch_pic_bitclr(priv, PCH_PIC_POL, d->hwirq); in pch_pic_set_type()
155 pch_pic_domain_translate(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) pch_pic_domain_translate() argument
188 unsigned long hwirq; pch_pic_alloc() local
[all...]
H A Dirq-mips-gic.c113 irq_hw_number_t hwirq = GIC_HWIRQ_TO_SHARED(irqd_to_hwirq(d)); in gic_send_ipi() local
115 write_gic_wedge(GIC_WEDGE_RW | hwirq); in gic_send_ipi()
181 unsigned int intr = GIC_HWIRQ_TO_SHARED(d->hwirq); in gic_mask_irq()
189 unsigned int intr = GIC_HWIRQ_TO_SHARED(d->hwirq); in gic_unmask_irq()
201 unsigned int irq = GIC_HWIRQ_TO_SHARED(d->hwirq); in gic_ack_irq()
211 irq = GIC_HWIRQ_TO_SHARED(d->hwirq); in gic_set_type()
262 unsigned int irq = GIC_HWIRQ_TO_SHARED(d->hwirq); in gic_set_affinity()
332 int intr = GIC_HWIRQ_TO_LOCAL(d->hwirq); in gic_mask_local_irq()
339 int intr = GIC_HWIRQ_TO_LOCAL(d->hwirq); in gic_unmask_local_irq()
356 intr = GIC_HWIRQ_TO_LOCAL(d->hwirq); in gic_mask_local_irq_all_vpes()
468 gic_irq_domain_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t hwirq) gic_irq_domain_map() argument
550 irq_hw_number_t hwirq; gic_irq_domain_alloc() local
593 irq_hw_number_t hwirq, base_hwirq; gic_ipi_domain_alloc() local
[all...]
H A Dirq-csky-mpintc.c85 setup_trigger(d->hwirq, __trigger[d->hwirq]); in csky_mpintc_unmask()
87 writel_relaxed(d->hwirq, reg_base + INTCL_SENR); in csky_mpintc_unmask()
94 writel_relaxed(d->hwirq, reg_base + INTCL_CENR); in csky_mpintc_mask()
101 writel_relaxed(d->hwirq, reg_base + INTCL_CACR); in csky_mpintc_eoi()
108 __trigger[d->hwirq] = 0; in csky_mpintc_set_type()
111 __trigger[d->hwirq] = 1; in csky_mpintc_set_type()
114 __trigger[d->hwirq] = 2; in csky_mpintc_set_type()
117 __trigger[d->hwirq] = 3; in csky_mpintc_set_type()
132 unsigned int offset = 4 * (d->hwirq in csky_irq_set_affinity()
175 csky_irqdomain_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hwirq) csky_irqdomain_map() argument
[all...]
H A Dirq-mips-cpu.c42 set_c0_status(IE_SW0 << d->hwirq); in unmask_mips_irq()
48 clear_c0_status(IE_SW0 << d->hwirq); in mask_mips_irq()
71 clear_c0_cause(C_SW0 << d->hwirq); in mips_mt_cpu_irq_startup()
84 clear_c0_cause(C_SW0 << d->hwirq); in mips_mt_cpu_irq_ack()
93 irq_hw_number_t hwirq = irqd_to_hwirq(d); in mips_mt_send_ipi() local
104 write_vpe_c0_cause(read_vpe_c0_cause() | (C_SW0 << hwirq)); in mips_mt_send_ipi()
187 unsigned int i, hwirq; in mips_cpu_ipi_alloc() local
191 hwirq = find_first_zero_bit(state->allocated, 2); in mips_cpu_ipi_alloc()
192 if (hwirq == 2) in mips_cpu_ipi_alloc()
194 bitmap_set(state->allocated, hwirq, in mips_cpu_ipi_alloc()
[all...]
H A Dirq-imx-gpcv2.c76 unsigned int idx = d->hwirq / 32; in imx_gpcv2_irq_set_wake()
81 mask = BIT(d->hwirq % 32); in imx_gpcv2_irq_set_wake()
102 reg = gpcv2_idx_to_reg(cd, d->hwirq / 32); in imx_gpcv2_irq_unmask()
104 val &= ~BIT(d->hwirq % 32); in imx_gpcv2_irq_unmask()
118 reg = gpcv2_idx_to_reg(cd, d->hwirq / 32); in imx_gpcv2_irq_mask()
120 val |= BIT(d->hwirq % 32); in imx_gpcv2_irq_mask()
142 unsigned long *hwirq, in imx_gpcv2_domain_translate()
153 *hwirq = fwspec->param[1]; in imx_gpcv2_domain_translate()
167 irq_hw_number_t hwirq; in imx_gpcv2_domain_alloc() local
172 err = imx_gpcv2_domain_translate(domain, fwspec, &hwirq, in imx_gpcv2_domain_alloc()
140 imx_gpcv2_domain_translate(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) imx_gpcv2_domain_translate() argument
[all...]
H A Dirq-ixp4xx.c77 if (ixi->is_356 && d->hwirq >= 32) { in ixp4xx_irq_mask()
79 val &= ~BIT(d->hwirq - 32); in ixp4xx_irq_mask()
83 val &= ~BIT(d->hwirq); in ixp4xx_irq_mask()
97 if (ixi->is_356 && d->hwirq >= 32) { in ixp4xx_irq_unmask()
99 val |= BIT(d->hwirq - 32); in ixp4xx_irq_unmask()
103 val |= BIT(d->hwirq); in ixp4xx_irq_unmask()
131 unsigned long *hwirq, in ixp4xx_irq_domain_translate()
136 *hwirq = fwspec->param[0]; in ixp4xx_irq_domain_translate()
144 *hwirq = fwspec->param[0]; in ixp4xx_irq_domain_translate()
158 irq_hw_number_t hwirq; in ixp4xx_irq_domain_alloc() local
129 ixp4xx_irq_domain_translate(struct irq_domain *domain, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) ixp4xx_irq_domain_translate() argument
[all...]
H A Dirq-lpc32xx.c49 u32 val, mask = BIT(d->hwirq); in lpc32xx_irq_mask()
58 u32 val, mask = BIT(d->hwirq); in lpc32xx_irq_unmask()
67 u32 mask = BIT(d->hwirq); in lpc32xx_irq_ack()
75 u32 val, mask = BIT(d->hwirq); in lpc32xx_irq_set_type()
143 u32 hwirq = lpc32xx_ic_read(ic, LPC32XX_INTC_STAT), irq; in lpc32xx_handle_irq() local
145 while (hwirq) { in lpc32xx_handle_irq()
146 irq = __ffs(hwirq); in lpc32xx_handle_irq()
147 hwirq &= ~BIT(irq); in lpc32xx_handle_irq()
156 u32 hwirq = lpc32xx_ic_read(ic, LPC32XX_INTC_STAT), irq; in lpc32xx_sic_handler() local
160 while (hwirq) { in lpc32xx_sic_handler()
[all...]
H A Dirq-mvebu-gicp.c62 msg[0].data = data->hwirq; in gicp_compose_msi_msg()
65 msg[1].data = data->hwirq; in gicp_compose_msi_msg()
85 unsigned int hwirq; in gicp_irq_domain_alloc() local
89 hwirq = find_first_zero_bit(gicp->spi_bitmap, gicp->spi_cnt); in gicp_irq_domain_alloc()
90 if (hwirq == gicp->spi_cnt) { in gicp_irq_domain_alloc()
94 __set_bit(hwirq, gicp->spi_bitmap); in gicp_irq_domain_alloc()
100 fwspec.param[1] = gicp_idx_to_spi(gicp, hwirq) - 32; in gicp_irq_domain_alloc()
113 ret = irq_domain_set_hwirq_and_chip(domain, virq, hwirq, in gicp_irq_domain_alloc()
124 __clear_bit(hwirq, gicp->spi_bitmap); in gicp_irq_domain_alloc()
135 if (d->hwirq > in gicp_irq_domain_free()
[all...]
H A Dirq-vf610-mscm-ir.c88 irq_hw_number_t hwirq = data->hwirq; in vf610_mscm_ir_enable() local
92 irsprc = readw_relaxed(chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq)); in vf610_mscm_ir_enable()
98 chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq)); in vf610_mscm_ir_enable()
105 irq_hw_number_t hwirq = data->hwirq; in vf610_mscm_ir_disable() local
108 writew_relaxed(0x0, chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq)); in vf610_mscm_ir_disable()
128 irq_hw_number_t hwirq; in vf610_mscm_ir_domain_alloc() local
138 hwirq = fwspec->param[0]; in vf610_mscm_ir_domain_alloc()
140 irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq in vf610_mscm_ir_domain_alloc()
160 vf610_mscm_ir_domain_translate(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) vf610_mscm_ir_domain_translate() argument
[all...]
/kernel/linux/linux-5.10/drivers/irqchip/
H A Dirq-mips-gic.c112 irq_hw_number_t hwirq = GIC_HWIRQ_TO_SHARED(irqd_to_hwirq(d)); in gic_send_ipi() local
114 write_gic_wedge(GIC_WEDGE_RW | hwirq); in gic_send_ipi()
180 unsigned int intr = GIC_HWIRQ_TO_SHARED(d->hwirq); in gic_mask_irq()
188 unsigned int intr = GIC_HWIRQ_TO_SHARED(d->hwirq); in gic_unmask_irq()
200 unsigned int irq = GIC_HWIRQ_TO_SHARED(d->hwirq); in gic_ack_irq()
210 irq = GIC_HWIRQ_TO_SHARED(d->hwirq); in gic_set_type()
261 unsigned int irq = GIC_HWIRQ_TO_SHARED(d->hwirq); in gic_set_affinity()
331 int intr = GIC_HWIRQ_TO_LOCAL(d->hwirq); in gic_mask_local_irq()
338 int intr = GIC_HWIRQ_TO_LOCAL(d->hwirq); in gic_unmask_local_irq()
355 intr = GIC_HWIRQ_TO_LOCAL(d->hwirq); in gic_mask_local_irq_all_vpes()
465 gic_irq_domain_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t hwirq) gic_irq_domain_map() argument
550 irq_hw_number_t hwirq; gic_irq_domain_alloc() local
593 irq_hw_number_t hwirq, base_hwirq; gic_ipi_domain_alloc() local
[all...]
H A Dirq-mmp.c71 int hwirq; in icu_mask_ack_irq() local
74 hwirq = d->irq - data->virq_base; in icu_mask_ack_irq()
76 r = readl_relaxed(mmp_icu_base + (hwirq << 2)); in icu_mask_ack_irq()
79 writel_relaxed(r, mmp_icu_base + (hwirq << 2)); in icu_mask_ack_irq()
83 && (hwirq == data->clr_mfp_hwirq)) in icu_mask_ack_irq()
86 r = readl_relaxed(data->reg_mask) | (1 << hwirq); in icu_mask_ack_irq()
95 int hwirq; in icu_mask_irq() local
98 hwirq = d->irq - data->virq_base; in icu_mask_irq()
100 r = readl_relaxed(mmp_icu_base + (hwirq << 2)); in icu_mask_irq()
103 writel_relaxed(r, mmp_icu_base + (hwirq << in icu_mask_irq()
124 int hwirq; icu_unmask_irq() local
227 int hwirq; mmp_handle_irq() local
238 int hwirq; mmp2_handle_irq() local
[all...]
H A Dirq-csky-mpintc.c85 setup_trigger(d->hwirq, __trigger[d->hwirq]); in csky_mpintc_enable()
87 writel_relaxed(d->hwirq, reg_base + INTCL_SENR); in csky_mpintc_enable()
94 writel_relaxed(d->hwirq, reg_base + INTCL_CENR); in csky_mpintc_disable()
101 writel_relaxed(d->hwirq, reg_base + INTCL_CACR); in csky_mpintc_eoi()
108 __trigger[d->hwirq] = 0; in csky_mpintc_set_type()
111 __trigger[d->hwirq] = 1; in csky_mpintc_set_type()
114 __trigger[d->hwirq] = 2; in csky_mpintc_set_type()
117 __trigger[d->hwirq] = 3; in csky_mpintc_set_type()
132 unsigned int offset = 4 * (d->hwirq in csky_irq_set_affinity()
175 csky_irqdomain_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hwirq) csky_irqdomain_map() argument
[all...]
H A Dirq-imx-gpcv2.c76 unsigned int idx = d->hwirq / 32; in imx_gpcv2_irq_set_wake()
81 mask = BIT(d->hwirq % 32); in imx_gpcv2_irq_set_wake()
102 reg = gpcv2_idx_to_reg(cd, d->hwirq / 32); in imx_gpcv2_irq_unmask()
104 val &= ~BIT(d->hwirq % 32); in imx_gpcv2_irq_unmask()
118 reg = gpcv2_idx_to_reg(cd, d->hwirq / 32); in imx_gpcv2_irq_mask()
120 val |= BIT(d->hwirq % 32); in imx_gpcv2_irq_mask()
142 unsigned long *hwirq, in imx_gpcv2_domain_translate()
153 *hwirq = fwspec->param[1]; in imx_gpcv2_domain_translate()
167 irq_hw_number_t hwirq; in imx_gpcv2_domain_alloc() local
172 err = imx_gpcv2_domain_translate(domain, fwspec, &hwirq, in imx_gpcv2_domain_alloc()
140 imx_gpcv2_domain_translate(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) imx_gpcv2_domain_translate() argument
[all...]
H A Dirq-lpc32xx.c48 u32 val, mask = BIT(d->hwirq); in lpc32xx_irq_mask()
57 u32 val, mask = BIT(d->hwirq); in lpc32xx_irq_unmask()
66 u32 mask = BIT(d->hwirq); in lpc32xx_irq_ack()
74 u32 val, mask = BIT(d->hwirq); in lpc32xx_irq_set_type()
124 u32 hwirq = lpc32xx_ic_read(ic, LPC32XX_INTC_STAT), irq; in lpc32xx_handle_irq() local
126 while (hwirq) { in lpc32xx_handle_irq()
127 irq = __ffs(hwirq); in lpc32xx_handle_irq()
128 hwirq &= ~BIT(irq); in lpc32xx_handle_irq()
137 u32 hwirq = lpc32xx_ic_read(ic, LPC32XX_INTC_STAT), irq; in lpc32xx_sic_handler() local
141 while (hwirq) { in lpc32xx_sic_handler()
[all...]
H A Dirq-mips-cpu.c42 set_c0_status(IE_SW0 << d->hwirq); in unmask_mips_irq()
48 clear_c0_status(IE_SW0 << d->hwirq); in mask_mips_irq()
71 clear_c0_cause(C_SW0 << d->hwirq); in mips_mt_cpu_irq_startup()
84 clear_c0_cause(C_SW0 << d->hwirq); in mips_mt_cpu_irq_ack()
93 irq_hw_number_t hwirq = irqd_to_hwirq(d); in mips_mt_send_ipi() local
104 write_vpe_c0_cause(read_vpe_c0_cause() | (C_SW0 << hwirq)); in mips_mt_send_ipi()
185 unsigned int i, hwirq; in mips_cpu_ipi_alloc() local
189 hwirq = find_first_zero_bit(state->allocated, 2); in mips_cpu_ipi_alloc()
190 if (hwirq == 2) in mips_cpu_ipi_alloc()
192 bitmap_set(state->allocated, hwirq, in mips_cpu_ipi_alloc()
[all...]
H A Dirq-mst-intc.c29 irq_hw_number_t hwirq = irqd_to_hwirq(d); in mst_set_irq() local
34 mask = 1 << (hwirq % 16); in mst_set_irq()
35 offset += (hwirq / 16) * 4; in mst_set_irq()
45 irq_hw_number_t hwirq = irqd_to_hwirq(d); in mst_clear_irq() local
50 mask = 1 << (hwirq % 16); in mst_clear_irq()
51 offset += (hwirq / 16) * 4; in mst_clear_irq()
99 unsigned long *hwirq, in mst_intc_domain_translate()
115 *hwirq = fwspec->param[1]; in mst_intc_domain_translate()
127 irq_hw_number_t hwirq; in mst_intc_domain_alloc() local
139 hwirq in mst_intc_domain_alloc()
97 mst_intc_domain_translate(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) mst_intc_domain_translate() argument
[all...]
H A Dirq-mvebu-gicp.c62 msg[0].data = data->hwirq; in gicp_compose_msi_msg()
65 msg[1].data = data->hwirq; in gicp_compose_msi_msg()
85 unsigned int hwirq; in gicp_irq_domain_alloc() local
89 hwirq = find_first_zero_bit(gicp->spi_bitmap, gicp->spi_cnt); in gicp_irq_domain_alloc()
90 if (hwirq == gicp->spi_cnt) { in gicp_irq_domain_alloc()
94 __set_bit(hwirq, gicp->spi_bitmap); in gicp_irq_domain_alloc()
100 fwspec.param[1] = gicp_idx_to_spi(gicp, hwirq) - 32; in gicp_irq_domain_alloc()
113 ret = irq_domain_set_hwirq_and_chip(domain, virq, hwirq, in gicp_irq_domain_alloc()
124 __clear_bit(hwirq, gicp->spi_bitmap); in gicp_irq_domain_alloc()
135 if (d->hwirq > in gicp_irq_domain_free()
[all...]
H A Dirq-vf610-mscm-ir.c88 irq_hw_number_t hwirq = data->hwirq; in vf610_mscm_ir_enable() local
92 irsprc = readw_relaxed(chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq)); in vf610_mscm_ir_enable()
98 chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq)); in vf610_mscm_ir_enable()
105 irq_hw_number_t hwirq = data->hwirq; in vf610_mscm_ir_disable() local
108 writew_relaxed(0x0, chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq)); in vf610_mscm_ir_disable()
128 irq_hw_number_t hwirq; in vf610_mscm_ir_domain_alloc() local
138 hwirq = fwspec->param[0]; in vf610_mscm_ir_domain_alloc()
140 irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq in vf610_mscm_ir_domain_alloc()
160 vf610_mscm_ir_domain_translate(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) vf610_mscm_ir_domain_translate() argument
[all...]
H A Dirq-loongarch-cpu.c20 clear_csr_ecfg(ECFGF(d->hwirq)); in mask_loongarch_irq()
25 set_csr_ecfg(ECFGF(d->hwirq)); in unmask_loongarch_irq()
36 int hwirq; in handle_cpu_irq() local
39 while ((hwirq = ffs(estat))) { in handle_cpu_irq()
40 estat &= ~BIT(hwirq - 1); in handle_cpu_irq()
41 handle_domain_irq(irq_domain, hwirq - 1, regs); in handle_cpu_irq()
61 irq_hw_number_t hwirq) in loongarch_cpu_intc_map()
60 loongarch_cpu_intc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hwirq) loongarch_cpu_intc_map() argument
/kernel/linux/linux-5.10/drivers/vfio/platform/
H A Dvfio_platform_irq.c25 disable_irq_nosync(irq_ctx->hwirq); in vfio_platform_mask()
85 enable_irq(irq_ctx->hwirq); in vfio_platform_unmask()
151 disable_irq_nosync(irq_ctx->hwirq); in vfio_automasked_irq_handler()
180 irq_clear_status_flags(irq->hwirq, IRQ_NOAUTOEN); in vfio_set_trigger()
181 free_irq(irq->hwirq, irq); in vfio_set_trigger()
191 irq->hwirq, vdev->name); in vfio_set_trigger()
203 irq_set_status_flags(irq->hwirq, IRQ_NOAUTOEN); in vfio_set_trigger()
204 ret = request_irq(irq->hwirq, handler, 0, irq->name, irq); in vfio_set_trigger()
213 enable_irq(irq->hwirq); in vfio_set_trigger()
244 handler(irq->hwirq, ir in vfio_platform_set_irq_trigger()
294 int hwirq = vdev->get_irq(vdev, i); vfio_platform_irq_init() local
[all...]
/kernel/linux/linux-6.6/drivers/vfio/platform/
H A Dvfio_platform_irq.c25 disable_irq_nosync(irq_ctx->hwirq); in vfio_platform_mask()
85 enable_irq(irq_ctx->hwirq); in vfio_platform_unmask()
161 disable_irq_nosync(irq_ctx->hwirq); in vfio_automasked_irq_handler()
189 disable_irq(irq->hwirq); in vfio_set_trigger()
210 enable_irq(irq->hwirq); in vfio_set_trigger()
241 handler(irq->hwirq, irq); in vfio_platform_set_irq_trigger()
247 handler(irq->hwirq, irq); in vfio_platform_set_irq_trigger()
300 int hwirq = vdev->get_irq(vdev, i); in vfio_platform_irq_init() local
303 if (hwirq < 0) { in vfio_platform_irq_init()
312 if (irq_get_trigger_type(hwirq) in vfio_platform_irq_init()
[all...]
/kernel/linux/linux-5.10/arch/arm/mach-imx/
H A Davic.c51 static int avic_set_irq_fiq(unsigned int hwirq, unsigned int type) in avic_set_irq_fiq() argument
55 if (hwirq >= AVIC_NUM_IRQS) in avic_set_irq_fiq()
58 if (hwirq < AVIC_NUM_IRQS / 2) { in avic_set_irq_fiq()
59 irqt = imx_readl(avic_base + AVIC_INTTYPEL) & ~(1 << hwirq); in avic_set_irq_fiq()
60 imx_writel(irqt | (!!type << hwirq), avic_base + AVIC_INTTYPEL); in avic_set_irq_fiq()
62 hwirq -= AVIC_NUM_IRQS / 2; in avic_set_irq_fiq()
63 irqt = imx_readl(avic_base + AVIC_INTTYPEH) & ~(1 << hwirq); in avic_set_irq_fiq()
64 imx_writel(irqt | (!!type << hwirq), avic_base + AVIC_INTTYPEH); in avic_set_irq_fiq()
85 int idx = d->hwirq >> 5; in avic_irq_suspend()
91 u8 offs = d->hwirq < AVIC_NUM_IRQ in avic_irq_suspend()
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/kernel/linux/linux-6.6/arch/arm/mach-imx/
H A Davic.c52 static int avic_set_irq_fiq(unsigned int hwirq, unsigned int type) in avic_set_irq_fiq() argument
56 if (hwirq >= AVIC_NUM_IRQS) in avic_set_irq_fiq()
59 if (hwirq < AVIC_NUM_IRQS / 2) { in avic_set_irq_fiq()
60 irqt = imx_readl(avic_base + AVIC_INTTYPEL) & ~(1 << hwirq); in avic_set_irq_fiq()
61 imx_writel(irqt | (!!type << hwirq), avic_base + AVIC_INTTYPEL); in avic_set_irq_fiq()
63 hwirq -= AVIC_NUM_IRQS / 2; in avic_set_irq_fiq()
64 irqt = imx_readl(avic_base + AVIC_INTTYPEH) & ~(1 << hwirq); in avic_set_irq_fiq()
65 imx_writel(irqt | (!!type << hwirq), avic_base + AVIC_INTTYPEH); in avic_set_irq_fiq()
86 int idx = d->hwirq >> 5; in avic_irq_suspend()
92 u8 offs = d->hwirq < AVIC_NUM_IRQ in avic_irq_suspend()
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/kernel/linux/linux-5.10/drivers/mailbox/
H A Dqcom-ipcc.c75 u32 hwirq; in qcom_ipcc_irq_fn() local
79 hwirq = readl(ipcc->base + IPCC_REG_RECV_ID); in qcom_ipcc_irq_fn()
80 if (hwirq == IPCC_NO_PENDING_IRQ) in qcom_ipcc_irq_fn()
83 virq = irq_find_mapping(ipcc->irq_domain, hwirq); in qcom_ipcc_irq_fn()
84 writel(hwirq, ipcc->base + IPCC_REG_RECV_SIGNAL_CLEAR); in qcom_ipcc_irq_fn()
94 irq_hw_number_t hwirq = irqd_to_hwirq(irqd); in qcom_ipcc_mask_irq() local
96 writel(hwirq, ipcc->base + IPCC_REG_RECV_SIGNAL_DISABLE); in qcom_ipcc_mask_irq()
102 irq_hw_number_t hwirq = irqd_to_hwirq(irqd); in qcom_ipcc_unmask_irq() local
104 writel(hwirq, ipcc->base + IPCC_REG_RECV_SIGNAL_ENABLE); in qcom_ipcc_unmask_irq()
150 u32 hwirq; in qcom_ipcc_mbox_send_data() local
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