| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/engine/ce/ |
| H A D | gk104.c | 47 gk104_ce_intr_launcherr(struct nvkm_engine *ce, const u32 base) in gk104_ce_intr_launcherr() argument
51 u32 stat = nvkm_rd32(device, 0x104f14 + base); in gk104_ce_intr_launcherr()
55 nvkm_wr32(device, 0x104f14 + base, 0x00000000); in gk104_ce_intr_launcherr()
63 const u32 base = subdev->inst * 0x1000; in gk104_ce_intr() local
64 u32 mask = nvkm_rd32(device, 0x104904 + base); in gk104_ce_intr()
65 u32 intr = nvkm_rd32(device, 0x104908 + base) & mask; in gk104_ce_intr()
68 nvkm_wr32(device, 0x104908 + base, 0x00000001); in gk104_ce_intr()
73 nvkm_wr32(device, 0x104908 + base, 0x00000002); in gk104_ce_intr()
77 gk104_ce_intr_launcherr(ce, base); in gk104_ce_intr()
78 nvkm_wr32(device, 0x104908 + base, in gk104_ce_intr()
[all...] |
| /third_party/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
| H A D | fd5_context.c | 55 fd_context_cleanup_common_vbos(&fd5_ctx->base);
71 pctx = &fd5_ctx->base.base;
74 fd5_ctx->base.flags = flags;
75 fd5_ctx->base.dev = fd_device_ref(screen->dev);
76 fd5_ctx->base.screen = fd_screen(pscreen);
77 fd5_ctx->base.last.key = &fd5_ctx->last_key;
92 fd5_ctx->base.blit = fd5_blitter_blit;
94 pctx = fd_context_init(&fd5_ctx->base, pscreen, priv, flags);
98 util_blitter_set_texture_multisample(fd5_ctx->base
[all...] |
| /kernel/linux/linux-5.10/drivers/char/hw_random/ |
| H A D | imx-rngc.c | 63 void __iomem *base; member
79 ctrl = readl(rngc->base + RNGC_CONTROL); in imx_rngc_irq_mask_clear()
81 writel(ctrl, rngc->base + RNGC_CONTROL); in imx_rngc_irq_mask_clear()
88 cmd = readl(rngc->base + RNGC_COMMAND); in imx_rngc_irq_mask_clear()
90 writel(cmd, rngc->base + RNGC_COMMAND); in imx_rngc_irq_mask_clear()
97 ctrl = readl(rngc->base + RNGC_CONTROL); in imx_rngc_irq_unmask()
99 writel(ctrl, rngc->base + RNGC_CONTROL); in imx_rngc_irq_unmask()
110 cmd = readl(rngc->base + RNGC_COMMAND); in imx_rngc_self_test()
111 writel(cmd | RNGC_CMD_SELF_TEST, rngc->base + RNGC_COMMAND); in imx_rngc_self_test()
129 status = readl(rngc->base in imx_rngc_read()
[all...] |
| /kernel/linux/linux-5.10/drivers/gpio/ |
| H A D | gpio-104-idio-16.c | 26 static unsigned int base[MAX_NUM_IDIO_16]; variable
28 module_param_hw_array(base, uint, ioport, &num_idio_16, 0);
29 MODULE_PARM_DESC(base, "ACCES 104-IDIO-16 base addresses");
40 * @base: base port address of the GPIO device
47 unsigned base; member
80 return !!(inb(idio16gpio->base + 1) & mask); in idio_16_gpio_get()
82 return !!(inb(idio16gpio->base + 5) & (mask>>8)); in idio_16_gpio_get()
92 *bits |= (unsigned long)inb(idio16gpio->base in idio_16_gpio_get_multiple()
[all...] |
| H A D | gpio-104-dio-48e.c | 27 static unsigned int base[MAX_NUM_DIO48E]; variable
29 module_param_hw_array(base, uint, ioport, &num_dio48e, 0);
30 MODULE_PARM_DESC(base, "ACCES 104-DIO-48E base addresses");
43 * @base: base port address of the GPIO device
52 unsigned base; member
73 const unsigned control_addr = dio48egpio->base + 3 + control_port*4; in dio48e_gpio_direction_input()
114 const unsigned control_addr = dio48egpio->base + 3 + control_port*4; in dio48e_gpio_direction_output()
147 outb(dio48egpio->out_state[io_port], dio48egpio->base in dio48e_gpio_direction_output()
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce110/ |
| H A D | dce110_opp_regamma_v.c | 90 value = dm_read_reg(xfm_dce->base.ctx, in set_bypass_input_gamma()
99 dm_write_reg(xfm_dce->base.ctx, in set_bypass_input_gamma()
113 dm_write_reg(xfm_dce->base.ctx, mmGAMMA_CORR_CONTROL, 0); in configure_regamma_mode()
151 dm_write_reg(xfm_dce->base.ctx, mmGAMMA_CORR_CNTLA_START_CNTL, in regamma_config_regions_and_segments()
162 dm_write_reg(xfm_dce->base.ctx, in regamma_config_regions_and_segments()
173 dm_write_reg(xfm_dce->base.ctx, in regamma_config_regions_and_segments()
190 dm_write_reg(xfm_dce->base.ctx, in regamma_config_regions_and_segments()
223 xfm_dce->base.ctx, in regamma_config_regions_and_segments()
255 dm_write_reg(xfm_dce->base.ctx, in regamma_config_regions_and_segments()
287 dm_write_reg(xfm_dce->base in regamma_config_regions_and_segments()
[all...] |
| /kernel/linux/linux-5.10/drivers/mfd/ |
| H A D | omap-usb-tll.c | 100 void __iomem *base; member
113 static inline void usbtll_write(void __iomem *base, u32 reg, u32 val) in usbtll_write() argument
115 writel_relaxed(val, base + reg); in usbtll_write()
118 static inline u32 usbtll_read(void __iomem *base, u32 reg) in usbtll_read() argument
120 return readl_relaxed(base + reg); in usbtll_read()
123 static inline void usbtll_writeb(void __iomem *base, u32 reg, u8 val) in usbtll_writeb() argument
125 writeb_relaxed(val, base + reg); in usbtll_writeb()
128 static inline u8 usbtll_readb(void __iomem *base, u32 reg) in usbtll_readb() argument
130 return readb_relaxed(base + reg); in usbtll_readb()
210 void __iomem *base; in usbtll_omap_probe() local
335 void __iomem *base = tll->base; omap_tll_init() local
[all...] |
| /kernel/linux/linux-5.10/drivers/hwtracing/coresight/ |
| H A D | coresight-funnel.c | 37 * @base: memory mapped base address for this component.
44 void __iomem *base; member
56 CS_UNLOCK(drvdata->base); in dynamic_funnel_enable_hw()
58 functl = readl_relaxed(drvdata->base + FUNNEL_FUNCTL); in dynamic_funnel_enable_hw()
61 rc = coresight_claim_device_unlocked(drvdata->base); in dynamic_funnel_enable_hw()
69 writel_relaxed(functl, drvdata->base + FUNNEL_FUNCTL); in dynamic_funnel_enable_hw()
70 writel_relaxed(drvdata->priority, drvdata->base + FUNNEL_PRICTL); in dynamic_funnel_enable_hw()
72 CS_LOCK(drvdata->base); in dynamic_funnel_enable_hw()
86 if (drvdata->base) in funnel_enable()
209 void __iomem *base; funnel_probe() local
[all...] |
| /kernel/linux/linux-5.10/drivers/phy/qualcomm/ |
| H A D | phy-qcom-snps-femto-v2.c | 74 * @base: iomapped memory space for snps hs phy
88 void __iomem *base; member
127 static inline void qcom_snps_hsphy_write_mask(void __iomem *base, u32 offset, in qcom_snps_hsphy_write_mask() argument
132 reg = readl_relaxed(base + offset); in qcom_snps_hsphy_write_mask()
135 writel_relaxed(reg, base + offset); in qcom_snps_hsphy_write_mask()
138 readl_relaxed(base + offset); in qcom_snps_hsphy_write_mask()
147 qcom_snps_hsphy_write_mask(hsphy->base, in qcom_snps_hsphy_suspend()
152 qcom_snps_hsphy_write_mask(hsphy->base, in qcom_snps_hsphy_suspend()
227 qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_CFG0, in qcom_snps_hsphy_init()
230 qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_UTMI_CTRL in qcom_snps_hsphy_init()
[all...] |
| /kernel/linux/linux-5.10/drivers/usb/phy/ |
| H A D | phy-jz4770.c | 109 void __iomem *base; member
131 reg = readl(priv->base + REG_USBPCR1_OFFSET); in ingenic_usb_phy_set_peripheral()
133 writel(reg, priv->base + REG_USBPCR1_OFFSET); in ingenic_usb_phy_set_peripheral()
136 reg = readl(priv->base + REG_USBPCR_OFFSET); in ingenic_usb_phy_set_peripheral()
139 writel(reg, priv->base + REG_USBPCR_OFFSET); in ingenic_usb_phy_set_peripheral()
149 reg = readl(priv->base + REG_USBPCR_OFFSET); in ingenic_usb_phy_set_host()
152 writel(reg, priv->base + REG_USBPCR_OFFSET); in ingenic_usb_phy_set_host()
179 reg = readl(priv->base + REG_USBPCR_OFFSET); in ingenic_usb_phy_init()
180 writel(reg & ~USBPCR_POR, priv->base + REG_USBPCR_OFFSET); in ingenic_usb_phy_init()
208 writel(reg, priv->base in jz4770_usb_phy_init()
[all...] |
| /kernel/linux/linux-6.6/drivers/char/hw_random/ |
| H A D | imx-rngc.c | 63 void __iomem *base; member
79 ctrl = readl(rngc->base + RNGC_CONTROL); in imx_rngc_irq_mask_clear()
81 writel(ctrl, rngc->base + RNGC_CONTROL); in imx_rngc_irq_mask_clear()
88 cmd = readl(rngc->base + RNGC_COMMAND); in imx_rngc_irq_mask_clear()
90 writel(cmd, rngc->base + RNGC_COMMAND); in imx_rngc_irq_mask_clear()
97 ctrl = readl(rngc->base + RNGC_CONTROL); in imx_rngc_irq_unmask()
99 writel(ctrl, rngc->base + RNGC_CONTROL); in imx_rngc_irq_unmask()
110 cmd = readl(rngc->base + RNGC_COMMAND); in imx_rngc_self_test()
111 writel(cmd | RNGC_CMD_SELF_TEST, rngc->base + RNGC_COMMAND); in imx_rngc_self_test()
128 status = readl(rngc->base in imx_rngc_read()
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce110/ |
| H A D | dce110_opp_regamma_v.c | 88 value = dm_read_reg(xfm_dce->base.ctx, in set_bypass_input_gamma()
97 dm_write_reg(xfm_dce->base.ctx, in set_bypass_input_gamma()
111 dm_write_reg(xfm_dce->base.ctx, mmGAMMA_CORR_CONTROL, 0); in configure_regamma_mode()
149 dm_write_reg(xfm_dce->base.ctx, mmGAMMA_CORR_CNTLA_START_CNTL, in regamma_config_regions_and_segments()
160 dm_write_reg(xfm_dce->base.ctx, in regamma_config_regions_and_segments()
171 dm_write_reg(xfm_dce->base.ctx, in regamma_config_regions_and_segments()
188 dm_write_reg(xfm_dce->base.ctx, in regamma_config_regions_and_segments()
221 xfm_dce->base.ctx, in regamma_config_regions_and_segments()
253 dm_write_reg(xfm_dce->base.ctx, in regamma_config_regions_and_segments()
285 dm_write_reg(xfm_dce->base in regamma_config_regions_and_segments()
[all...] |
| /kernel/linux/linux-6.6/mm/ |
| H A D | page_ext.c | 139 static inline struct page_ext *get_entry(void *base, unsigned long index) in get_entry() argument
141 return base + page_ext_size * index; in get_entry()
159 struct page_ext *base; in lookup_page_ext() local
162 base = NODE_DATA(page_to_nid(page))->node_page_ext; in lookup_page_ext()
169 if (unlikely(!base)) in lookup_page_ext()
173 return get_entry(base, index); in lookup_page_ext()
178 struct page_ext *base; in alloc_node_page_ext() local
197 base = memblock_alloc_try_nid( in alloc_node_page_ext()
200 if (!base) in alloc_node_page_ext()
202 NODE_DATA(nid)->node_page_ext = base; in alloc_node_page_ext()
271 struct page_ext *base; init_section_page_ext() local
323 struct page_ext *base; __free_page_ext() local
[all...] |
| /kernel/linux/linux-5.10/drivers/clocksource/ |
| H A D | timer-imx-gpt.c | 64 void __iomem *base; member
93 tmp = readl_relaxed(imxtm->base + MXC_TCTL); in imx1_gpt_irq_disable()
94 writel_relaxed(tmp & ~MX1_2_TCTL_IRQEN, imxtm->base + MXC_TCTL); in imx1_gpt_irq_disable()
100 writel_relaxed(0, imxtm->base + V2_IR); in imx31_gpt_irq_disable()
108 tmp = readl_relaxed(imxtm->base + MXC_TCTL); in imx1_gpt_irq_enable()
109 writel_relaxed(tmp | MX1_2_TCTL_IRQEN, imxtm->base + MXC_TCTL); in imx1_gpt_irq_enable()
115 writel_relaxed(1<<0, imxtm->base + V2_IR); in imx31_gpt_irq_enable()
121 writel_relaxed(0, imxtm->base + MX1_2_TSTAT); in imx1_gpt_irq_acknowledge()
127 imxtm->base + MX1_2_TSTAT); in imx21_gpt_irq_acknowledge()
132 writel_relaxed(V2_TSTAT_OF1, imxtm->base in imx31_gpt_irq_acknowledge()
[all...] |
| /kernel/linux/linux-5.10/drivers/of/ |
| H A D | of_reserved_mem.c | 45 phys_addr_t base; in early_init_dt_alloc_reserved_memory_arch() local
49 base = memblock_find_in_range(start, end, size, align); in early_init_dt_alloc_reserved_memory_arch()
50 if (!base) in early_init_dt_alloc_reserved_memory_arch()
53 *res_base = base; in early_init_dt_alloc_reserved_memory_arch()
55 return memblock_remove(base, size); in early_init_dt_alloc_reserved_memory_arch()
57 return memblock_reserve(base, size); in early_init_dt_alloc_reserved_memory_arch()
64 phys_addr_t base, phys_addr_t size) in fdt_reserved_mem_save_node()
75 rmem->base = base; in fdt_reserved_mem_save_node()
98 phys_addr_t base in __reserved_mem_alloc_size() local
63 fdt_reserved_mem_save_node(unsigned long node, const char *uname, phys_addr_t base, phys_addr_t size) fdt_reserved_mem_save_node() argument
[all...] |
| /kernel/linux/linux-5.10/drivers/thermal/st/ |
| H A D | stm_thermal.c | 98 void __iomem *base; member
110 value = readl_relaxed(sensor->base + DTS_ITENR_OFFSET); in stm_enable_irq()
120 writel_relaxed(value, sensor->base + DTS_ITENR_OFFSET); in stm_enable_irq()
130 readl_relaxed(sensor->base + DTS_SR_OFFSET)); in stm_thermal_irq_handler()
137 writel_relaxed(ICIFR_MASK, sensor->base + DTS_ICIFR_OFFSET); in stm_thermal_irq_handler()
148 value = readl_relaxed(sensor->base + DTS_CFGR1_OFFSET); in stm_sensor_power_on()
150 writel_relaxed(value, sensor->base + DTS_CFGR1_OFFSET); in stm_sensor_power_on()
157 ret = readl_poll_timeout(sensor->base + DTS_SR_OFFSET, in stm_sensor_power_on()
164 value = readl_relaxed(sensor->base + in stm_sensor_power_on()
167 writel_relaxed(value, sensor->base in stm_sensor_power_on()
492 void __iomem *base; stm_thermal_probe() local
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| H A D | gt215.c | 25 #define gt215_clk(p) container_of((p), struct gt215_clk, base)
35 struct nvkm_clk base; member
45 struct nvkm_device *device = clk->base.subdev.device; in read_vco()
63 struct nvkm_device *device = clk->base.subdev.device; in read_clk()
110 struct nvkm_device *device = clk->base.subdev.device; in read_pll()
143 gt215_clk_read(struct nvkm_clk *base, enum nv_clk_src src) in gt215_clk_read() argument
145 struct gt215_clk *clk = gt215_clk(base); in gt215_clk_read()
146 struct nvkm_subdev *subdev = &clk->base.subdev; in gt215_clk_read()
187 gt215_clk_info(struct nvkm_clk *base, int idx, u32 khz, in gt215_clk_info() argument
190 struct gt215_clk *clk = gt215_clk(base); in gt215_clk_info()
235 gt215_pll_info(struct nvkm_clk *base, int idx, u32 pll, u32 khz, struct gt215_clk_info *info) gt215_pll_info() argument
459 gt215_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate) gt215_clk_calc() argument
486 gt215_clk_prog(struct nvkm_clk *base) gt215_clk_prog() argument
516 gt215_clk_tidy(struct nvkm_clk *base) gt215_clk_tidy() argument
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/pll/ |
| H A D | dsi_pll_28nm_8960.c | 64 struct msm_dsi_pll base; member
84 #define to_pll_28nm(x) container_of(x, struct dsi_pll_28nm, base)
114 void __iomem *base = pll_28nm->mmio; in dsi_pll_28nm_clk_set_rate() local
123 pll_write(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_1, in dsi_pll_28nm_clk_set_rate()
126 val = pll_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_2); in dsi_pll_28nm_clk_set_rate()
130 pll_write(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_2, in dsi_pll_28nm_clk_set_rate()
133 val = pll_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_3); in dsi_pll_28nm_clk_set_rate()
137 pll_write(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_3, in dsi_pll_28nm_clk_set_rate()
140 pll_write(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_6, in dsi_pll_28nm_clk_set_rate()
143 val = pll_read(base in dsi_pll_28nm_clk_set_rate()
165 void __iomem *base = pll_28nm->mmio; dsi_pll_28nm_clk_recalc_rate() local
291 void __iomem *base = pll_28nm->mmio; dsi_pll_28nm_enable_seq() local
341 void __iomem *base = pll_28nm->mmio; dsi_pll_28nm_save_state() local
357 void __iomem *base = pll_28nm->mmio; dsi_pll_28nm_restore_state() local
[all...] |
| /kernel/linux/linux-6.6/drivers/thermal/st/ |
| H A D | stm_thermal.c | 95 void __iomem *base; member
107 value = readl_relaxed(sensor->base + DTS_ITENR_OFFSET); in stm_enable_irq()
117 writel_relaxed(value, sensor->base + DTS_ITENR_OFFSET); in stm_enable_irq()
127 readl_relaxed(sensor->base + DTS_SR_OFFSET)); in stm_thermal_irq_handler()
134 writel_relaxed(ICIFR_MASK, sensor->base + DTS_ICIFR_OFFSET); in stm_thermal_irq_handler()
145 value = readl_relaxed(sensor->base + DTS_CFGR1_OFFSET); in stm_sensor_power_on()
147 writel_relaxed(value, sensor->base + DTS_CFGR1_OFFSET); in stm_sensor_power_on()
154 ret = readl_poll_timeout(sensor->base + DTS_SR_OFFSET, in stm_sensor_power_on()
161 value = readl_relaxed(sensor->base + in stm_sensor_power_on()
164 writel_relaxed(value, sensor->base in stm_sensor_power_on()
488 void __iomem *base; stm_thermal_probe() local
[all...] |
| /kernel/linux/linux-6.6/drivers/rtc/ |
| H A D | rtc-sc27xx.c | 107 u32 base; member
128 return regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR, in sprd_rtc_clear_alarm_ints()
137 ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_SPG_VALUE, &val); in sprd_rtc_lock_alarm()
147 ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_SPG_UPD, val); in sprd_rtc_lock_alarm()
153 rtc->base + SPRD_RTC_INT_RAW_STS, val, in sprd_rtc_lock_alarm()
162 return regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR, in sprd_rtc_lock_alarm()
196 ret = regmap_read(rtc->regmap, rtc->base + sec_reg, &val); in sprd_rtc_get_secs()
202 ret = regmap_read(rtc->regmap, rtc->base + min_reg, &val); in sprd_rtc_get_secs()
208 ret = regmap_read(rtc->regmap, rtc->base + hour_reg, &val); in sprd_rtc_get_secs()
214 ret = regmap_read(rtc->regmap, rtc->base in sprd_rtc_get_secs()
[all...] |
| /kernel/linux/linux-6.6/drivers/clk/imx/ |
| H A D | clk-fracn-gppll.c | 68 void __iomem *base; member
161 pll_numerator = readl_relaxed(pll->base + PLL_NUMERATOR); in clk_fracn_gppll_recalc_rate()
164 pll_denominator = readl_relaxed(pll->base + PLL_DENOMINATOR); in clk_fracn_gppll_recalc_rate()
167 pll_div = readl_relaxed(pll->base + PLL_DIV); in clk_fracn_gppll_recalc_rate()
220 return readl_poll_timeout(pll->base + PLL_STATUS, val, in clk_fracn_gppll_wait_lock()
235 tmp = readl_relaxed(pll->base + PLL_CTRL); in clk_fracn_gppll_set_rate()
237 writel_relaxed(tmp, pll->base + PLL_CTRL); in clk_fracn_gppll_set_rate()
240 tmp = readl_relaxed(pll->base + PLL_CTRL); in clk_fracn_gppll_set_rate()
242 writel_relaxed(tmp, pll->base + PLL_CTRL); in clk_fracn_gppll_set_rate()
246 writel_relaxed(tmp, pll->base in clk_fracn_gppll_set_rate()
342 _imx_clk_fracn_gppll(const char *name, const char *parent_name, void __iomem *base, const struct imx_fracn_gppll_clk *pll_clk, u32 pll_flags) _imx_clk_fracn_gppll() argument
380 imx_clk_fracn_gppll(const char *name, const char *parent_name, void __iomem *base, const struct imx_fracn_gppll_clk *pll_clk) imx_clk_fracn_gppll() argument
387 imx_clk_fracn_gppll_integer(const char *name, const char *parent_name, void __iomem *base, const struct imx_fracn_gppll_clk *pll_clk) imx_clk_fracn_gppll_integer() argument
[all...] |
| /kernel/linux/linux-6.6/crypto/ |
| H A D | crypto_engine.c | 30 struct crypto_alg base; member
153 struct crypto_engine_alg, base); in crypto_pump_requests()
280 return crypto_transfer_request_to_engine(engine, &req->base); in crypto_transfer_aead_request_to_engine()
293 return crypto_transfer_request_to_engine(engine, &req->base); in crypto_transfer_akcipher_request_to_engine()
306 return crypto_transfer_request_to_engine(engine, &req->base); in crypto_transfer_hash_request_to_engine()
319 return crypto_transfer_request_to_engine(engine, &req->base); in crypto_transfer_kpp_request_to_engine()
332 return crypto_transfer_request_to_engine(engine, &req->base); in crypto_transfer_skcipher_request_to_engine()
346 return crypto_finalize_request(engine, &req->base, err); in crypto_finalize_aead_request()
360 return crypto_finalize_request(engine, &req->base, err); in crypto_finalize_akcipher_request()
374 return crypto_finalize_request(engine, &req->base, er in crypto_finalize_hash_request()
[all...] |
| /kernel/linux/linux-6.6/drivers/phy/tegra/ |
| H A D | xusb.h | 59 struct tegra_xusb_lane base; member
65 return container_of(lane, struct tegra_xusb_usb3_lane, base); in to_usb3_lane()
69 struct tegra_xusb_lane base; member
78 return container_of(lane, struct tegra_xusb_usb2_lane, base); in to_usb2_lane()
82 struct tegra_xusb_lane base; member
88 return container_of(lane, struct tegra_xusb_ulpi_lane, base); in to_ulpi_lane()
92 struct tegra_xusb_lane base; member
107 return container_of(lane, struct tegra_xusb_hsic_lane, base); in to_hsic_lane()
111 struct tegra_xusb_lane base; member
117 return container_of(lane, struct tegra_xusb_pcie_lane, base); in to_pcie_lane()
121 struct tegra_xusb_lane base; global() member
193 struct tegra_xusb_pad base; global() member
206 struct tegra_xusb_pad base; global() member
220 struct tegra_xusb_pad base; global() member
230 struct tegra_xusb_pad base; global() member
243 struct tegra_xusb_pad base; global() member
258 struct tegra_xusb_pad base; global() member
314 struct tegra_xusb_port base; global() member
335 struct tegra_xusb_port base; global() member
350 struct tegra_xusb_port base; global() member
362 struct tegra_xusb_port base; global() member
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| H A D | gt215.c | 25 #define gt215_clk(p) container_of((p), struct gt215_clk, base)
35 struct nvkm_clk base; member
45 struct nvkm_device *device = clk->base.subdev.device; in read_vco()
63 struct nvkm_device *device = clk->base.subdev.device; in read_clk()
110 struct nvkm_device *device = clk->base.subdev.device; in read_pll()
143 gt215_clk_read(struct nvkm_clk *base, enum nv_clk_src src) in gt215_clk_read() argument
145 struct gt215_clk *clk = gt215_clk(base); in gt215_clk_read()
146 struct nvkm_subdev *subdev = &clk->base.subdev; in gt215_clk_read()
187 gt215_clk_info(struct nvkm_clk *base, int idx, u32 khz, in gt215_clk_info() argument
190 struct gt215_clk *clk = gt215_clk(base); in gt215_clk_info()
235 gt215_pll_info(struct nvkm_clk *base, int idx, u32 pll, u32 khz, struct gt215_clk_info *info) gt215_pll_info() argument
459 gt215_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate) gt215_clk_calc() argument
486 gt215_clk_prog(struct nvkm_clk *base) gt215_clk_prog() argument
516 gt215_clk_tidy(struct nvkm_clk *base) gt215_clk_tidy() argument
[all...] |
| /third_party/mesa3d/src/intel/compiler/ |
| H A D | intel_clc.c | 140 PROG_DATA_FIELD("%u", base.nr_params); in print_cs_prog_data_fields()
141 assert(cs_prog_data->base.stage == MESA_SHADER_COMPUTE); in print_cs_prog_data_fields()
142 fprintf(fp, "%s.base.stage = MESA_SHADER_COMPUTE,\n", pad); in print_cs_prog_data_fields()
143 assert(cs_prog_data->base.zero_push_reg == 0); in print_cs_prog_data_fields()
144 assert(cs_prog_data->base.push_reg_mask_param == 0); in print_cs_prog_data_fields()
145 PROG_DATA_FIELD("%u", base.curb_read_length); in print_cs_prog_data_fields()
146 PROG_DATA_FIELD("%u", base.total_scratch); in print_cs_prog_data_fields()
147 PROG_DATA_FIELD("%u", base.total_shared); in print_cs_prog_data_fields()
148 PROG_DATA_FIELD("%u", base.program_size); in print_cs_prog_data_fields()
149 PROG_DATA_FIELD("%u", base in print_cs_prog_data_fields()
[all...] |