Lines Matching refs:base
27 static unsigned int base[MAX_NUM_DIO48E];
29 module_param_hw_array(base, uint, ioport, &num_dio48e, 0);
30 MODULE_PARM_DESC(base, "ACCES 104-DIO-48E base addresses");
43 * @base: base port address of the GPIO device
52 unsigned base;
73 const unsigned control_addr = dio48egpio->base + 3 + control_port*4;
114 const unsigned control_addr = dio48egpio->base + 3 + control_port*4;
147 outb(dio48egpio->out_state[io_port], dio48egpio->base + out_port);
174 port_state = inb(dio48egpio->base + in_port);
196 port_addr = dio48egpio->base + ports[offset / 8];
220 outb(dio48egpio->out_state[port], dio48egpio->base + out_port);
238 port_addr = dio48egpio->base + ports[index];
277 inb(dio48egpio->base + 0xB);
297 outb(0x00, dio48egpio->base + 0xF);
298 outb(0x00, dio48egpio->base + 0xB);
344 outb(0x00, dio48egpio->base + 0xF);
376 inb(dio48egpio->base + 0xB);
392 if (!devm_request_region(dev, base[id], DIO48E_EXTENT, name)) {
394 base[id], base[id] + DIO48E_EXTENT);
401 dio48egpio->chip.base = -1;
411 dio48egpio->base = base[id];
426 outb(0x80, base[id] + 3);
427 outb(0x00, base[id]);
428 outb(0x00, base[id] + 1);
429 outb(0x00, base[id] + 2);
430 outb(0x00, base[id] + 3);
431 outb(0x80, base[id] + 7);
432 outb(0x00, base[id] + 4);
433 outb(0x00, base[id] + 5);
434 outb(0x00, base[id] + 6);
435 outb(0x00, base[id] + 7);