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/kernel/linux/linux-6.6/drivers/clk/hisilicon/
H A Dclk-hi3620.c411 void __iomem *base, struct device_node *np) in hisi_register_clk_mmc()
429 mclk->clken_reg = base + mmc_clk->clken_reg; in hisi_register_clk_mmc()
431 mclk->div_reg = base + mmc_clk->div_reg; in hisi_register_clk_mmc()
434 mclk->drv_reg = base + mmc_clk->drv_reg; in hisi_register_clk_mmc()
437 mclk->sam_reg = base + mmc_clk->sam_reg; in hisi_register_clk_mmc()
449 void __iomem *base; in hi3620_mmc_clk_init() local
458 base = of_iomap(node, 0); in hi3620_mmc_clk_init()
459 if (!base) { in hi3620_mmc_clk_init()
477 hisi_register_clk_mmc(mmc_clk, base, node); in hi3620_mmc_clk_init()
410 hisi_register_clk_mmc(struct hisi_mmc_clock *mmc_clk, void __iomem *base, struct device_node *np) hisi_register_clk_mmc() argument
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_fence.c53 struct dma_fence base; member
84 struct amdgpu_fence *__f = container_of(f, struct amdgpu_fence, base); in to_amdgpu_fence()
86 if (__f->base.ops == &amdgpu_fence_ops || in to_amdgpu_fence()
87 __f->base.ops == &amdgpu_job_fence_ops) in to_amdgpu_fence()
156 fence = &am_fence->base; in amdgpu_fence_emit()
723 if (!job->base.s_fence && !dma_fence_is_signaled(old)) in amdgpu_fence_driver_clear_job_fences()
786 return (const char *)to_amdgpu_ring(job->base.sched)->name; in amdgpu_job_fence_get_timeline_name()
816 if (!timer_pending(&to_amdgpu_ring(job->base.sched)->fence_drv.fallback_timer)) in amdgpu_job_fence_enable_signaling()
817 amdgpu_fence_schedule_fallback(to_amdgpu_ring(job->base.sched)); in amdgpu_job_fence_enable_signaling()
/kernel/linux/linux-6.6/drivers/gpio/
H A Dgpio-rcar.c42 void __iomem *base; member
71 return ioread32(p->base + offs); in gpio_rcar_read()
77 iowrite32(value, p->base + offs); in gpio_rcar_write()
278 error = pinctrl_gpio_request(chip->base + offset); in gpio_rcar_request()
289 pinctrl_gpio_free(chip->base + offset); in gpio_rcar_free()
524 p->base = devm_platform_ioremap_resource(pdev, 0); in gpio_rcar_probe()
525 if (IS_ERR(p->base)) { in gpio_rcar_probe()
526 ret = PTR_ERR(p->base); in gpio_rcar_probe()
543 gpio_chip->base = -1; in gpio_rcar_probe()
H A Dgpio-davinci.c250 chips->chip.base = pdata->no_auto_base ? pdata->base : -1; in davinci_gpio_probe()
628 void __iomem *base; in davinci_gpio_save_context() local
630 base = chips->regs[0] - offset_array[0]; in davinci_gpio_save_context()
631 chips->binten_context = readl_relaxed(base + BINTEN); in davinci_gpio_save_context()
652 void __iomem *base; in davinci_gpio_restore_context() local
654 base = chips->regs[0] - offset_array[0]; in davinci_gpio_restore_context()
656 if (readl_relaxed(base + BINTEN) != chips->binten_context) in davinci_gpio_restore_context()
657 writel_relaxed(chips->binten_context, base + BINTEN); in davinci_gpio_restore_context()
H A Dgpio-ml-ioh.c67 * @base: PCI base address of Memory mapped I/O register.
75 * @irq_base: Save base of IRQ number for interrupt
79 void __iomem *base; member
227 gpio->base = -1; in ioh_gpio_setup()
381 chip->base, handle_simple_irq); in ioh_gpio_alloc_generic_chip()
408 void __iomem *base; in ioh_gpio_probe() local
424 base = pcim_iomap_table(pdev)[1]; in ioh_gpio_probe()
425 if (!base) { in ioh_gpio_probe()
438 chip->base in ioh_gpio_probe()
[all...]
/kernel/linux/linux-6.6/drivers/dma/mediatek/
H A Dmtk-uart-apdma.c97 void __iomem *base; member
123 writel(val, c->base + reg); in mtk_uart_apdma_write()
128 return readl(c->base + reg); in mtk_uart_apdma_read()
287 ret = readx_poll_timeout(readl, c->base + VFF_EN, in mtk_uart_apdma_alloc_chan_resources()
405 ret = readx_poll_timeout(readl, c->base + VFF_FLUSH, in mtk_uart_apdma_terminate_all()
418 ret = readx_poll_timeout(readl, c->base + VFF_EN, in mtk_uart_apdma_terminate_all()
537 c->base = devm_platform_ioremap_resource(pdev, i); in mtk_uart_apdma_probe()
538 if (IS_ERR(c->base)) { in mtk_uart_apdma_probe()
539 rc = PTR_ERR(c->base); in mtk_uart_apdma_probe()
/kernel/linux/linux-6.6/drivers/pinctrl/mediatek/
H A Dpinctrl-moore.c512 return pinctrl_gpio_direction_input(chip->base + gpio); in mtk_gpio_direction_input()
520 return pinctrl_gpio_direction_output(chip->base + gpio); in mtk_gpio_direction_output()
575 chip->base = -1; in mtk_build_gpiochip()
659 "SoC should be assigned at least one register base\n"); in mtk_moore_pinctrl_probe()
661 hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names, in mtk_moore_pinctrl_probe()
662 sizeof(*hw->base), GFP_KERNEL); in mtk_moore_pinctrl_probe()
663 if (!hw->base) in mtk_moore_pinctrl_probe()
667 hw->base[i] = devm_platform_ioremap_resource_byname(pdev, in mtk_moore_pinctrl_probe()
669 if (IS_ERR(hw->base[i])) in mtk_moore_pinctrl_probe()
670 return PTR_ERR(hw->base[ in mtk_moore_pinctrl_probe()
[all...]
/kernel/linux/linux-6.6/arch/x86/kernel/
H A Dmpparse.c546 static int __init smp_scan_config(unsigned long base, unsigned long length) in smp_scan_config() argument
553 base, base + length - 1); in smp_scan_config()
557 bp = early_memremap(base, length); in smp_scan_config()
567 mpf_base = base; in smp_scan_config()
571 base, base + sizeof(*mpf) - 1); in smp_scan_config()
573 memblock_reserve(base, sizeof(*mpf)); in smp_scan_config()
584 base += 16; in smp_scan_config()
595 * FIXME: Linux assumes you have 640K of base ra in default_find_smp_config()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/
H A Ddrm_gem_vram_helper.c73 * // setup device, vram base and size
123 drm_gem_object_release(&gbo->bo.base); in drm_gem_vram_cleanup()
209 gem = &gbo->bo.base; in drm_gem_vram_create()
228 * to release gbo->bo.base and kfree gbo. in drm_gem_vram_create()
398 struct drm_device *dev = gbo->bo.base.dev; in drm_gem_vram_kunmap_locked()
437 dma_resv_assert_held(gbo->bo.base.resv); in drm_gem_vram_vmap()
465 dma_resv_assert_held(gbo->bo.base.resv); in drm_gem_vram_vunmap()
518 ret = drm_gem_handle_create(file, &gbo->bo.base, &handle); in drm_gem_vram_fill_create_dumb()
522 drm_gem_object_put(&gbo->bo.base); in drm_gem_vram_fill_create_dumb()
531 drm_gem_object_put(&gbo->bo.base); in drm_gem_vram_fill_create_dumb()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/ipu-v3/
H A Dipu-di.c18 void __iomem *base; member
125 return readl(di->base + offset); in ipu_di_read()
130 writel(value, di->base + offset); in ipu_di_write()
712 unsigned long base, in ipu_di_init()
733 di->base = devm_ioremap(dev, base, PAGE_SIZE); in ipu_di_init()
734 if (!di->base) in ipu_di_init()
739 dev_dbg(dev, "DI%d base: 0x%08lx remapped to %p\n", in ipu_di_init()
740 id, base, di->base); in ipu_di_init()
711 ipu_di_init(struct ipu_soc *ipu, struct device *dev, int id, unsigned long base, u32 module, struct clk *clk_ipu) ipu_di_init() argument
[all...]
/kernel/linux/linux-6.6/sound/soc/codecs/
H A Djz4770.c181 void __iomem *base; member
817 return readl_poll_timeout(codec->base + ICDC_RGADW_OFFSET, reg, in jz4770_codec_io_wait()
834 tmp = readl(codec->base + ICDC_RGADW_OFFSET); in jz4770_codec_reg_read()
837 writel(tmp, codec->base + ICDC_RGADW_OFFSET); in jz4770_codec_reg_read()
841 *val = readl(codec->base + ICDC_RGDATA_OFFSET) & in jz4770_codec_reg_read()
858 codec->base + ICDC_RGADW_OFFSET); in jz4770_codec_reg_write()
904 codec->base = devm_platform_ioremap_resource(pdev, 0); in jz4770_codec_probe()
905 if (IS_ERR(codec->base)) in jz4770_codec_probe()
906 return PTR_ERR(codec->base); in jz4770_codec_probe()
H A Djz4760.c165 void __iomem *base; member
767 return readl_poll_timeout(codec->base + ICDC_RGADW_OFFSET, reg, in jz4760_codec_io_wait()
784 tmp = readl(codec->base + ICDC_RGADW_OFFSET); in jz4760_codec_reg_read()
787 writel(tmp, codec->base + ICDC_RGADW_OFFSET); in jz4760_codec_reg_read()
791 *val = readl(codec->base + ICDC_RGDATA_OFFSET) & in jz4760_codec_reg_read()
808 codec->base + ICDC_RGADW_OFFSET); in jz4760_codec_reg_write()
852 codec->base = devm_platform_ioremap_resource(pdev, 0); in jz4760_codec_probe()
853 if (IS_ERR(codec->base)) in jz4760_codec_probe()
854 return PTR_ERR(codec->base); in jz4760_codec_probe()
/kernel/linux/linux-5.10/drivers/firewire/
H A Dnosy.h59 #define DMA_BREG(base, chan) (base + chan * 0x20)
60 #define DMA_SREG(base, chan) (base + chan * 0x10)
/kernel/linux/linux-5.10/arch/xtensa/platforms/xtfpga/
H A Dsetup.c77 void __iomem *base = of_iomap(np, 0); in xtfpga_clk_setup() local
81 if (!base) { in xtfpga_clk_setup()
86 freq = __raw_readl(base); in xtfpga_clk_setup()
87 iounmap(base); in xtfpga_clk_setup()
/kernel/linux/linux-5.10/arch/mips/include/asm/mach-loongson64/
H A Dloongson.h44 #define LOONGSON3_REG8(base, x) \
45 (*(volatile u8 *)((char *)TO_UNCAC(base) + (x)))
47 #define LOONGSON3_REG32(base, x) \
48 (*(volatile u32 *)((char *)TO_UNCAC(base) + (x)))
194 /* PCI prefetch window base & mask */
/kernel/linux/linux-5.10/arch/parisc/boot/compressed/
H A Dmisc.c154 static int print_num(unsigned long num, int base) in print_num() argument
162 str[i--] = hex[num % base]; in print_num()
163 num = num / base; in print_num()
166 if (base == 16) { in print_num()
/kernel/linux/linux-5.10/arch/x86/include/asm/
H A Dfloppy.h34 #define fd_inb(base, reg) inb_p((base) + (reg))
35 #define fd_outb(value, base, reg) outb_p(value, (base) + (reg))
/kernel/linux/linux-5.10/arch/x86/crypto/
H A Dsha1_ssse3_glue.c94 .base = {
143 .base = {
225 .base = {
275 .base = {
/kernel/linux/linux-5.10/drivers/base/regmap/
H A Dinternal.h252 const void *base, in regcache_get_val_addr()
255 return base + (map->cache_word_size * idx); in regcache_get_val_addr()
258 unsigned int regcache_get_val(struct regmap *map, const void *base,
260 bool regcache_set_val(struct regmap *map, void *base, unsigned int idx,
251 regcache_get_val_addr(struct regmap *map, const void *base, unsigned int idx) regcache_get_val_addr() argument
/kernel/linux/linux-5.10/drivers/clk/imx/
H A Dclk-imx8qxp-lpcg.c169 void __iomem *base; in imx8qxp_lpcg_clk_probe() local
190 base = devm_ioremap(dev, res->start, resource_size(res)); in imx8qxp_lpcg_clk_probe()
191 if (!base) in imx8qxp_lpcg_clk_probe()
205 lpcg->flags, base + lpcg->offset, in imx8qxp_lpcg_clk_probe()
/kernel/linux/linux-5.10/drivers/clk/rockchip/
H A Dclk-half-divider.c160 u8 num_parents, void __iomem *base, in rockchip_clk_register_halfdiv()
181 mux->reg = base + muxdiv_offset; in rockchip_clk_register_halfdiv()
196 gate->reg = base + gate_offset; in rockchip_clk_register_halfdiv()
208 div->reg = base + muxdiv_offset; in rockchip_clk_register_halfdiv()
158 rockchip_clk_register_halfdiv(const char *name, const char *const *parent_names, u8 num_parents, void __iomem *base, int muxdiv_offset, u8 mux_shift, u8 mux_width, u8 mux_flags, u8 div_shift, u8 div_width, u8 div_flags, int gate_offset, u8 gate_shift, u8 gate_flags, unsigned long flags, spinlock_t *lock) rockchip_clk_register_halfdiv() argument
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_mmhubbub.c37 mcif_wb30->base.ctx
82 /* Set base address and region size for warmup */ in mmhubbub3_warmup_mcif()
231 mcif_wb30->base.ctx = ctx; in dcn30_mmhubbub_construct()
233 mcif_wb30->base.inst = inst; in dcn30_mmhubbub_construct()
234 mcif_wb30->base.funcs = &dcn30_mmhubbub_funcs; in dcn30_mmhubbub_construct()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_opp.c40 oppn10->base.ctx
418 oppn10->base.ctx = ctx; in dcn10_opp_construct()
419 oppn10->base.inst = inst; in dcn10_opp_construct()
420 oppn10->base.funcs = &dcn10_opp_funcs; in dcn10_opp_construct()
/kernel/linux/linux-5.10/drivers/mtd/nand/raw/
H A Dnand_toshiba.c148 struct nand_device *base = &chip->base; in toshiba_nand_decode_id() local
153 memorg = nanddev_get_memorg(&chip->base); in toshiba_nand_decode_id()
198 nanddev_set_ecc_requirements(base, &requirements); in toshiba_nand_decode_id()
/kernel/linux/linux-5.10/drivers/net/ethernet/hisilicon/hns3/hns3vf/
H A Dhclgevf_cmd.h289 static inline void hclgevf_write_reg(void __iomem *base, u32 reg, u32 value) in hclgevf_write_reg() argument
291 writel(value, base + reg); in hclgevf_write_reg()
294 static inline u32 hclgevf_read_reg(u8 __iomem *base, u32 reg) in hclgevf_read_reg() argument
296 u8 __iomem *reg_addr = READ_ONCE(base); in hclgevf_read_reg()

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