/third_party/libdrm/tests/tegra/ |
H A D | vic41.c | 32 struct vic base; member 51 struct vic41 *vic = container_of(v, struct vic41, base); in vic41_fill() 91 struct vic41 *vic = container_of(v, struct vic41, base); in vic41_blit() 160 struct vic41 *vic = container_of(v, struct vic41, base); in vic41_flip() 231 struct vic41 *vic = container_of(v, struct vic41, base); in vic41_execute() 256 struct vic41 *vic = container_of(v, struct vic41, base); in vic41_free() 288 vic->base.drm = drm; in vic41_new() 289 vic->base.channel = channel; in vic41_new() 290 vic->base.ops = &vic41_ops; in vic41_new() 291 vic->base in vic41_new() [all...] |
H A D | vic42.c | 32 struct vic base; member 51 struct vic42 *vic = container_of(v, struct vic42, base); in vic42_fill() 91 struct vic42 *vic = container_of(v, struct vic42, base); in vic42_blit() 160 struct vic42 *vic = container_of(v, struct vic42, base); in vic42_flip() 231 struct vic42 *vic = container_of(v, struct vic42, base); in vic42_execute() 256 struct vic42 *vic = container_of(v, struct vic42, base); in vic42_free() 288 vic->base.drm = drm; in vic42_new() 289 vic->base.channel = channel; in vic42_new() 290 vic->base.ops = &vic42_ops; in vic42_new() 291 vic->base in vic42_new() [all...] |
H A D | vic40.c | 32 struct vic base; member 51 struct vic40 *vic = container_of(v, struct vic40, base); in vic40_fill() 91 struct vic40 *vic = container_of(v, struct vic40, base); in vic40_blit() 160 struct vic40 *vic = container_of(v, struct vic40, base); in vic40_flip() 231 struct vic40 *vic = container_of(v, struct vic40, base); in vic40_execute() 252 struct vic40 *vic = container_of(v, struct vic40, base); in vic40_free() 284 vic->base.drm = drm; in vic40_new() 285 vic->base.channel = channel; in vic40_new() 286 vic->base.ops = &vic40_ops; in vic40_new() 287 vic->base in vic40_new() [all...] |
H A D | vic30.c | 32 struct vic base; member 56 struct vic30 *vic = container_of(v, struct vic30, base); in vic30_fill() 105 struct vic30 *vic = container_of(v, struct vic30, base); in vic30_blit() 213 struct vic30 *vic = container_of(v, struct vic30, base); in vic30_flip() 323 struct vic30 *vic = container_of(v, struct vic30, base); in vic30_execute() 345 struct vic30 *vic = container_of(v, struct vic30, base); in vic30_free() 380 vic->base.drm = drm; in vic30_new() 381 vic->base.channel = channel; in vic30_new() 382 vic->base.ops = &vic30_ops; in vic30_new() 383 vic->base in vic30_new() [all...] |
/third_party/node/deps/v8/src/base/platform/ |
H A D | platform.h | 30 #include "src/base/base-export.h" 31 #include "src/base/build_config.h" 32 #include "src/base/compiler-specific.h" 33 #include "src/base/optional.h" 34 #include "src/base/platform/mutex.h" 35 #include "src/base/platform/semaphore.h" 39 #include "src/base/qnx-math.h" 63 namespace base { namespace 344 friend class v8::base 428 void* base() const { return base_; } base() function in v8::base::AddressSpaceReservation 432 Address base = reinterpret_cast<Address>(base_); Contains() local 478 AddressSpaceReservation(void* base, size_t size, zx_handle_t vmar) AddressSpaceReservation() argument 481 AddressSpaceReservation(void* base, size_t size) AddressSpaceReservation() argument [all...] |
/third_party/node/deps/v8/src/heap/ |
H A D | paged-spaces.h | 12 #include "src/base/bounds.h" 13 #include "src/base/macros.h" 14 #include "src/base/optional.h" 15 #include "src/base/platform/mutex.h" 52 // The pointer compression cage base value used for decompression of all 148 V8_WARN_UNUSED_RESULT base::Optional<std::pair<Address, size_t>> 281 base::Mutex* mutex() { return &space_mutex_; } in mutex() 314 base::SharedMutexGuard<base::kExclusive> guard(&pending_allocation_mutex_); in MoveOriginalTopForward() 320 base [all...] |
/third_party/node/deps/v8/src/regexp/experimental/ |
H A D | experimental-compiler.cc | 7 #include "src/base/strings.h" 18 constexpr base::uc32 kMaxSupportedCodepoint = 0xFFFFu; 20 constexpr base::uc32 kMaxCodePoint = 0x10ffff; 232 void ConsumeRange(base::uc16 from, base::uc16 to) { in ConsumeRange() 404 // by (complements of) ranges with base::uc16 bounds. 406 std::numeric_limits<base::uc16>::max()); 408 base::uc32 from = (*ranges)[i].from(); 410 base::uc16 from_uc16 = static_cast<base [all...] |
/third_party/node/deps/v8/src/torque/ |
H A D | declarations.cc | 79 base::Optional<const Type*> Declarations::TryLookupType( in TryLookupType() 82 if (decls.empty()) return base::nullopt; in TryLookupType() 123 base::Optional<Builtin*> Declarations::TryLookupBuiltin( in TryLookupBuiltin() 126 if (builtins.empty()) return base::nullopt; in TryLookupBuiltin() 154 base::Optional<GenericType*> Declarations::TryLookupGenericType( in TryLookupGenericType() 157 if (results.empty()) return base::nullopt; in TryLookupGenericType() 184 base::Optional<Statement*> body, in CreateTorqueMacro() 202 base::Optional<std::string> external_assembler_name, in DeclareMacro() 203 const Signature& signature, base::Optional<Statement*> body, in DeclareMacro() 204 base in DeclareMacro() [all...] |
/third_party/mesa3d/src/gallium/drivers/iris/ |
H A D | iris_measure.c | 41 measure_batch_free(struct intel_measure_batch *base) in measure_batch_free() argument 44 container_of(base, struct iris_measure_batch, base); in measure_batch_free() 123 measure->base.timestamps = iris_bo_map(NULL, measure->bo, MAP_READ); in iris_init_batch_measure() 124 measure->base.framebuffer = in iris_init_batch_measure() 147 struct intel_measure_batch *measure_batch = &batch->measure->base; in measure_start_snapshot() 208 struct intel_measure_batch *measure_batch = &batch->measure->base; in measure_end_snapshot() 243 return intel_measure_state_changed(&batch->measure->base, in state_changed() 252 &ice->batches[IRIS_BATCH_RENDER].measure->base; in iris_measure_renderpass() 281 struct intel_measure_batch* measure_batch = &batch->measure->base; in _iris_measure_snapshot() [all...] |
/third_party/mesa3d/src/panfrost/midgard/ |
H A D | compiler.h | 191 pan_block base; member 333 list_addtail(&u->link, &ctx->current_block->base.instructions); in emit_mir_instruction() 369 list_for_each_entry_from(pan_block, v, &from->base, &ctx->blocks, link) 372 list_for_each_entry(struct midgard_instruction, v, &block->base.instructions, link) 374 list_for_each_entry_rev(struct midgard_instruction, v, &block->base.instructions, link) 377 list_for_each_entry_safe(struct midgard_instruction, v, &block->base.instructions, link) 380 list_for_each_entry_safe_rev(struct midgard_instruction, v, &block->base.instructions, link) 383 list_for_each_entry_from(struct midgard_instruction, v, from, &block->base.instructions, link) 386 list_for_each_entry_from_rev(struct midgard_instruction, v, from, &block->base.instructions, link) 415 for (_entry_##v = _mesa_set_next_entry(blk->base [all...] |
/third_party/mesa3d/src/gallium/auxiliary/gallivm/ |
H A D | lp_bld_tgsi.c | 96 LLVMVoidTypeInContext(bld_base->base.gallivm->context); in lp_build_action_set_dst_type() 109 struct lp_build_context * base = &bld_base->base; in lp_build_tgsi_intrinsic() local 111 base->gallivm->builder, action->intr_name, in lp_build_tgsi_intrinsic() 275 emit_data.output[chan_index] = bld_base->base.undef; in lp_build_tgsi_inst_llvm() 280 emit_data.output1[chan_index] = bld_base->base.undef; in lp_build_tgsi_inst_llvm() 358 return bld_base->base.undef; in lp_build_emit_fetch_src() 365 return bld_base->base.undef; in lp_build_emit_fetch_src() 378 return bld_base->base.undef; in lp_build_emit_fetch_src() 386 res = lp_build_abs(&bld_base->base, re in lp_build_emit_fetch_src() [all...] |
/third_party/mesa3d/src/gallium/auxiliary/vl/ |
H A D | vl_video_buffer.c | 231 pipe = buf->base.context; in vl_video_buffer_sampler_view_planes() 268 pipe = buf->base.context; in vl_video_buffer_sampler_view_components() 270 vl_get_video_buffer_formats(pipe->screen, buf->base.buffer_format, sampler_format); in vl_video_buffer_sampler_view_components() 271 plane_order = vl_video_buffer_plane_order(buf->base.buffer_format); in vl_video_buffer_sampler_view_components() 314 pipe = buf->base.context; in vl_video_buffer_surfaces() 452 buffer->base = *tmpl; in vl_video_buffer_create_ex2() 453 buffer->base.context = pipe; in vl_video_buffer_create_ex2() 454 buffer->base.destroy = vl_video_buffer_destroy; in vl_video_buffer_create_ex2() 455 buffer->base.get_sampler_view_planes = vl_video_buffer_sampler_view_planes; in vl_video_buffer_create_ex2() 456 buffer->base in vl_video_buffer_create_ex2() [all...] |
/third_party/skia/third_party/externals/swiftshader/src/Reactor/ |
H A D | EmulatedIntrinsics.cpp | 60 void gather(T &out, RValue<Pointer<EL>> base, RValue<Int4> offsets, RValue<Int4> mask, unsigned int alignment, bool zeroMaskedLanes) in gather() argument 65 Pointer<Byte> baseBytePtr = base; in gather() 84 void scatter(RValue<Pointer<EL>> base, RValue<T> val, RValue<Int4> offsets, RValue<Int4> mask, unsigned int alignment) 89 Pointer<Byte> baseBytePtr = base; 130 RValue<Float4> Gather(RValue<Pointer<Float>> base, RValue<Int4> offsets, RValue<Int4> mask, unsigned int alignment, bool zeroMaskedLanes /* = false */) 133 gather(result, base, offsets, mask, alignment, zeroMaskedLanes); 137 RValue<Int4> Gather(RValue<Pointer<Int>> base, RValue<Int4> offsets, RValue<Int4> mask, unsigned int alignment, bool zeroMaskedLanes /* = false */) 140 gather(result, base, offsets, mask, alignment, zeroMaskedLanes); 144 void Scatter(RValue<Pointer<Float>> base, RValue<Float4> val, RValue<Int4> offsets, RValue<Int4> mask, unsigned int alignment) 146 scatter(base, va [all...] |
/third_party/vixl/src/aarch32/ |
H A D | instructions-aarch32.cc | 662 uint32_t base = value & 0xff; in Decode() local 665 return base; in Decode() 667 return base | (base << 16); in Decode() 669 return (base << 8) | (base << 24); in Decode() 671 return base | (base << 8) | (base << 16) | (base << 2 in Decode() [all...] |
/third_party/python/Lib/test/test_importlib/ |
H A D | util.py | 57 def specialize_class(cls, kind, base=None, **kwargs): 60 if base is None: 61 base = unittest.TestCase 62 elif not isinstance(base, type): 63 base = base[kind] 65 bases = (cls, base) 76 def split_frozen(cls, base=None, **kwargs): 77 frozen = specialize_class(cls, 'Frozen', base, **kwargs) 78 source = specialize_class(cls, 'Source', base, **kwarg [all...] |
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/amdgpu_dm/ |
H A D | amdgpu_dm.c | 187 struct drm_connector *connector = &aconnector->base; in update_subconnector_property() 196 drm_object_property_set_value(&connector->base, in update_subconnector_property() 282 * TODO rework base driver to use values directly. in dm_crtc_get_scanoutpos() 455 drm_crtc_accurate_vblank_count(&amdgpu_crtc->base); in dm_pflip_high_irq() 461 drm_crtc_send_vblank_event(&amdgpu_crtc->base, e); in dm_pflip_high_irq() 464 drm_crtc_vblank_put(&amdgpu_crtc->base); in dm_pflip_high_irq() 481 e->sequence = drm_crtc_vblank_count(&amdgpu_crtc->base); in dm_pflip_high_irq() 484 list_add_tail(&e->base.link, &adev_to_drm(adev)->vblank_event_list); in dm_pflip_high_irq() 494 amdgpu_get_vblank_counter_kms(&amdgpu_crtc->base); in dm_pflip_high_irq() 519 drm_dev = acrtc->base in dm_vupdate_high_irq() [all...] |
/base/security/certificate_framework/frameworks/adapter/v1.0/src/ |
H A D | x509_crl_openssl.c | 37 HcfX509CrlSpi base; member 459 crlEntry->base.destroy((CfObjectBase *)crlEntry); in DestroyCRLEntryArray() 1159 returnCRL->base.base.getClass = GetClass; in HcfCX509CrlSpiCreate() 1160 returnCRL->base.base.destroy = Destroy; in HcfCX509CrlSpiCreate() 1161 returnCRL->base.engineIsRevoked = IsRevoked; in HcfCX509CrlSpiCreate() 1162 returnCRL->base.engineGetType = GetType; in HcfCX509CrlSpiCreate() 1163 returnCRL->base.engineGetEncoded = GetEncoded; in HcfCX509CrlSpiCreate() 1164 returnCRL->base in HcfCX509CrlSpiCreate() [all...] |
/device/soc/rockchip/common/vendor/drivers/media/platform/rockchip/isp/ |
H A D | capture_v1x.c | 119 * memory base addresses should be with respect
138 /* y/c base addr: burstN * bus alignment */
in calc_burst_len() 186 void __iomem *base = stream->ispdev->base_addr;
in mp_config_mi() local 197 mp_set_uv_swap(base);
in mp_config_mi() 201 mp_mi_ctrl_set_format(base, stream->out_isp_fmt.write_format);
in mp_config_mi() 202 mp_mi_ctrl_autoupdate_en(base);
in mp_config_mi() 239 void __iomem *base = stream->ispdev->base_addr;
in sp_config_mi() local 258 sp_set_y_width(base, stream->out_fmt.width);
in sp_config_mi() 261 sp_set_y_height(base, stream->out_fmt.height / 0x02);
in sp_config_mi() 262 sp_set_y_line_length(base, strea in sp_config_mi() 285 void __iomem *base = stream->ispdev->base_addr; mp_enable_mi() local 298 void __iomem *base = stream->ispdev->base_addr; sp_enable_mi() local 306 void __iomem *base = dev->base_addr; mp_disable_mi() local 313 void __iomem *base = stream->ispdev->base_addr; sp_disable_mi() local 322 void __iomem *base = stream->ispdev->base_addr; update_mi() local [all...] |
/kernel/linux/linux-5.10/drivers/mtd/nand/raw/ |
H A D | arasan-nand-controller.c | 176 * @base: Remapped register area 186 void __iomem *base; member 210 ret = readl_relaxed_poll_timeout(nfc->base + INTR_STS_REG, val, in anfc_wait_for_event() 218 writel_relaxed(event, nfc->base + INTR_STS_REG); in anfc_wait_for_event() 231 ret = readl_relaxed_poll_timeout(nfc->base + READY_STS_REG, val, in anfc_wait_for_rb() 236 readl_relaxed(nfc->base + READY_STS_REG)); in anfc_wait_for_rb() 245 writel_relaxed(nfc_op->pkt_reg, nfc->base + PKT_REG); in anfc_trigger_op() 246 writel_relaxed(nfc_op->addr1_reg, nfc->base + MEM_ADDR1_REG); in anfc_trigger_op() 247 writel_relaxed(nfc_op->addr2_reg, nfc->base + MEM_ADDR2_REG); in anfc_trigger_op() 248 writel_relaxed(nfc_op->cmd_reg, nfc->base in anfc_trigger_op() [all...] |
/kernel/linux/linux-5.10/drivers/phy/rockchip/ |
H A D | phy-rockchip-inno-usb2.c | 230 static inline int property_enable(struct regmap *base, in property_enable() argument 239 return regmap_write(base, reg->offset, val); in property_enable() 242 static inline bool property_enabled(struct regmap *base, in property_enabled() argument 249 ret = regmap_read(base, reg->offset, &orig); in property_enabled() 261 struct regmap *base = get_reg_base(rphy); in rockchip_usb2phy_clk480m_prepare() local 265 if (!property_enabled(base, &rphy->phy_cfg->clkout_ctl)) { in rockchip_usb2phy_clk480m_prepare() 266 ret = property_enable(base, &rphy->phy_cfg->clkout_ctl, true); in rockchip_usb2phy_clk480m_prepare() 281 struct regmap *base = get_reg_base(rphy); in rockchip_usb2phy_clk480m_unprepare() local 284 property_enable(base, &rphy->phy_cfg->clkout_ctl, false); in rockchip_usb2phy_clk480m_unprepare() 291 struct regmap *base in rockchip_usb2phy_clk480m_prepared() local 457 struct regmap *base = get_reg_base(rphy); rockchip_usb2phy_power_on() local 486 struct regmap *base = get_reg_base(rphy); rockchip_usb2phy_power_off() local 658 struct regmap *base = get_reg_base(rphy); rockchip_chg_enable_dcd() local 667 struct regmap *base = get_reg_base(rphy); rockchip_chg_enable_primary_det() local 676 struct regmap *base = get_reg_base(rphy); rockchip_chg_enable_secondary_det() local 691 struct regmap *base = get_reg_base(rphy); rockchip_chg_detect_work() local [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/edp/ |
H A D | edp_ctrl.c | 57 void __iomem *base; member 390 edp_write(ctrl->base + REG_EDP_INTERRUPT_REG_1, EDP_INTR_MASK1); in edp_ctrl_irq_enable() 391 edp_write(ctrl->base + REG_EDP_INTERRUPT_REG_2, EDP_INTR_MASK2); in edp_ctrl_irq_enable() 393 edp_write(ctrl->base + REG_EDP_INTERRUPT_REG_1, 0x0); in edp_ctrl_irq_enable() 394 edp_write(ctrl->base + REG_EDP_INTERRUPT_REG_2, 0x0); in edp_ctrl_irq_enable() 456 edp_write(ctrl->base + REG_EDP_CONFIGURATION_CTRL, data); in edp_config_ctrl() 461 edp_write(ctrl->base + REG_EDP_STATE_CTRL, state); in edp_state_ctrl() 546 data = edp_read(ctrl->base + REG_EDP_MAINLINK_READY); in edp_host_train_set() 822 data = edp_read(ctrl->base + REG_EDP_MISC1_MISC0); in edp_clock_synchrous() 842 edp_write(ctrl->base in edp_clock_synchrous() [all...] |
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
H A D | g4x_dp.c | 59 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in g4x_dp_set_clock() 91 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_dp_prepare() 169 struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev); in assert_dp_port() 174 dig_port->base.base.base.id, dig_port->base.base.name, in assert_dp_port() 194 struct drm_i915_private *dev_priv = to_i915(crtc->base in ilk_edp_pll_on() [all...] |
/third_party/node/deps/v8/src/diagnostics/arm/ |
H A D | disasm-arm.cc | 14 // v8::base::EmbeddedVector<char, 256> buffer; 33 #include "src/base/bits.h" 34 #include "src/base/platform/platform.h" 35 #include "src/base/strings.h" 36 #include "src/base/vector.h" 52 Decoder(const disasm::NameConverter& converter, base::Vector<char> out_buffer) in Decoder() 138 base::Vector<char> out_buffer_; 214 out_buffer_pos_ += base::SNPrintF(out_buffer_ + out_buffer_pos_, ", %s #%d", in PrintShiftRm() 219 out_buffer_pos_ += base::SNPrintF(out_buffer_ + out_buffer_pos_, ", %s ", in PrintShiftRm() 230 int imm = base in PrintShiftImm() [all...] |
/third_party/mesa3d/src/gallium/auxiliary/driver_trace/ |
H A D | tr_screen.c | 1399 tr_scr->base._member = screen->_member ? trace_screen_##_member : NULL in trace_screen_create() 1401 tr_scr->base.destroy = trace_screen_destroy; in trace_screen_create() 1402 tr_scr->base.get_name = trace_screen_get_name; in trace_screen_create() 1403 tr_scr->base.get_vendor = trace_screen_get_vendor; in trace_screen_create() 1404 tr_scr->base.get_device_vendor = trace_screen_get_device_vendor; in trace_screen_create() 1407 tr_scr->base.get_param = trace_screen_get_param; in trace_screen_create() 1408 tr_scr->base.get_shader_param = trace_screen_get_shader_param; in trace_screen_create() 1409 tr_scr->base.get_paramf = trace_screen_get_paramf; in trace_screen_create() 1410 tr_scr->base.get_compute_param = trace_screen_get_compute_param; in trace_screen_create() 1411 tr_scr->base in trace_screen_create() [all...] |
/kernel/linux/linux-5.10/drivers/crypto/chelsio/ |
H A D | chcr_algo.c | 227 req->base.complete(&req->base, err); in chcr_handle_aead_resp() 702 skcipher_request_set_callback(&reqctx->fallback_req, req->base.flags, in chcr_cipher_fallback() 703 req->base.complete, req->base.data); in chcr_cipher_fallback() 724 container_of(req, struct aead_request, base); in get_qidxs() 733 container_of(req, struct skcipher_request, base); in get_qidxs() 743 container_of(req, struct ahash_request, base); in get_qidxs() 821 gfp_t flags = wrparam->req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP ? in create_cipher_wr() 889 create_wreq(c_ctx(tfm), chcr_req, &(wrparam->req->base), reqct in create_cipher_wr() [all...] |