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/kernel/linux/linux-5.10/arch/x86/boot/
H A Dstring.h27 unsigned int base);
29 int kstrtoull(const char *s, unsigned int base, unsigned long long *res);
30 int boot_kstrtoul(const char *s, unsigned int base, unsigned long *res);
/kernel/linux/linux-5.10/drivers/clk/sunxi-ng/
H A Dccu_mmc_timing.c32 val = readl(cm->base + cm->reg); in sunxi_ccu_set_mmc_timing_mode()
37 writel(val, cm->base + cm->reg); in sunxi_ccu_set_mmc_timing_mode()
61 return !!(readl(cm->base + cm->reg) & CCU_MMC_NEW_TIMING_MODE); in sunxi_ccu_get_mmc_timing_mode()
/kernel/linux/linux-5.10/drivers/clocksource/
H A Dclksrc-dbx500-prcmu.c32 void __iomem *base = clksrc_dbx500_timer_base; in clksrc_dbx500_prcmu_read() local
36 count = readl_relaxed(base + PRCMU_TIMER_DOWNCOUNT); in clksrc_dbx500_prcmu_read()
37 count2 = readl_relaxed(base + PRCMU_TIMER_DOWNCOUNT); in clksrc_dbx500_prcmu_read()
H A Dexynos_mct.c82 unsigned long base; member
352 unsigned long offset = mevt->base + MCT_L_TCON_OFFSET; in exynos4_mct_tick_stop()
371 exynos4_mct_write(tmp, mevt->base + MCT_L_ICNTB_OFFSET); in exynos4_mct_tick_start()
374 exynos4_mct_write(0x1, mevt->base + MCT_L_INT_ENB_OFFSET); in exynos4_mct_tick_start()
376 tmp = readl_relaxed(reg_base + mevt->base + MCT_L_TCON_OFFSET); in exynos4_mct_tick_start()
379 exynos4_mct_write(tmp, mevt->base + MCT_L_TCON_OFFSET); in exynos4_mct_tick_start()
385 if (readl_relaxed(reg_base + mevt->base + MCT_L_INT_CSTAT_OFFSET) & 1) in exynos4_mct_tick_clear()
386 exynos4_mct_write(0x1, mevt->base + MCT_L_INT_CSTAT_OFFSET); in exynos4_mct_tick_clear()
448 mevt->base = EXYNOS4_MCT_L_BASE(cpu); in exynos4_mct_starting_cpu()
462 exynos4_mct_write(TICK_BASE_CNT, mevt->base in exynos4_mct_starting_cpu()
[all...]
/kernel/linux/linux-6.6/arch/powerpc/include/asm/
H A Dtask_size_64.h75 #define arch_get_mmap_base(addr, base) \
76 (((addr) > DEFAULT_MAP_WINDOW) ? (base) + TASK_SIZE - DEFAULT_MAP_WINDOW : (base))
/kernel/linux/linux-5.10/drivers/gpu/drm/omapdrm/dss/
H A DMakefile4 obj-$(CONFIG_OMAP_DSS_BASE) += omapdss-base.o
5 omapdss-base-y := base.o display.o output.o
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/
H A Dnouveau_crtc.h35 struct drm_crtc base; member
74 return crtc ? container_of(crtc, struct nouveau_crtc, base) : NULL; in nouveau_crtc()
79 return &crtc->base; in to_drm_crtc()
/kernel/linux/linux-5.10/include/crypto/internal/
H A Dacompress.h23 return tfm->base.__crt_ctx; in acomp_tfm_ctx()
29 req->base.complete(&req->base, err); in acomp_request_complete()
/kernel/linux/linux-5.10/include/linux/amba/
H A Dsp810.h53 static inline void sysctl_soft_reset(void __iomem *base) in sysctl_soft_reset() argument
56 writel(0x2, base + SCCTRL); in sysctl_soft_reset()
59 writel(0, base + SCSYSSTAT); in sysctl_soft_reset()
/kernel/linux/linux-5.10/include/linux/
H A Ddw_apb_timer.h20 void __iomem *base; member
43 void __iomem *base, int irq, unsigned long freq);
45 dw_apb_clocksource_init(unsigned rating, const char *name, void __iomem *base,
/kernel/linux/linux-6.6/drivers/accel/ivpu/
H A Divpu_mmu.h12 void *base; member
17 void *base; member
24 void *base; member
/kernel/linux/linux-6.6/include/linux/amba/
H A Dsp810.h53 static inline void sysctl_soft_reset(void __iomem *base) in sysctl_soft_reset() argument
56 writel(0x2, base + SCCTRL); in sysctl_soft_reset()
59 writel(0, base + SCSYSSTAT); in sysctl_soft_reset()
/kernel/linux/linux-6.6/include/linux/
H A Ddw_apb_timer.h20 void __iomem *base; member
43 void __iomem *base, int irq, unsigned long freq);
45 dw_apb_clocksource_init(unsigned rating, const char *name, void __iomem *base,
/kernel/linux/linux-6.6/drivers/clk/sunxi-ng/
H A Dccu_mmc_timing.c32 val = readl(cm->base + cm->reg); in sunxi_ccu_set_mmc_timing_mode()
37 writel(val, cm->base + cm->reg); in sunxi_ccu_set_mmc_timing_mode()
61 return !!(readl(cm->base + cm->reg) & CCU_MMC_NEW_TIMING_MODE); in sunxi_ccu_get_mmc_timing_mode()
/kernel/linux/linux-6.6/drivers/clocksource/
H A Dclksrc-dbx500-prcmu.c32 void __iomem *base = clksrc_dbx500_timer_base; in clksrc_dbx500_prcmu_read() local
36 count = readl_relaxed(base + PRCMU_TIMER_DOWNCOUNT); in clksrc_dbx500_prcmu_read()
37 count2 = readl_relaxed(base + PRCMU_TIMER_DOWNCOUNT); in clksrc_dbx500_prcmu_read()
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/
H A Dnouveau_crtc.h35 struct drm_crtc base; member
75 return crtc ? container_of(crtc, struct nouveau_crtc, base) : NULL; in nouveau_crtc()
80 return &crtc->base; in to_drm_crtc()
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dgp100.c30 gp100_fb_init_unkn(struct nvkm_fb *base) in gp100_fb_init_unkn() argument
32 struct nvkm_device *device = gf100_fb(base)->base.subdev.device; in gp100_fb_init_unkn()
/kernel/linux/linux-5.10/drivers/gpio/
H A Dgpio-mockup.c29 * We're storing two values per chip: the GPIO base and the number
404 int rv, base, i; in gpio_mockup_probe() local
409 rv = device_property_read_u32(dev, "gpio-base", &base); in gpio_mockup_probe()
411 base = -1; in gpio_mockup_probe()
428 gc->base = base; in gpio_mockup_probe()
520 int prop = 0, base; in gpio_mockup_register_chip() local
529 base = gpio_mockup_range_base(idx); in gpio_mockup_register_chip()
530 if (base > in gpio_mockup_register_chip()
[all...]
/kernel/linux/linux-5.10/drivers/clk/davinci/
H A Dpsc.c363 void __iomem *base) in __davinci_psc_register_clocks()
400 regmap = regmap_init_mmio(dev, base, &davinci_psc_regmap_config); in __davinci_psc_register_clocks()
456 void __iomem *base) in davinci_psc_register_clocks()
460 psc = __davinci_psc_register_clocks(dev, info, num_clks, base); in davinci_psc_register_clocks()
481 void __iomem *base) in of_davinci_psc_clk_init()
486 psc = __davinci_psc_register_clocks(dev, info, num_clks, base); in of_davinci_psc_clk_init()
534 void __iomem *base; in davinci_psc_probe() local
548 base = devm_platform_ioremap_resource(pdev, 0); in davinci_psc_probe()
549 if (IS_ERR(base)) in davinci_psc_probe()
550 return PTR_ERR(base); in davinci_psc_probe()
360 __davinci_psc_register_clocks(struct device *dev, const struct davinci_lpsc_clk_info *info, int num_clks, void __iomem *base) __davinci_psc_register_clocks() argument
453 davinci_psc_register_clocks(struct device *dev, const struct davinci_lpsc_clk_info *info, u8 num_clks, void __iomem *base) davinci_psc_register_clocks() argument
478 of_davinci_psc_clk_init(struct device *dev, const struct davinci_lpsc_clk_info *info, u8 num_clks, void __iomem *base) of_davinci_psc_clk_init() argument
[all...]
/kernel/linux/linux-5.10/drivers/crypto/cavium/nitrox/
H A Dnitrox_skcipher.c257 creq->flags = skreq->base.flags; in nitrox_skcipher_crypt()
258 creq->gfp = (skreq->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ? in nitrox_skcipher_crypt()
295 gfp_t flags = (skreq->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ? in nitrox_cbc_decrypt()
387 .base = {
406 .base = {
425 .base = {
444 .base = {
463 .base = {
482 .base = {
501 .base
[all...]
/kernel/linux/linux-5.10/drivers/clk/mediatek/
H A Dclk-mt7622.c615 void __iomem *base; in mtk_topckgen_init() local
618 base = devm_platform_ioremap_resource(pdev, 0); in mtk_topckgen_init()
619 if (IS_ERR(base)) in mtk_topckgen_init()
620 return PTR_ERR(base); in mtk_topckgen_init()
631 base, &mt7622_clk_lock, clk_data); in mtk_topckgen_init()
634 base, &mt7622_clk_lock, clk_data); in mtk_topckgen_init()
694 void __iomem *base; in mtk_pericfg_init() local
698 base = devm_platform_ioremap_resource(pdev, 0); in mtk_pericfg_init()
699 if (IS_ERR(base)) in mtk_pericfg_init()
700 return PTR_ERR(base); in mtk_pericfg_init()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_mode.h57 #define to_amdgpu_crtc(x) container_of(x, struct amdgpu_crtc, base)
58 #define to_amdgpu_connector(x) container_of(x, struct amdgpu_connector, base)
59 #define to_amdgpu_encoder(x) container_of(x, struct amdgpu_encoder, base)
60 #define to_amdgpu_framebuffer(x) container_of(x, struct amdgpu_framebuffer, base)
62 #define to_dm_plane_state(x) container_of(x, struct dm_plane_state, base)
303 struct drm_framebuffer base; member
382 struct drm_crtc base; member
453 struct drm_encoder base; member
528 struct i2c_adapter base; member
536 struct drm_connector base; member
560 struct amdgpu_connector base; global() member
[all...]
/kernel/linux/linux-5.10/drivers/mailbox/
H A Dhi6220-mailbox.c79 void __iomem *base; member
94 status = readl(mbox->base + MBOX_MODE_REG(slot)); in mbox_set_state()
96 writel(status, mbox->base + MBOX_MODE_REG(slot)); in mbox_set_state()
104 mode = readl(mbox->base + MBOX_MODE_REG(slot)); in mbox_set_mode()
106 writel(mode, mbox->base + MBOX_MODE_REG(slot)); in mbox_set_mode()
118 state = readl(mbox->base + MBOX_MODE_REG(mchan->slot)); in hi6220_mbox_last_tx_done()
141 writel(buf[i], mbox->base + MBOX_DATA_REG(slot) + i * 4); in hi6220_mbox_send_data()
179 msg[i] = readl(mbox->base + in hi6220_mbox_interrupt()
298 mbox->base = devm_ioremap_resource(dev, res); in hi6220_mbox_probe()
299 if (IS_ERR(mbox->base)) { in hi6220_mbox_probe()
[all...]
/kernel/linux/linux-5.10/drivers/irqchip/
H A Dirq-gic-v2m.c66 void __iomem *base; /* GICv2m virt address */ member
237 static bool is_msi_spi_valid(u32 base, u32 num) in is_msi_spi_valid() argument
239 if (base < V2M_MIN_SPI) { in is_msi_spi_valid()
240 pr_err("Invalid MSI base SPI (base:%u)\n", base); in is_msi_spi_valid()
244 if ((num == 0) || (base + num > V2M_MAX_SPI)) { in is_msi_spi_valid()
273 iounmap(v2m->base); in gicv2m_teardown()
337 v2m->base = ioremap(v2m->res.start, resource_size(&v2m->res)); in gicv2m_init_one()
338 if (!v2m->base) { in gicv2m_init_one()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/
H A Dvmmgf100.c35 u64 base = (addr >> 8) | map->type; in gf100_vmm_pgt_pte() local
36 u64 data = base; in gf100_vmm_pgt_pte()
40 data = base | ((map->ctag >> 1) << 44); in gf100_vmm_pgt_pte()
45 base += map->next; in gf100_vmm_pgt_pte()
341 gf100_vmm_join_(struct nvkm_vmm *vmm, struct nvkm_memory *inst, u64 base) in gf100_vmm_join_() argument
346 case NVKM_MEM_TARGET_VRAM: base |= 0ULL << 0; break; in gf100_vmm_join_()
347 case NVKM_MEM_TARGET_HOST: base |= 2ULL << 0; in gf100_vmm_join_()
348 base |= BIT_ULL(2) /* VOL. */; in gf100_vmm_join_()
350 case NVKM_MEM_TARGET_NCOH: base |= 3ULL << 0; break; in gf100_vmm_join_()
355 base | in gf100_vmm_join_()
[all...]

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