18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Copyright (c) 2017 Chen-Yu Tsai. All rights reserved.
48c2ecf20Sopenharmony_ci */
58c2ecf20Sopenharmony_ci
68c2ecf20Sopenharmony_ci#include <linux/clk-provider.h>
78c2ecf20Sopenharmony_ci#include <linux/clk/sunxi-ng.h>
88c2ecf20Sopenharmony_ci#include <linux/io.h>
98c2ecf20Sopenharmony_ci
108c2ecf20Sopenharmony_ci#include "ccu_common.h"
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_ci/**
138c2ecf20Sopenharmony_ci * sunxi_ccu_set_mmc_timing_mode: Configure the MMC clock timing mode
148c2ecf20Sopenharmony_ci * @clk: clock to be configured
158c2ecf20Sopenharmony_ci * @new_mode: true for new timing mode introduced in A83T and later
168c2ecf20Sopenharmony_ci *
178c2ecf20Sopenharmony_ci * Returns 0 on success, -ENOTSUPP if the clock does not support
188c2ecf20Sopenharmony_ci * switching modes.
198c2ecf20Sopenharmony_ci */
208c2ecf20Sopenharmony_ciint sunxi_ccu_set_mmc_timing_mode(struct clk *clk, bool new_mode)
218c2ecf20Sopenharmony_ci{
228c2ecf20Sopenharmony_ci	struct clk_hw *hw = __clk_get_hw(clk);
238c2ecf20Sopenharmony_ci	struct ccu_common *cm = hw_to_ccu_common(hw);
248c2ecf20Sopenharmony_ci	unsigned long flags;
258c2ecf20Sopenharmony_ci	u32 val;
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci	if (!(cm->features & CCU_FEATURE_MMC_TIMING_SWITCH))
288c2ecf20Sopenharmony_ci		return -ENOTSUPP;
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_ci	spin_lock_irqsave(cm->lock, flags);
318c2ecf20Sopenharmony_ci
328c2ecf20Sopenharmony_ci	val = readl(cm->base + cm->reg);
338c2ecf20Sopenharmony_ci	if (new_mode)
348c2ecf20Sopenharmony_ci		val |= CCU_MMC_NEW_TIMING_MODE;
358c2ecf20Sopenharmony_ci	else
368c2ecf20Sopenharmony_ci		val &= ~CCU_MMC_NEW_TIMING_MODE;
378c2ecf20Sopenharmony_ci	writel(val, cm->base + cm->reg);
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_ci	spin_unlock_irqrestore(cm->lock, flags);
408c2ecf20Sopenharmony_ci
418c2ecf20Sopenharmony_ci	return 0;
428c2ecf20Sopenharmony_ci}
438c2ecf20Sopenharmony_ciEXPORT_SYMBOL_GPL(sunxi_ccu_set_mmc_timing_mode);
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_ci/**
468c2ecf20Sopenharmony_ci * sunxi_ccu_get_mmc_timing_mode: Get the current MMC clock timing mode
478c2ecf20Sopenharmony_ci * @clk: clock to query
488c2ecf20Sopenharmony_ci *
498c2ecf20Sopenharmony_ci * Returns 0 if the clock is in old timing mode, > 0 if it is in
508c2ecf20Sopenharmony_ci * new timing mode, and -ENOTSUPP if the clock does not support
518c2ecf20Sopenharmony_ci * this function.
528c2ecf20Sopenharmony_ci */
538c2ecf20Sopenharmony_ciint sunxi_ccu_get_mmc_timing_mode(struct clk *clk)
548c2ecf20Sopenharmony_ci{
558c2ecf20Sopenharmony_ci	struct clk_hw *hw = __clk_get_hw(clk);
568c2ecf20Sopenharmony_ci	struct ccu_common *cm = hw_to_ccu_common(hw);
578c2ecf20Sopenharmony_ci
588c2ecf20Sopenharmony_ci	if (!(cm->features & CCU_FEATURE_MMC_TIMING_SWITCH))
598c2ecf20Sopenharmony_ci		return -ENOTSUPP;
608c2ecf20Sopenharmony_ci
618c2ecf20Sopenharmony_ci	return !!(readl(cm->base + cm->reg) & CCU_MMC_NEW_TIMING_MODE);
628c2ecf20Sopenharmony_ci}
638c2ecf20Sopenharmony_ciEXPORT_SYMBOL_GPL(sunxi_ccu_get_mmc_timing_mode);
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