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/third_party/python/Objects/
H A Dlistobject.c1184 sortslice base; member
1198 PyObject **basekeys; /* base address of keys array - read only */
1207 * address base[i] and extends for len[i] elements. It's always
1210 * pending[i].base + pending[i].len == pending[i+1].base
1912 ssa = ms->pending[i].base; in merge_at()
1914 ssb = ms->pending[i+1].base; in merge_at()
2014 Py_ssize_t s1 = p[ms->n - 1].base.keys - ms->basekeys; /* start index */ in found_new_run()
2466 assert(ms.n == 0 || ms.pending[ms.n -1].base.keys + in list_sort_impl()
2472 ms.pending[ms.n].base in list_sort_impl()
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/third_party/vixl/src/aarch64/
H A Dsimulator-aarch64.cc1135 int64_t base = ReadRegister<int64_t>(mem_op.GetBaseRegister()); in Simulator() local
1137 return base + mem_op.GetOffset(); in Simulator()
1148 return static_cast<uint64_t>(base + offset); in Simulator()
4241 // When the base register is SP the stack pointer is required to be in Simulator()
5206 // When the base register is SP the stack pointer is required to be in Simulator()
12059 uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer) + offset; in Simulator() local
12063 ld1r(vform, unpack_vform, temp, base, is_signed); in Simulator()
12077 uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer); in Simulator() local
12078 uint64_t address = base + multiplier * pl; in Simulator()
12098 uint64_t base in Simulator() local
12337 uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer); Simulator() local
12383 uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer); Simulator() local
12420 uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer); Simulator() local
12454 uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer); Simulator() local
12598 uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer); Simulator() local
12628 uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer); Simulator() local
12683 uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer); Simulator() local
12712 uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer); Simulator() local
12740 uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer); Simulator() local
12772 uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer); Simulator() local
12845 uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer); Simulator() local
12875 uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer); Simulator() local
12894 uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer); Simulator() local
12920 uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer); Simulator() local
13032 uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer); Simulator() local
13053 uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer); Simulator() local
13933 uint64_t base = ReadXRegister(instr->GetRm(), Reg31IsStackPointer); Simulator() local
14036 uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer); Simulator() local
14084 uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer); Simulator() local
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/kernel/linux/linux-5.10/drivers/net/ethernet/chelsio/cxgb3/
H A Dt3_hw.c582 VPD_ENTRY(na, 12); /* MAC address base */
618 unsigned int base = adapter->params.pci.vpd_cap_addr; in t3_seeprom_read() local
623 pci_write_config_word(adapter->pdev, base + PCI_VPD_ADDR, addr); in t3_seeprom_read()
626 pci_read_config_word(adapter->pdev, base + PCI_VPD_ADDR, &val); in t3_seeprom_read()
633 pci_read_config_dword(adapter->pdev, base + PCI_VPD_DATA, &v); in t3_seeprom_read()
651 unsigned int base = adapter->params.pci.vpd_cap_addr; in t3_seeprom_write() local
656 pci_write_config_dword(adapter->pdev, base + PCI_VPD_DATA, in t3_seeprom_write()
658 pci_write_config_word(adapter->pdev,base + PCI_VPD_ADDR, in t3_seeprom_write()
662 pci_read_config_word(adapter->pdev, base + PCI_VPD_ADDR, &val); in t3_seeprom_write()
684 static int vpdstrtouint(char *s, u8 len, unsigned int base, unsigne argument
693 vpdstrtou16(char *s, u8 len, unsigned int base, u16 *val) vpdstrtou16() argument
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/kernel/linux/linux-5.10/drivers/net/wireless/intel/iwlegacy/
H A D3945-mac.c1340 u32 desc, time, count, base, data1; in il3945_dump_nic_error_log() local
1343 base = le32_to_cpu(il->card_alive.error_event_table_ptr); in il3945_dump_nic_error_log()
1345 if (!il3945_hw_valid_rtc_data_addr(base)) { in il3945_dump_nic_error_log()
1346 IL_ERR("Not valid error log pointer 0x%08X\n", base); in il3945_dump_nic_error_log()
1350 count = il_read_targ_mem(il, base); in il3945_dump_nic_error_log()
1362 desc = il_read_targ_mem(il, base + i); in il3945_dump_nic_error_log()
1363 time = il_read_targ_mem(il, base + i + 1 * sizeof(u32)); in il3945_dump_nic_error_log()
1364 blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32)); in il3945_dump_nic_error_log()
1365 blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32)); in il3945_dump_nic_error_log()
1366 ilink1 = il_read_targ_mem(il, base in il3945_dump_nic_error_log()
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/kernel/linux/linux-6.6/drivers/net/wireless/intel/iwlegacy/
H A D3945-mac.c1332 u32 desc, time, count, base, data1; in il3945_dump_nic_error_log() local
1335 base = le32_to_cpu(il->card_alive.error_event_table_ptr); in il3945_dump_nic_error_log()
1337 if (!il3945_hw_valid_rtc_data_addr(base)) { in il3945_dump_nic_error_log()
1338 IL_ERR("Not valid error log pointer 0x%08X\n", base); in il3945_dump_nic_error_log()
1342 count = il_read_targ_mem(il, base); in il3945_dump_nic_error_log()
1354 desc = il_read_targ_mem(il, base + i); in il3945_dump_nic_error_log()
1355 time = il_read_targ_mem(il, base + i + 1 * sizeof(u32)); in il3945_dump_nic_error_log()
1356 blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32)); in il3945_dump_nic_error_log()
1357 blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32)); in il3945_dump_nic_error_log()
1358 ilink1 = il_read_targ_mem(il, base in il3945_dump_nic_error_log()
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/third_party/mesa3d/src/compiler/nir/
H A Dnir_lower_io.c632 .base = var->data.driver_location, in lower_interpolate_at()
1196 uint32_t base = 0; in nir_get_explicit_deref_range() local
1215 base += stride * nir_src_as_uint(deref->arr.index); in nir_get_explicit_deref_range()
1228 base += glsl_get_struct_field_offset(parent->type, deref->strct.index); in nir_get_explicit_deref_range()
1241 base += load->value[1].u32; in nir_get_explicit_deref_range()
1244 base += load->value[1].u32; in nir_get_explicit_deref_range()
1247 base += load->value[2].u32; in nir_get_explicit_deref_range()
1253 *out_base = base; in nir_get_explicit_deref_range()
1270 *out_base = base; in nir_get_explicit_deref_range()
1502 * variable so we can provide a base/rang in build_explicit_io_load()
1519 unsigned base, range; build_explicit_io_load() local
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/third_party/node/src/
H A Dnode_http2.cc807 CHECK_NOT_NULL(stream_buf_.base); in ConsumeHTTP2Data()
819 reinterpret_cast<uint8_t*>(stream_buf_.base) + in ConsumeHTTP2Data()
1202 // `buf.base == nullptr` is the default Http2StreamListener's way in OnDataChunkReceived()
1207 if (LIKELY(buf.base == nullptr)) in OnDataChunkReceived()
1208 buf.base = reinterpret_cast<char*>(const_cast<uint8_t*>(data)); in OnDataChunkReceived()
1210 memcpy(buf.base, data, avail); in OnDataChunkReceived()
1318 size_t offset = buf.base - session->stream_buf_.base; in OnStreamRead()
1718 // Store with a base of `nullptr` initially, since future resizes in CopyDataIntoOutgoing()
1720 // The correct base pointer in CopyDataIntoOutgoing()
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/third_party/libabigail/src/
H A Dabg-writer.cc1528 /// Serialize the layout offset of a base class
1530 write_layout_offset(shared_ptr<class_decl::base_spec> base, ostream& o) in write_layout_offset() argument
1532 if (!base) in write_layout_offset()
1535 if (base->get_offset_in_bits() >= 0) in write_layout_offset()
1536 o << " layout-offset-in-bits='" << base->get_offset_in_bits() << "'"; in write_layout_offset()
3758 for (class_decl::base_specs::const_iterator base = in write_class_decl()
3760 base != decl->get_base_specifiers().end(); in write_class_decl()
3761 ++base) in write_class_decl()
3763 annotate((*base)->get_base_class(), ctxt, nb_ws); in write_class_decl()
3765 o << "<base in write_class_decl()
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/third_party/openssl/test/
H A Dbntest.c2606 const char *base; member
2819 BIGNUM *base = NULL, *exponent = NULL, *modulo = NULL; in test_mod_exp() local
2823 || !TEST_true(BN_dec2bn(&base, test->base)) in test_mod_exp()
2828 if (!TEST_int_eq(BN_mod_exp(result, base, exponent, modulo, ctx), 1)) in test_mod_exp()
2842 BN_free(base); in test_mod_exp()
2853 BIGNUM *base = NULL, *exponent = NULL, *modulo = NULL; in test_mod_exp_consttime() local
2857 || !TEST_true(BN_dec2bn(&base, test->base)) in test_mod_exp_consttime()
2862 BN_set_flags(base, BN_FLG_CONSTTIM in test_mod_exp_consttime()
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/device/soc/rockchip/common/sdk_linux/drivers/gpu/drm/
H A Ddrm_edid.c1577 * drm_edid_header_is_valid - sanity check the header of the base EDID block
1578 * @raw_edid: pointer to raw base EDID block
1580 * Sanity check the header of the base EDID block.
1671 * drm_edid_block_valid - Sanity check the EDID block (base or extension)
1673 * @block: type of block to validate (0 for base, extension otherwise)
1677 * Validate a base or extension EDID block and optionally dump bad blocks to
1741 case 0: /* base */ in drm_edid_block_valid()
1942 /* base block fetch */ in drm_do_get_edid()
1989 u8 *base; in drm_do_get_edid() local
1998 base in drm_do_get_edid()
3240 struct displayid_hdr *base; drm_find_displayid_extension() local
5293 struct displayid_hdr *base; validate_displayid() local
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/kernel/linux/linux-5.10/drivers/gpu/drm/
H A Ddrm_edid.c1563 * drm_edid_header_is_valid - sanity check the header of the base EDID block
1564 * @raw_edid: pointer to raw base EDID block
1566 * Sanity check the header of the base EDID block.
1650 * drm_edid_block_valid - Sanity check the EDID block (base or extension)
1652 * @block: type of block to validate (0 for base, extension otherwise)
1656 * Validate a base or extension EDID block and optionally dump bad blocks to
1715 case 0: /* base */ in drm_edid_block_valid()
1842 * is 1 (base block) + num_ext_blocks big. That means we can think in connector_bad_edid()
1911 connector->base.id, connector->name, num_modes); in drm_add_override_edid_modes()
1954 /* base bloc in drm_do_get_edid()
1994 u8 *base; drm_do_get_edid() local
3279 struct displayid_hdr *base; drm_find_displayid_extension() local
5188 struct displayid_hdr *base; validate_displayid() local
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/third_party/node/deps/v8/src/compiler/backend/ia32/
H A Dcode-generator-ia32.cc5 #include "src/base/overflowing-math.h"
123 Register base = InputRegister(NextOffset(offset)); in MemoryOperand() local
125 return Operand(base, disp); in MemoryOperand()
128 Register base = InputRegister(NextOffset(offset)); in MemoryOperand() local
130 return Operand(base, ctant.ToInt32(), ctant.rmode()); in MemoryOperand()
136 Register base = InputRegister(NextOffset(offset)); in MemoryOperand() local
140 return Operand(base, index, scale, disp); in MemoryOperand()
146 Register base = InputRegister(NextOffset(offset)); in MemoryOperand() local
150 return Operand(base, index, scale, ctant.ToInt32(), ctant.rmode()); in MemoryOperand()
175 Register base in MemoryOperand() local
191 Register base = InputRegister(NextOffset(&offset)); NextMemoryOperand() local
1004 Register base = offset.from_stack_pointer() ? esp : ebp; AssembleArchInstruction() local
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/base/security/crypto_framework/plugin/openssl_plugin/crypto_operation/cipher/src/
H A Dcipher_rsa_openssl.c513 returnImpl->super.base.destroy = EngineDestroySpiImpl; in HcfCipherRsaCipherSpiCreate()
514 returnImpl->super.base.getClass = EngineGetClass; in HcfCipherRsaCipherSpiCreate()
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/osal/linux/mmz/
H A Dhisi_allocator.c37 static unsigned long _strtoul_ex(const char *s, char **ep, unsigned int base) in _strtoul_ex() argument
42 __value = simple_strtoul(s, &__end_p, base); in _strtoul_ex()
/device/soc/hisilicon/hi3751v350/sdk_linux/source/common/drv/include/
H A Dhi_osal.h474 long osal_strtol(const char *, char **end, unsigned int base);
475 unsigned long osal_strtoul(const char *, char **end, unsigned int base);
/device/soc/rockchip/common/vendor/drivers/media/platform/rockchip/ispp/
H A Dstats.c43 void IO_MEM *base = stats_vdev->dev->hw_dev->base_addr; in rkispp_stats_frame_end() local
51 u32 total_num = readl(base + RKISPP_ORB_TOTAL_NUM); in rkispp_stats_frame_end()
/device/soc/rockchip/common/vendor/drivers/media/platform/rockchip/isp/
H A Dcommon.c103 void IO_MEM *base = dev->hw_dev->base_addr; in rkisp_update_regs() local
115 writel(*val, base + i); in rkisp_update_regs()
/device/soc/rockchip/rk3588/kernel/drivers/media/platform/rockchip/ispp/
H A Dstats.c41 void __iomem *base = stats_vdev->dev->hw_dev->base_addr; in rkispp_stats_frame_end() local
49 u32 total_num = readl(base + RKISPP_ORB_TOTAL_NUM); in rkispp_stats_frame_end()
/device/soc/rockchip/rk3588/kernel/drivers/media/platform/rockchip/isp/
H A Dcommon.c101 void __iomem *base = dev->hw_dev->base_addr; in rkisp_update_regs() local
113 writel(*val, base + i); in rkisp_update_regs()
/kernel/linux/linux-5.10/drivers/gpio/
H A Dgpio-grgpio.c365 gc->base = -1; in grgpio_probe()
429 dev_info(&ofdev->dev, "regs=0x%p, base=%d, ngpio=%d, irqs=%s\n", in grgpio_probe()
430 priv->regs, gc->base, gc->ngpio, priv->domain ? "on" : "off"); in grgpio_probe()
H A Dgpio-stmpe.c352 unsigned gpio = gc->base; in stmpe_dbg_show()
476 stmpe_gpio->chip.base = -1; in stmpe_gpio_probe()
H A Dgpio-davinci.c252 chips->chip.base = pdata->no_auto_base ? pdata->base : -1; in davinci_gpio_probe()
/kernel/linux/linux-5.10/drivers/crypto/stm32/
H A Dstm32-crc32.c280 .base = {
302 .base = {
/kernel/linux/linux-5.10/drivers/crypto/
H A Domap-aes-gcm.c218 base); in omap_aes_gcm_prepare_req()
362 base); in omap_aes_gcm_crypt_req()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_cgs.c35 struct cgs_device base; member
496 cgs_device->base.ops = &amdgpu_cgs_ops; in amdgpu_cgs_create_device()

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