simulator-aarch64.cc - OpenGrok cross reference for /third_party/vixl/src/aarch64/simulator-aarch64.cc

Lines Matching refs:base
1135   int64_t base = ReadRegister<int64_t>(mem_op.GetBaseRegister());
1137     return base + mem_op.GetOffset();
1148     return static_cast<uint64_t>(base + offset);
4241     // When the base register is SP the stack pointer is required to be
5206     // When the base register is SP the stack pointer is required to be
12059   uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer) + offset;
12063   ld1r(vform, unpack_vform, temp, base, is_signed);
12077       uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer);
12078       uint64_t address = base + multiplier * pl;
12098       uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer);
12099       uint64_t address = base + multiplier * vl;
12337   uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer);
12340   LogicSVEAddressVector addr(base + offset);
12383   uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer);
12386   LogicSVEAddressVector addr(base + offset);
12420   uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer);
12422   LogicSVEAddressVector addr(base + offset);
12454   uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer);
12456   LogicSVEAddressVector addr(base + offset);
12598       uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer);
12601       LogicSVEAddressVector addr(base,
12628       uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer);
12631       LogicSVEAddressVector addr(base,
12683       uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer);
12684       LogicSVEAddressVector addr(base,
12712       uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer);
12713       LogicSVEAddressVector addr(base,
12740       uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer);
12743       LogicSVEAddressVector addr(base,
12772       uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer);
12775       LogicSVEAddressVector addr(base,
12845   uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer);
12847   LogicSVEAddressVector addr(base + offset);
12875   uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer);
12877   LogicSVEAddressVector addr(base + offset);
12894       uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer);
12899       LogicSVEAddressVector addr(base + offset);
12920       uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer);
12925       LogicSVEAddressVector addr(base + offset);
13032       uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer);
13033       uint64_t address = base + multiplier * pl;
13053       uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer);
13054       uint64_t address = base + multiplier * vl;
13933   uint64_t base = ReadXRegister(instr->GetRm(), Reg31IsStackPointer);
13935                  base + (length * instr->GetImmSVEVLScale()),
14036   uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer);
14040   LogicSVEAddressVector addr(base + offset);
14084   uint64_t base = ReadXRegister(instr->GetRn(), Reg31IsStackPointer);
14087   LogicSVEAddressVector addr(base + offset);