| /third_party/node/deps/v8/src/wasm/baseline/ia32/ |
| H A D | liftoff-assembler-ia32.h | 2723 byte shift = static_cast<byte>(count & mask); in EmitSimdShiftOpImm() local
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| /third_party/node/deps/v8/src/wasm/baseline/arm/ |
| H A D | liftoff-assembler-arm.h | 399 Register shift = temps.Acquire(); in EmitSimdShift() local 413 int32_t shift = rhs & MaskFromNeonDataType(dt); in EmitSimdShiftImmediate() local [all...] |
| /third_party/node/deps/v8/src/wasm/baseline/arm64/ |
| H A D | liftoff-assembler-arm64.h | 177 Register shift = dst.Is2D() ? temps.AcquireX() : temps.AcquireW(); in EmitSimdShift() local 198 int32_t shift = rhs & mask; in EmitSimdShiftRightImmediate() local
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| /third_party/mesa3d/src/gallium/frontends/nine/ |
| H A D | nine_shader.c | 243 int8_t shift; /* sint4 */ member 3346 int8_t shift; sm1_parse_dst_param() local [all...] |
| /third_party/mesa3d/src/gallium/auxiliary/draw/ |
| H A D | draw_llvm.c | 1504 LLVMValueRef zero, shift; in generate_clipmask() local
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| /third_party/musl/include/arpa/ |
| H A D | nameser.h | 48 struct _ns_flagdata { int mask, shift; }; member
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| /third_party/mesa3d/src/gallium/drivers/panfrost/ |
| H A D | pan_cmdstream.c | 2124 unsigned shift = 0, extra_flags = 0; in panfrost_emit_vertex_data() local
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| /third_party/skia/third_party/externals/angle2/src/common/spirv/ |
| H A D | spirv_instruction_builder_autogen.cpp | 2122 WriteShiftRightLogical(Blob *blob, IdResultType idResultType, IdResult idResult, IdRef base, IdRef shift) WriteShiftRightLogical() argument 2136 WriteShiftRightArithmetic(Blob *blob, IdResultType idResultType, IdResult idResult, IdRef base, IdRef shift) WriteShiftRightArithmetic() argument 2150 WriteShiftLeftLogical(Blob *blob, IdResultType idResultType, IdResult idResult, IdRef base, IdRef shift) WriteShiftLeftLogical() argument
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| H A D | spirv_instruction_parser_autogen.cpp | 2544 ParseShiftRightLogical(const uint32_t *_instruction, IdResultType *idResultType, IdResult *idResult, IdRef *base, IdRef *shift) ParseShiftRightLogical() argument 2560 ParseShiftRightArithmetic(const uint32_t *_instruction, IdResultType *idResultType, IdResult *idResult, IdRef *base, IdRef *shift) ParseShiftRightArithmetic() argument 2576 ParseShiftLeftLogical(const uint32_t *_instruction, IdResultType *idResultType, IdResult *idResult, IdRef *base, IdRef *shift) ParseShiftLeftLogical() argument
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| /third_party/skia/third_party/externals/swiftshader/src/Shader/ |
| H A D | Shader.hpp | 474 signed char shift : 4; member
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| /third_party/skia/third_party/externals/icu/source/i18n/ |
| H A D | decNumber.cpp | 2045 Int shift=set->digits-1; in uprv_decNumberPower() local 2186 Int shift=set->digits-1; in uprv_decNumberPower() local 2515 uInt units, shift; /* work */ in uprv_decNumberRotate() local 2703 Int shift; /* rhs as an Int */ uprv_decNumberShift() local 4037 Int shift=reqdigits-rhs->digits; /* left shift needed */ decAddOp() local 4291 Int shift, cut; /* .. */ decDivideOp() local 4886 Int shift; /* Units to shift multiplicand by */ decMultiplyOp() local 5344 Int shift=set->digits-1; decExpOp() local 6731 decShiftToMost(Unit *uar, Int digits, Int shift) global() argument 6787 decShiftToLeast(Unit *uar, Int units, Int shift) global() argument 7323 Int shift; /* shift needed if clamping */ global() local [all...] |
| /third_party/skia/third_party/externals/icu/source/tools/tzcode/ |
| H A D | zic.c | 1546 register int shift; in convert() local 1557 register int shift; in convert64() local [all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 1961 unsigned shift; in DecodeSORegMemOperand() local 6402 Val <<= shift; DecodeExpandedImmOperand() local [all...] |
| /third_party/python/Objects/ |
| H A D | longobject.c | 3507 Py_ssize_t shift; /* the number of digits we split off */ in k_mul() local 3986 Py_ssize_t a_size, b_size, shift, extra_bits, diff, x_size, x_bits; long_true_divide() local 4753 digit shift; long_rshift1() local [all...] |
| /third_party/backends/backend/ |
| H A D | umax-scsidef.h | 58 static inline void setbitfield(unsigned char * pageaddr, int mask, int shift, int val) \ in setbitfield() argument 61 static inline void resetbitfield(unsigned char * pageaddr, int mask, int shift, int val) \ in resetbitfield() argument 64 static inline int getbitfield(unsigned char * pageaddr, int mask, int shift) \ in getbitfield() argument
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| H A D | hp3500.c | 2517 int shift = 8; in get_lsbfirst_int() local
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| /third_party/mesa3d/src/amd/common/ |
| H A D | ac_nir_lower_ngg.c | 237 nir_ssa_def *shift = nir_iadd_imm(b, nir_imul_imm(b, lane_id, -4u), num_lds_dwords * 16); in summarize_repack() local [all...] |
| /third_party/mbedtls/library/ |
| H A D | ecp_curves.c | 5314 ecp_mod_koblitz(mbedtls_mpi *N, const mbedtls_mpi_uint *Rp, size_t p_limbs, size_t adjust, size_t shift, mbedtls_mpi_uint mask) ecp_mod_koblitz() argument
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| /third_party/mesa3d/src/freedreno/vulkan/ |
| H A D | tu_pipeline.c | 1324 int shift = 0; in tu6_vpc_varying_mode() local 1376 uint32_t shift = inloc % 32; tu6_emit_vpc_varying_modes() local [all...] |
| /third_party/musl/porting/linux/user/ldso/ |
| H A D | dynlink.c | 2347 size_t shift = 0; in sleb128_decoder() local
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| /third_party/mesa3d/src/intel/vulkan/ |
| H A D | genX_cmd_buffer.c | 3217 const unsigned shift = 4 - buffer_count; in cmd_buffer_emit_push_constant() local
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| /third_party/ltp/testcases/kernel/fs/scsi/ltpscsi/ |
| H A D | scsimain.c | 5125 static void bitfield(unsigned char *pageaddr, char *text, int mask, int shift) in bitfield() argument 5130 notbitfield(unsigned char *pageaddr, char *text, int mask, int shift) notbitfield() argument
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| /third_party/node/deps/v8/src/compiler/ |
| H A D | effect-control-linearizer.cc | 2131 Node* shift = __ Int32Constant(base::bits::WhichPowerOfTwo(divisor)); in LowerCheckedInt32Div() local 2353 Node* shift = __ Uint32Constant(base::bits::WhichPowerOfTwo(divisor)); in LowerCheckedUint32Div() local 4873 Node* shift = __ Int32Constant(Map::Bits2::ElementsKindBits::kShift); AdaptFastCallTypedArrayArgument() local 5765 Node* shift = __ Int32Constant(Map::Bits2::ElementsKindBits::kShift); LowerTransitionAndStoreElement() local 5883 Node* shift = __ Int32Constant(Map::Bits2::ElementsKindBits::kShift); LowerTransitionAndStoreNumberElement() local 5944 Node* shift = __ Int32Constant(Map::Bits2::ElementsKindBits::kShift); LowerTransitionAndStoreNonNumberElement() local 6011 Node* shift = __ Int32Constant(Map::Bits2::ElementsKindBits::kShift); LowerStoreSignedSmallElement() local [all...] |
| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.cc | 1585 NEONShiftLeftImmediate(const VRegister& vd, const VRegister& vn, int shift, NEONShiftImmediateOp op) NEONShiftLeftImmediate() argument 1592 NEONShiftRightImmediate(const VRegister& vd, const VRegister& vn, int shift, NEONShiftImmediateOp op) NEONShiftRightImmediate() argument 1600 NEONShiftImmediateL(const VRegister& vd, const VRegister& vn, int shift, NEONShiftImmediateOp op) NEONShiftImmediateL() argument 1614 NEONShiftImmediateN(const VRegister& vd, const VRegister& vn, int shift, NEONShiftImmediateOp op) NEONShiftImmediateN() argument 1636 shl(const VRegister& vd, const VRegister& vn, int shift) shl() argument 1641 sli(const VRegister& vd, const VRegister& vn, int shift) sli() argument 1646 sqshl(const VRegister& vd, const VRegister& vn, int shift) sqshl() argument 1650 sqshlu(const VRegister& vd, const VRegister& vn, int shift) sqshlu() argument 1654 uqshl(const VRegister& vd, const VRegister& vn, int shift) uqshl() argument 1658 sshll(const VRegister& vd, const VRegister& vn, int shift) sshll() argument 1663 sshll2(const VRegister& vd, const VRegister& vn, int shift) sshll2() argument 1676 ushll(const VRegister& vd, const VRegister& vn, int shift) ushll() argument 1681 ushll2(const VRegister& vd, const VRegister& vn, int shift) ushll2() argument 1694 sri(const VRegister& vd, const VRegister& vn, int shift) sri() argument 1699 sshr(const VRegister& vd, const VRegister& vn, int shift) sshr() argument 1704 ushr(const VRegister& vd, const VRegister& vn, int shift) ushr() argument 1709 srshr(const VRegister& vd, const VRegister& vn, int shift) srshr() argument 1714 urshr(const VRegister& vd, const VRegister& vn, int shift) urshr() argument 1719 ssra(const VRegister& vd, const VRegister& vn, int shift) ssra() argument 1724 usra(const VRegister& vd, const VRegister& vn, int shift) usra() argument 1729 srsra(const VRegister& vd, const VRegister& vn, int shift) srsra() argument 1734 ursra(const VRegister& vd, const VRegister& vn, int shift) ursra() argument 1739 shrn(const VRegister& vd, const VRegister& vn, int shift) shrn() argument 1744 shrn2(const VRegister& vd, const VRegister& vn, int shift) shrn2() argument 1749 rshrn(const VRegister& vd, const VRegister& vn, int shift) rshrn() argument 1754 rshrn2(const VRegister& vd, const VRegister& vn, int shift) rshrn2() argument 1759 sqshrn(const VRegister& vd, const VRegister& vn, int shift) sqshrn() argument 1764 sqshrn2(const VRegister& vd, const VRegister& vn, int shift) sqshrn2() argument 1769 sqrshrn(const VRegister& vd, const VRegister& vn, int shift) sqrshrn() argument 1774 sqrshrn2(const VRegister& vd, const VRegister& vn, int shift) sqrshrn2() argument 1779 sqshrun(const VRegister& vd, const VRegister& vn, int shift) sqshrun() argument 1784 sqshrun2(const VRegister& vd, const VRegister& vn, int shift) sqshrun2() argument 1789 sqrshrun(const VRegister& vd, const VRegister& vn, int shift) sqrshrun() argument 1794 sqrshrun2(const VRegister& vd, const VRegister& vn, int shift) sqrshrun2() argument 1799 uqshrn(const VRegister& vd, const VRegister& vn, int shift) uqshrn() argument 1804 uqshrn2(const VRegister& vd, const VRegister& vn, int shift) uqshrn2() argument 1809 uqrshrn(const VRegister& vd, const VRegister& vn, int shift) uqrshrn() argument 1814 uqrshrn2(const VRegister& vd, const VRegister& vn, int shift) uqrshrn2() argument 2907 shll(const VRegister& vd, const VRegister& vn, int shift) shll() argument 2915 shll2(const VRegister& vd, const VRegister& vn, int shift) shll2() argument 3212 movi(const VRegister& vd, const uint64_t imm, Shift shift, const int shift_amount) movi() argument 3249 mvni(const VRegister& vd, const int imm8, Shift shift, const int shift_amount) mvni() argument 3590 MoveWide(const Register& rd, uint64_t imm, int shift, MoveWideImmediateOp mov_op) MoveWide() argument 3866 EmitShift(const Register& rd, const Register& rn, Shift shift, unsigned shift_amount) EmitShift() argument 3972 Shift shift = addr.shift(); LoadStore() local [all...] |
| /third_party/node/deps/v8/src/codegen/mips/ |
| H A D | macro-assembler-mips.cc | 1500 ShlPair(Register dst_low, Register dst_high, Register src_low, Register src_high, Register shift, Register scratch1, Register scratch2) CallRecordWriteStub() argument 1526 ShlPair(Register dst_low, Register dst_high, Register src_low, Register src_high, uint32_t shift, Register scratch) CallRecordWriteStub() argument 1557 ShrPair(Register dst_low, Register dst_high, Register src_low, Register src_high, Register shift, Register scratch1, Register scratch2) CallRecordWriteStub() argument 1583 ShrPair(Register dst_low, Register dst_high, Register src_low, Register src_high, uint32_t shift, Register scratch) CallRecordWriteStub() argument 1614 SarPair(Register dst_low, Register dst_high, Register src_low, Register src_high, Register shift, Register scratch1, Register scratch2) CallRecordWriteStub() argument 1635 SarPair(Register dst_low, Register dst_high, Register src_low, Register src_high, uint32_t shift, Register scratch) CallRecordWriteStub() argument 2644 uint32_t shift = 24; // (sizeof(T) - 1) * BITS_PER_BYTE CallRecordWriteStub() local [all...] |