| /third_party/backends/backend/genesys/ |
| H A D | genesys.cpp | 601 auto reg = dev.interface->read_register(gl841::REG_0x40); in scanner_is_motor_stopped() local
608 auto reg = dev.interface->read_register(gl842::REG_0x40); in scanner_is_motor_stopped() local
615 auto reg = dev.interface->read_register(gl843::REG_0x40); in scanner_is_motor_stopped() local
623 auto reg = dev.interface->read_register(gl846::REG_0x40); scanner_is_motor_stopped() local
630 auto reg = dev.interface->read_register(gl847::REG_0x40); scanner_is_motor_stopped() local
637 auto reg = dev.interface->read_register(gl124::REG_0x100); scanner_is_motor_stopped() local
[all...] |
| /third_party/icu/icu4c/source/common/ |
| H A D | ucurr.cpp | 391 static UCurrRegistryKey reg(const UChar* _iso, const char* _id, UErrorCode* status) in reg() function
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| /third_party/libunwind/libunwind/include/ |
| H A D | dwarf.h | 260 dwarf_reg_only_state_t reg; member
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| /third_party/mesa3d/src/freedreno/decode/ |
| H A D | cffdec.c | 1162 uint32_t reg = dwords[0] & 0xffff; in cp_wide_reg_write() local
1462 const unsigned reg = base_reg + (dwords[1] >> 28) * 2; in cp_load_state() local
1466 const unsigned reg in cp_load_state() local
2604 uint32_t reg = dwords[1] & 0xffff; cp_reg_write() local
[all...] |
| /third_party/mesa3d/src/freedreno/ir3/ |
| H A D | ir3_ra.c | 54 unsigned reg = *(const unsigned *)data; in ir3_reg_interval_cmp() local
421 physreg_t reg = *(const physreg_t *)data; ra_interval_cmp() local
432 ra_interval_search_sloppy(struct rb_tree *tree, physreg_t reg) ra_interval_search_sloppy() argument
442 ra_interval_search_right(struct rb_tree *tree, physreg_t reg) ra_interval_search_right() argument
459 ra_file_search_right(struct ra_file *file, physreg_t reg) ra_file_search_right() argument
611 ra_interval_init(struct ra_interval *interval, struct ir3_register *reg) ra_interval_init() argument
663 reg_file_size(struct ra_file *file, struct ir3_register *reg) reg_file_size() argument
738 ra_get_file(struct ra_ctx *ctx, struct ir3_register *reg) ra_get_file() argument
787 is_early_clobber(struct ir3_register *reg) is_early_clobber() argument
793 get_reg_specified(struct ra_ctx *ctx, struct ra_file *file, struct ir3_register *reg, physreg_t physreg, bool is_source) get_reg_specified() argument
816 try_evict_regs(struct ra_ctx *ctx, struct ra_file *file, struct ir3_register *reg, physreg_t physreg, unsigned *_eviction_count, bool is_source, bool speculative) try_evict_regs() argument
1043 compress_regs_left(struct ra_ctx *ctx, struct ra_file *file, struct ir3_register *reg) compress_regs_left() argument
1300 update_affinity(struct ra_file *file, struct ir3_register *reg, physreg_t physreg) update_affinity() argument
1371 get_reg(struct ra_ctx *ctx, struct ra_file *file, struct ir3_register *reg) get_reg() argument
1453 assign_reg(struct ir3_instruction *instr, struct ir3_register *reg, unsigned num) assign_reg() argument
1599 struct ir3_register *reg = insert_parallel_copy_instr() local
1610 struct ir3_register *reg = insert_parallel_copy_instr() local
2039 insert_liveout_copy(struct ir3_block *block, physreg_t dst, physreg_t src, struct ir3_register *reg) insert_liveout_copy() argument
2255 struct ir3_register *reg = ctx->live->definitions[name]; handle_block() local
2313 struct ir3_register *reg = ctx->live->definitions[name]; handle_block() local
2348 add_pressure(struct ir3_pressure *pressure, struct ir3_register *reg, bool merged_regs) add_pressure() argument
2428 struct ir3_register *reg = live->definitions[name]; calc_min_limit_pressure() local
[all...] |
| H A D | ir3_compiler_nir.c | 4927 struct ir3_register *reg = end->srcs[i]; ir3_compile_shader_nir() local
[all...] |
| /third_party/mesa3d/src/compiler/nir/ |
| H A D | nir_serialize.c | 444 write_register(write_ctx *ctx, const nir_register *reg) in write_register() argument
457 nir_register *reg = ralloc(ctx->nir, nir_register); in read_register() local
486 nir_register *reg = read_register(ctx); read_reg_list() local
582 } reg; global() member
[all...] |
| H A D | nir.c | 236 nir_register *reg = ralloc(mem_ctx, nir_register); in reg_create() local
255 nir_register *reg = reg_create(ralloc_parent(impl), &impl->registers); nir_local_reg_create() local
262 nir_reg_remove(nir_register *reg) nir_reg_remove() argument
[all...] |
| /third_party/mesa3d/src/amd/compiler/ |
| H A D | aco_ir.h | 436 constexpr unsigned reg() const { return reg_b >> 2; } in reg() function
511 setFixed(reg); variable
669 setFixed(reg); variable
927 Definition(PhysReg reg, RegClas in temp() variable
[all...] |
| H A D | aco_register_allocation.cpp | 49 PhysReg reg; member
345 get_id(PhysReg reg) get_id() argument
380 print_reg(const RegisterFile& reg_file, PhysReg reg, bool has_adjacent_variable) print_reg() argument
464 PhysReg reg = var.reg; print_regs() local
675 add_subdword_definition(Program* program, aco_ptr<Instruction>& instr, PhysReg reg) add_subdword_definition() argument
745 adjust_max_used_regs(ra_ctx& ctx, RegClass rc, unsigned reg) adjust_max_used_regs() argument
1045 PhysReg reg = def_reg.lo(); get_reg_for_create_vector_copy() local
1384 get_reg_specified(ra_ctx& ctx, RegisterFile& reg_file, RegClass rc, aco_ptr<Instruction>& instr, PhysReg reg) get_reg_specified() argument
1527 PhysReg reg = ctx.assignments[op.tempId()].reg; is_mimg_vaddr_intact() local
1575 PhysReg reg = ctx.assignments[op.tempId()].reg; get_reg_vector() local
1593 PhysReg reg = res.first; get_reg_vector() local
1616 PhysReg reg = affinity.reg; get_reg() local
1770 PhysReg reg; get_reg_create_vector() local
1895 int reg = ctx.max_used_sgpr; handle_pseudo() local
1913 operand_can_use_reg(amd_gfx_level gfx_level, aco_ptr<Instruction>& instr, unsigned idx, PhysReg reg, RegClass rc) operand_can_use_reg() argument
1997 PhysReg reg = get_reg(ctx, register_file, tmp, parallelcopy, phi); get_reg_phi() local
2073 PhysReg reg = phi->operands[0].physReg(); get_regs_for_phis() local
2113 PhysReg reg = op.physReg(); get_regs_for_phis() local
2765 PhysReg reg = ctx.assignments[operand.tempId()].reg; register_allocation() local
2868 PhysReg reg = instr->operands[0].physReg(); register_allocation() local
2889 PhysReg reg = instr->operands[i].physReg(); register_allocation() local
2895 PhysReg reg = instr->operands[0].physReg(); register_allocation() local
2900 PhysReg reg = get_reg_create_vector(ctx, register_file, definition->getTemp(), register_allocation() local
2909 PhysReg reg = get_reg(ctx, register_file, tmp, parallelcopy, instr); register_allocation() local
2964 unsigned reg = parallelcopy[i].first.physReg().reg(); register_allocation() local
3048 PhysReg reg = get_reg(ctx, tmp_file, tmp, parallelcopy, instr); register_allocation() local
[all...] |
| /third_party/mesa3d/src/imagination/vulkan/pds/ |
| H A D | pvr_pds.h | 352 uint16_t reg; member
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| /third_party/mesa3d/src/gallium/drivers/vc4/ |
| H A D | vc4_program.c | 210 nir_register *reg = dest->reg.reg; in ntq_store_dest() local
257 nir_register *reg in ntq_get_src() local
[all...] |
| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| H A D | gfx10_shader_ngg.c | 249 unsigned reg = so->output[i].register_index; in build_streamout_vertex() local
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| /third_party/node/deps/v8/src/wasm/baseline/s390/ |
| H A D | liftoff-assembler-s390.h | 219 void LiftoffAssembler::LoadConstant(LiftoffRegister reg, WasmValue value, in LoadConstant() argument
1407 void LiftoffAssembler::Spill(int offset, LiftoffRegister reg, ValueKind kind) { in Spill() argument
1460 Fill(LiftoffRegister reg, int offset, ValueKind kind) Fill() argument
2928 LiftoffRegister reg = all_spills.GetLastRegSet(); RecordSpillsInSafepoint() local
[all...] |
| /third_party/node/deps/icu-small/source/common/ |
| H A D | ucurr.cpp | 394 static UCurrRegistryKey reg(const char16_t* _iso, const char* _id, UErrorCode* status) in reg() function
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| /third_party/mesa3d/src/gallium/drivers/nouveau/nv30/ |
| H A D | nvfx_shader.h | 421 struct nvfx_reg reg; member
480 nvfx_src(struct nvfx_reg reg) in nvfx_src() argument
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| /third_party/ltp/tools/sparse/sparse-src/ |
| H A D | compile-i386.c | 114 struct reg_info *reg; member
274 static struct storage * get_hardreg(struct storage *reg, int clear) in get_hardreg() argument
296 put_reg(struct storage *reg) put_reg() argument
368 struct storage *reg; get_reg_value() local
1089 struct storage *reg = NULL; emit_copy() local
1310 struct storage *reg, *new; emit_divide() local
1439 struct storage *reg; emit_conditional_test() local
[all...] |
| /third_party/node/deps/v8/src/compiler/backend/x64/ |
| H A D | code-generator-x64.cc | 1171 Register reg = i.OutputRegister(instr->OutputCount() - 1); in ShouldClearOutputRegisterBeforeInstruction() local
1192 Register reg = i.OutputRegister(instr->OutputCount() - 1); in AssembleArchInstruction() local
1201 Register reg = i.InputRegister(0); in AssembleArchInstruction() local
1102 SetupSimdImmediateInRegister(TurboAssembler* assembler, uint32_t* imms, XMMRegister reg) SetupSimdImmediateInRegister() argument
1261 Register reg = i.InputRegister(0); AssembleArchInstruction() local
1275 Register reg = i.InputRegister(0); AssembleArchInstruction() local
4545 Register reg = i.OutputRegister(instr->OutputCount() - 1); AssembleArchBoolean() local
4556 __ setcc(FlagsConditionToCondition(condition), reg); AssembleArchBoolean() local
4761 __ Movdqu(Operand(rsp, kQuadWordSize * slot_idx), reg); AssembleConstructFrame() local
[all...] |
| /third_party/node/deps/v8/src/compiler/backend/ |
| H A D | register-allocator.h | 561 void set_controlflow_hint(int reg) { in set_controlflow_hint() argument
567 bool RegisterFromControlFlow(int* reg) { in RegisterFromControlFlow() argument
738 int reg() { return reg_; } in reg() function in v8::internal::compiler::RegisterAllocationFlag::LiveRange::LiveRangeBundle
740 void set_reg(int reg) { in set_reg() argument
1445 inactive_live_ranges(int reg) inactive_live_ranges() argument
[all...] |
| /third_party/node/deps/v8/src/compiler/backend/s390/ |
| H A D | code-generator-s390.cc | 1170 Register reg = i.InputRegister(0); in AssembleArchInstruction() local
1222 Register reg = i.InputRegister(0); in AssembleArchInstruction() local
1239 Register reg = i.InputRegister(0); in AssembleArchInstruction() local
3317 Register reg = i.OutputRegister(instr->OutputCount() - 1); AssembleArchBoolean() local
[all...] |
| /third_party/node/deps/v8/src/debug/ |
| H A D | debug.cc | 2866 interpreter::Register reg; in PerformSideEffectCheckAtBytecode() local
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| /third_party/node/deps/v8/src/codegen/ia32/ |
| H A D | assembler-ia32.h | 217 V8_INLINE explicit Operand(Register reg) { set_modrm(3, reg); } in Operand() argument
221 Register reg = Register::from_code(xmm_reg.code()); in Operand() local
586 cmpb(Register reg, Immediate imm8) cmpb() argument
605 cmp(Register reg, const Immediate& imm) cmp() argument
698 test(Operand op, Register reg) test() argument
702 test_b(Operand op, Register reg) test_b() argument
707 test_w(Operand op, Register reg) test_w() argument
754 call(Register reg) call() argument
763 jmp(Register reg) jmp() argument
[all...] |
| H A D | macro-assembler-ia32.cc | 312 Register reg = saved_regs[i]; in RequiredStackSizeForCallerSaved() local
334 Register reg = saved_regs[i]; in PushCallerSaved() local
346 XMMRegister reg in PushCallerSaved() local
348 Movdqu(Operand(esp, (i - 1) * kStackSavedSavedFPSize), reg); PushCallerSaved() local
350 Movsd(Operand(esp, (i - 1) * kStackSavedSavedFPSize), reg); PushCallerSaved() local
367 XMMRegister reg = XMMRegister::from_code(i); PopCallerSaved() local
379 Register reg = saved_regs[i]; PopCallerSaved() local
1036 XMMRegister reg = XMMRegister::from_code(i); CallRecordWriteStub() local
1037 movsd(Operand(ebp, offset - ((i + 1) * kDoubleSize)), reg); CallRecordWriteStub() local
1079 XMMRegister reg = XMMRegister::from_code(i); CallRecordWriteStub() local
[all...] |
| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | constants-arm.h | 663 int reg; member
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| /third_party/node/deps/v8/src/codegen/x64/ |
| H A D | assembler-x64.h | 650 void testb(Register reg, Operand op) { testb(op, reg); } in testb() argument
652 void testw(Register reg, Operand op) { testw(op, reg); } in testw() argument
978 sse2_instr(XMMRegister reg, byte imm8, byte prefix, byte escape, byte opcode, int extension) sse2_instr() argument
2246 emit_operand(Register reg, Operand adr) emit_operand() argument
2256 emit_modrm(Register reg, Register rm_reg) emit_modrm() argument
2474 emit_test(Register reg, Operand op, int size) emit_test() argument
[all...] |