| /third_party/backends/backend/ |
| H A D | rts8891.c | 2923 SANE_Byte reg; in set_lamp_brightness() local
2977 SANE_Byte reg; init_lamp() local
3017 SANE_Byte control, reg; find_origin() local
3342 SANE_Byte reg = 0xa2; find_margin() local
3517 SANE_Byte reg, control; initialize_device() local
4028 SANE_Byte control, reg, id; init_device() local
7658 SANE_Byte reg, control; park_head() local
7768 SANE_Byte reg; set_lamp_state() local
[all...] |
| /third_party/alsa-lib/include/sound/uapi/ |
| H A D | asoc.h | 272 __le32 reg; member
491 __le32 reg; /* negative reg = no direct dapm */ member
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| /third_party/mesa3d/src/amd/addrlib/src/r800/ |
| H A D | siaddrlib.cpp | 2277 GB_ADDR_CONFIG reg; in DecodeGbRegs() local
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| /third_party/mesa3d/src/freedreno/ir3/ |
| H A D | ir3_spill.c | 335 can_rematerialize(struct ir3_register *reg) in can_rematerialize() argument
349 rematerialize(struct ir3_register *reg, struct ir3_instruction *after, in rematerialize() argument
378 ra_spill_interval_init(struct ra_spill_interval *interval, struct ir3_register *reg) ra_spill_interval_init() argument
671 get_spill_slot(struct ra_spill_ctx *ctx, struct ir3_register *reg) get_spill_slot() argument
728 struct ir3_register *reg; spill() local
899 reload(struct ra_spill_ctx *ctx, struct ir3_register *reg, struct ir3_instruction *after, struct ir3_block *block) reload() argument
1122 struct ir3_register *reg = rzalloc(ctx, struct ir3_register); create_temp_interval() local
1612 struct ir3_register *reg = ctx->live->definitions[name]; spill_single_pred_live_in() local
1690 struct ir3_register *reg = ctx->live->definitions[name]; reload_live_outs() local
1799 struct ir3_register *reg = ctx->live->definitions[name]; handle_block() local
1824 struct ir3_register *reg = ctx->live->definitions[name]; handle_block() local
[all...] |
| /third_party/mesa3d/src/amd/vulkan/ |
| H A D | radv_perfcounter.c | 450 uint32_t reg = pool->counters[i].regs[j]; in radv_pc_init_query_pool() local
518 unsigned reg = regs->counter0_lo; in radv_pc_emit_block_instance_read() local
762 radv_pc_sum_reg(uint32_t reg, const uint64_t *data) in radv_pc_sum_reg() argument
779 radv_pc_max_reg(uint32_t reg, const uint64_t *data) radv_pc_max_reg() argument
[all...] |
| H A D | radv_device_generated_commands.c | 738 nir_ssa_def *reg = in build_dgc_prepare_shader() local
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| /third_party/mesa3d/src/amd/compiler/ |
| H A D | aco_lower_to_hw_instr.cpp | 1504 PhysReg reg = def.physReg().advance(op.physReg().byte()); do_pack_2x16() local
2025 PhysReg reg = instr->operands[0].physReg(); lower_to_hw_instr() local
2042 PhysReg reg = instr->definitions[0].physReg(); lower_to_hw_instr() local
2071 PhysReg reg = instr->operands[0].physReg(); lower_to_hw_instr() local
2195 PhysReg reg = instr->definitions[0].physReg(); lower_to_hw_instr() local
[all...] |
| /third_party/mesa3d/src/broadcom/compiler/ |
| H A D | vir.c | 335 struct qreg reg; in vir_get_temp() local
1938 vir_follow_movs(struct v3d_compile *c, struct qreg reg) in vir_follow_movs() argument
[all...] |
| /third_party/mesa3d/src/intel/common/ |
| H A D | intel_batch_decoder.c | 1076 struct intel_group *reg = intel_spec_find_register(ctx->spec, reg_addr); in handle_gt_mode() local
1115 struct intel_group *reg = intel_spec_find_register(ctx->spec, p[i * 2 + 1]); in decode_load_register_imm() local
[all...] |
| /third_party/mesa3d/src/intel/compiler/ |
| H A D | brw_disasm.c | 832 reg(FILE *file, unsigned _reg_file, unsigned _reg_nr) in reg() function
[all...] |
| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| H A D | radeon_vcn_dec.c | 2141 static void set_reg(struct radeon_decoder *dec, unsigned reg, uint32_t val) in set_reg() argument
[all...] |
| /third_party/mesa3d/src/gallium/drivers/svga/ |
| H A D | svga_tgsi_insn.c | 91 const struct tgsi_full_dst_register *reg = &insn->Dst[idx]; in translate_dst_register() local
991 struct src_register reg; get_fake_arl_const() local
1014 struct src_register reg; get_tex_dimensions() local
1354 const struct tgsi_full_src_register *reg = &insn->Src[0]; emit_cond_discard() local
2140 const struct tgsi_full_src_register *reg = &insn->Src[0]; emit_deriv() local
3646 const struct tgsi_full_src_register *reg = &insn->Src[0]; pre_parse_instruction() local
3654 const struct tgsi_full_src_register *reg = &insn->Src[1]; pre_parse_instruction() local
3662 const struct tgsi_full_src_register *reg = &insn->Src[2]; pre_parse_instruction() local
[all...] |
| /third_party/mesa3d/src/gallium/frontends/nine/ |
| H A D | nine_ff.c | 1112 struct ureg_src reg; in ps_get_ts_arg() local
[all...] |
| /third_party/node/deps/v8/src/wasm/ |
| H A D | wasm-debug.cc | 597 auto reg = LiftoffRegister::from_liftoff_code(value->reg_code); in GetValue() local
[all...] |
| /third_party/mesa3d/src/intel/perf/ |
| H A D | intel_perf.h | 106 uint32_t reg; member
213 uint32_t reg; member
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| /third_party/mesa3d/src/mesa/main/ |
| H A D | ffvertex_prog.c | 352 struct ureg reg; in make_ureg() local
369 swizzle( struct ureg reg, int x, int y, int z, int w ) swizzle() argument
379 swizzle1( struct ureg reg, int x ) swizzle1() argument
541 emit_dst( struct prog_dst_register *dst, struct ureg reg, GLuint mask ) emit_dst() argument
[all...] |
| /third_party/mesa3d/src/intel/tools/ |
| H A D | aubinator_viewer.cpp | 846 struct intel_group *reg = (struct intel_group *) entry->data; in display_registers_window() local
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| /third_party/mesa3d/src/nouveau/codegen/ |
| H A D | nv50_ir_ra.cpp | 151 assign(int32_t& reg, DataFile f, unsigned int size, unsigned int maxReg) assign() argument
161 isOccupied(DataFile f, int32_t reg, unsigned int size) const isOccupied() argument
173 occupyMask(DataFile f, int32_t reg, uint8_t mask) occupyMask() argument
179 occupy(DataFile f, int32_t reg, unsigned int size) occupy() argument
196 testOccupy(DataFile f, int32_t reg, unsigned int size) testOccupy() argument
205 release(DataFile f, int32_t reg, unsigned int size) release() argument
785 int32_t reg; global() member in nv50_ir::GCRA::RIG_Node
1006 Value *reg = reinterpret_cast<Value *>(it.get())->asLValue(); coalesceValues() local
1984 unsigned int reg = regs.idToBytes(split->getSrc(0)); resolveSplitsAndMerges() local
1998 unsigned int reg = regs.idToBytes(merge->getDef(0)); resolveSplitsAndMerges() local
[all...] |
| H A D | nv50_ir_emit_gm107.cpp | 2572 int reg = entry->reg; gm107_interpApply() local
[all...] |
| H A D | nv50_ir_emit_gk110.cpp | 2056 int reg = entry->reg; gk110_interpApply() local
[all...] |
| /third_party/mesa3d/src/panfrost/bifrost/ |
| H A D | compiler.h | 134 bool reg : 1; member
154 bi_register(unsigned reg) in bi_register() argument
[all...] |
| /third_party/ltp/tools/sparse/sparse-src/ |
| H A D | example.c | 157 struct hardreg *reg; member
382 static void flush_reg(struct bb_state *state, struct hardreg *reg) in flush_reg() argument
402 find_pseudo_storage(struct bb_state *state, pseudo_t pseudo, struct hardreg *reg) find_pseudo_storage() argument
441 mark_reg_dead(struct bb_state *state, pseudo_t pseudo, struct hardreg *reg) mark_reg_dead() argument
456 add_pseudo_reg(struct bb_state *state, pseudo_t pseudo, struct hardreg *reg) add_pseudo_reg() argument
478 struct hardreg *reg = hardregs; empty_reg() local
491 struct hardreg *reg; target_reg() local
524 struct hardreg *reg; find_in_reg() local
543 struct hardreg *reg = find_in_reg(state, pseudo); flush_pseudo() local
549 flush_cc_cache_to_reg(struct bb_state *state, pseudo_t pseudo, struct hardreg *reg) flush_cc_cache_to_reg() argument
643 struct hardreg *reg; getreg() local
660 struct hardreg *reg; copy_reg() local
736 struct hardreg *reg; get_generic_operand() local
798 struct hardreg *reg; generic() local
865 kill_dead_reg(struct hardreg *reg) kill_dead_reg() argument
907 is_dead_reg(struct bb_state *state, pseudo_t pseudo, struct hardreg *reg) is_dead_reg() argument
998 struct hardreg *reg; kill_pseudo() local
1079 struct hardreg *reg = getreg(state, br->cond, NULL); generate_branch() local
1096 struct hardreg *reg = hardregs + SWITCH_REG; generate_switch() local
1107 struct hardreg *reg = getreg(state, ret->src, NULL); generate_ret() local
1149 struct hardreg *reg = getreg(state, insn->src1, NULL); generate_select() local
1161 struct hardreg *reg; global() member
1259 struct hardreg *reg, *orig; generate_asm_inputs() local
1301 struct hardreg *reg; generate_asm_outputs() local
1466 write_reg_to_storage(struct bb_state *state, struct hardreg *reg, pseudo_t pseudo, struct storage *storage) write_reg_to_storage() argument
1546 struct hardreg *reg = hardregs + i; fill_output() local
1583 final_pseudo_flush(struct bb_state *state, pseudo_t pseudo, struct hardreg *reg) final_pseudo_flush() argument
1652 struct hardreg *reg = hardregs + out->regno; generate_output_storage() local
1759 struct hardreg *reg = hardregs + s->regno; mark_used_registers() local
[all...] |
| /third_party/node/deps/v8/src/compiler/backend/arm64/ |
| H A D | code-generator-arm64.cc | 691 Register reg = i.InputRegister(0); AssembleArchInstruction() local
745 Register reg = i.InputRegister(0); AssembleArchInstruction() local
758 Register reg = i.InputRegister(0); AssembleArchInstruction() local
[all...] |
| /third_party/node/deps/v8/src/compiler/backend/mips64/ |
| H A D | code-generator-mips64.cc | 582 Register reg = i.InputRegister(0); in AssembleArchInstruction() local
633 Register reg = i.InputRegister(0); in AssembleArchInstruction() local
646 Register reg = i.InputRegister(0); AssembleArchInstruction() local
[all...] |
| /third_party/node/deps/v8/src/compiler/backend/ppc/ |
| H A D | code-generator-ppc.cc | 806 Register reg = i.InputRegister(0); in AssembleArchInstruction() local
869 Register reg = i.InputRegister(0); in AssembleArchInstruction() local
887 Register reg = i.InputRegister(0); in AssembleArchInstruction() local
3922 Register reg = i.OutputRegister(instr->OutputCount() - 1); AssembleArchBoolean() local
3953 __ isel(NegateCondition(cond), reg, r0, reg, cr); AssembleArchBoolean() local
[all...] |