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/third_party/mesa3d/src/gallium/drivers/radeonsi/
H A Dradeon_vcn_dec.c2141 static void set_reg(struct radeon_decoder *dec, unsigned reg, uint32_t val) in set_reg() argument
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/third_party/mesa3d/src/gallium/drivers/svga/
H A Dsvga_tgsi_insn.c91 const struct tgsi_full_dst_register *reg = &insn->Dst[idx]; in translate_dst_register() local
991 struct src_register reg; get_fake_arl_const() local
1014 struct src_register reg; get_tex_dimensions() local
1354 const struct tgsi_full_src_register *reg = &insn->Src[0]; emit_cond_discard() local
2140 const struct tgsi_full_src_register *reg = &insn->Src[0]; emit_deriv() local
3646 const struct tgsi_full_src_register *reg = &insn->Src[0]; pre_parse_instruction() local
3654 const struct tgsi_full_src_register *reg = &insn->Src[1]; pre_parse_instruction() local
3662 const struct tgsi_full_src_register *reg = &insn->Src[2]; pre_parse_instruction() local
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/third_party/mesa3d/src/gallium/frontends/nine/
H A Dnine_ff.c1112 struct ureg_src reg; in ps_get_ts_arg() local
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/third_party/node/deps/v8/src/wasm/
H A Dwasm-debug.cc597 auto reg = LiftoffRegister::from_liftoff_code(value->reg_code); in GetValue() local
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/third_party/mesa3d/src/intel/perf/
H A Dintel_perf.h106 uint32_t reg; member
213 uint32_t reg; member
/third_party/mesa3d/src/mesa/main/
H A Dffvertex_prog.c352 struct ureg reg; in make_ureg() local
369 swizzle( struct ureg reg, int x, int y, int z, int w ) swizzle() argument
379 swizzle1( struct ureg reg, int x ) swizzle1() argument
541 emit_dst( struct prog_dst_register *dst, struct ureg reg, GLuint mask ) emit_dst() argument
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/third_party/mesa3d/src/intel/tools/
H A Daubinator_viewer.cpp846 struct intel_group *reg = (struct intel_group *) entry->data; in display_registers_window() local
/third_party/mesa3d/src/nouveau/codegen/
H A Dnv50_ir_ra.cpp151 assign(int32_t& reg, DataFile f, unsigned int size, unsigned int maxReg) assign() argument
161 isOccupied(DataFile f, int32_t reg, unsigned int size) const isOccupied() argument
173 occupyMask(DataFile f, int32_t reg, uint8_t mask) occupyMask() argument
179 occupy(DataFile f, int32_t reg, unsigned int size) occupy() argument
196 testOccupy(DataFile f, int32_t reg, unsigned int size) testOccupy() argument
205 release(DataFile f, int32_t reg, unsigned int size) release() argument
785 int32_t reg; global() member in nv50_ir::GCRA::RIG_Node
1006 Value *reg = reinterpret_cast<Value *>(it.get())->asLValue(); coalesceValues() local
1984 unsigned int reg = regs.idToBytes(split->getSrc(0)); resolveSplitsAndMerges() local
1998 unsigned int reg = regs.idToBytes(merge->getDef(0)); resolveSplitsAndMerges() local
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H A Dnv50_ir_emit_gm107.cpp2572 int reg = entry->reg; gm107_interpApply() local
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H A Dnv50_ir_emit_gk110.cpp2056 int reg = entry->reg; gk110_interpApply() local
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/third_party/mesa3d/src/panfrost/bifrost/
H A Dcompiler.h134 bool reg : 1; member
154 bi_register(unsigned reg) in bi_register() argument
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/third_party/ltp/tools/sparse/sparse-src/
H A Dexample.c157 struct hardreg *reg; member
382 static void flush_reg(struct bb_state *state, struct hardreg *reg) in flush_reg() argument
402 find_pseudo_storage(struct bb_state *state, pseudo_t pseudo, struct hardreg *reg) find_pseudo_storage() argument
441 mark_reg_dead(struct bb_state *state, pseudo_t pseudo, struct hardreg *reg) mark_reg_dead() argument
456 add_pseudo_reg(struct bb_state *state, pseudo_t pseudo, struct hardreg *reg) add_pseudo_reg() argument
478 struct hardreg *reg = hardregs; empty_reg() local
491 struct hardreg *reg; target_reg() local
524 struct hardreg *reg; find_in_reg() local
543 struct hardreg *reg = find_in_reg(state, pseudo); flush_pseudo() local
549 flush_cc_cache_to_reg(struct bb_state *state, pseudo_t pseudo, struct hardreg *reg) flush_cc_cache_to_reg() argument
643 struct hardreg *reg; getreg() local
660 struct hardreg *reg; copy_reg() local
736 struct hardreg *reg; get_generic_operand() local
798 struct hardreg *reg; generic() local
865 kill_dead_reg(struct hardreg *reg) kill_dead_reg() argument
907 is_dead_reg(struct bb_state *state, pseudo_t pseudo, struct hardreg *reg) is_dead_reg() argument
998 struct hardreg *reg; kill_pseudo() local
1079 struct hardreg *reg = getreg(state, br->cond, NULL); generate_branch() local
1096 struct hardreg *reg = hardregs + SWITCH_REG; generate_switch() local
1107 struct hardreg *reg = getreg(state, ret->src, NULL); generate_ret() local
1149 struct hardreg *reg = getreg(state, insn->src1, NULL); generate_select() local
1161 struct hardreg *reg; global() member
1259 struct hardreg *reg, *orig; generate_asm_inputs() local
1301 struct hardreg *reg; generate_asm_outputs() local
1466 write_reg_to_storage(struct bb_state *state, struct hardreg *reg, pseudo_t pseudo, struct storage *storage) write_reg_to_storage() argument
1546 struct hardreg *reg = hardregs + i; fill_output() local
1583 final_pseudo_flush(struct bb_state *state, pseudo_t pseudo, struct hardreg *reg) final_pseudo_flush() argument
1652 struct hardreg *reg = hardregs + out->regno; generate_output_storage() local
1759 struct hardreg *reg = hardregs + s->regno; mark_used_registers() local
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/third_party/node/deps/v8/src/compiler/backend/arm64/
H A Dcode-generator-arm64.cc691 Register reg = i.InputRegister(0); AssembleArchInstruction() local
745 Register reg = i.InputRegister(0); AssembleArchInstruction() local
758 Register reg = i.InputRegister(0); AssembleArchInstruction() local
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/third_party/node/deps/v8/src/compiler/backend/mips64/
H A Dcode-generator-mips64.cc582 Register reg = i.InputRegister(0); in AssembleArchInstruction() local
633 Register reg = i.InputRegister(0); in AssembleArchInstruction() local
646 Register reg = i.InputRegister(0); AssembleArchInstruction() local
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/third_party/node/deps/v8/src/compiler/backend/ppc/
H A Dcode-generator-ppc.cc806 Register reg = i.InputRegister(0); in AssembleArchInstruction() local
869 Register reg = i.InputRegister(0); in AssembleArchInstruction() local
887 Register reg = i.InputRegister(0); in AssembleArchInstruction() local
3922 Register reg = i.OutputRegister(instr->OutputCount() - 1); AssembleArchBoolean() local
3953 __ isel(NegateCondition(cond), reg, r0, reg, cr); AssembleArchBoolean() local
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/third_party/node/deps/v8/src/compiler/backend/ia32/
H A Dcode-generator-ia32.cc703 Register reg = i.InputRegister(0); in AssembleArchInstruction() local
757 Register reg = i.InputRegister(0); in AssembleArchInstruction() local
770 Register reg = i.InputRegister(0); AssembleArchInstruction() local
3822 Register reg = i.OutputRegister(instr->OutputCount() - 1); AssembleArchBoolean() local
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/third_party/node/deps/v8/src/compiler/backend/mips/
H A Dcode-generator-mips.cc619 Register reg = i.InputRegister(0); in AssembleArchInstruction() local
667 Register reg = i.InputRegister(0); in AssembleArchInstruction() local
680 Register reg in AssembleArchInstruction() local
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/third_party/node/deps/v8/src/compiler/backend/loong64/
H A Dcode-generator-loong64.cc567 Register reg = i.InputRegister(0); in AssembleArchInstruction() local
615 Register reg = i.InputRegister(0); in AssembleArchInstruction() local
627 Register reg = i.InputRegister(0); in AssembleArchInstruction() local
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/third_party/node/deps/v8/src/compiler/backend/riscv64/
H A Dcode-generator-riscv64.cc638 Register reg = i.InputRegister(0); in AssembleArchInstruction() local
673 Register reg = i.InputOrZeroRegister(0); in AssembleArchInstruction() local
698 Register reg = i.InputOrZeroRegister(0); in AssembleArchInstruction() local
/third_party/node/deps/v8/src/builtins/
H A Dbuiltins-regexp-gen.cc1670 const TNode<IntPtrT> reg = var_reg.value(); in RegExpPrototypeSplitBody() local
/third_party/node/deps/v8/src/codegen/arm64/
H A Dassembler-arm64-inl.h245 Operand::Operand(Register reg, Shift shift, unsigned shift_amount) in Operand() argument
256 Operand::Operand(Register reg, Extend extend, unsigned shift_amount) in Operand() argument
344 Register Operand::reg() const { reg() function in v8::internal::Operand
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H A Dmacro-assembler-arm64.h1146 void CanonicalizeNaN(const VRegister& reg) { CanonicalizeNaN(reg, reg); } in CanonicalizeNaN() argument
1837 void DecodeField(Register reg) { in DecodeField() argument
2172 const CPURegister& reg = copy.PopHighestIndex(); Exclude() local
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H A Dmacro-assembler-arm64-inl.h1383 void TurboAssembler::TestAndBranchIfAnySet(const Register& reg, in TestAndBranchIfAnySet() argument
1396 void TurboAssembler::TestAndBranchIfAllClear(const Register& reg, in TestAndBranchIfAllClear() argument
/third_party/node/deps/v8/src/diagnostics/x64/
H A Ddisasm-x64.cc2097 int reg = (opcode - 0xC8) | (rex_r() ? 8 : 0); TwoByteOpcodeInstruction() local
2593 int reg = (*data & 0x7) | (rex_b() ? 8 : 0); InstructionDecode() local
2624 int reg = (opcode & 0x7) | (rex_b() ? 8 : 0); InstructionDecode() local
2823 NameOfYMMRegister(int reg) NameOfYMMRegister() argument
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/third_party/node/deps/v8/src/execution/ppc/
H A Dsimulator-ppc.h421 T get_simd_register_by_lane(int reg, int lane, in get_simd_register_by_lane() argument
434 T get_simd_register_bytes(int reg, int byte_from) { in get_simd_register_bytes() argument
444 void set_simd_register_by_lane(int reg, in argument
457 set_simd_register_bytes(int reg, int byte_from, T value) set_simd_register_bytes() argument
464 get_simd_register(int reg) get_simd_register() argument
466 set_simd_register(int reg, const simdr_t& value) set_simd_register() argument
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