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Searched defs:opcode (Results 651 - 675 of 710) sorted by relevance

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/third_party/skia/third_party/externals/spirv-cross/
H A Dspirv_common.hpp503 spv::Op opcode; member
1735 static inline bool opcode_is_sign_invariant(spv::Op opcode) in opcode_is_sign_invariant() argument
H A Dspirv_cross.cpp613 bool Compiler::InterfaceVariableAccessHandler::handle(Op opcode, const uint32_t *args, uint32_t length) in handle() argument
1973 bool Compiler::BufferAccessHandler::handle(Op opcode, const uint32_t *args, uint32_t length) in handle() argument
2542 bool Compiler::DummySamplerForCombinedImageHandler::handle(Op opcode, cons argument
2623 handle(Op opcode, const uint32_t *args, uint32_t length) handle() argument
4013 handle(spv::Op opcode, const uint32_t *args, uint32_t length) handle() argument
4207 handle(spv::Op opcode, const uint32_t *args, uint32_t) handle() argument
4348 handle(Op opcode, const uint32_t *args, uint32_t length) handle() argument
4782 handle(Op opcode, const uint32_t *args, uint32_t length) handle() argument
[all...]
H A Dspirv_hlsl.cpp4748 auto opcode = static_cast<Op>(instruction.op); in emit_instruction() local
[all...]
H A Dspirv_msl.cpp7514 auto opcode = static_cast<Op>(instruction.op); in emit_instruction() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.cpp1529 unsigned opcode = Cond[0].getImm(); in reverseBranchCondition() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
H A DX86InstrInfo.cpp6540 lookup(unsigned opcode, unsigned domain, ArrayRef<uint16_t[3]> Table) lookup() argument
6548 lookupAVX512(unsigned opcode, unsigned domain, ArrayRef<uint16_t[4]> Table) lookupAVX512() argument
6822 unsigned opcode = MI.getOpcode(); getExecutionDomain() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/
H A DInstCombineCalls.cpp4736 Instruction::CastOps opcode = in transformConstExprCastCall() local
/vendor/hihope/dayu210/bluetooth/include/
H A Duipc_msg.h59 uint8_t opcode; /* UIPC_OPEN_REQ */ member
65 uint8_t opcode; /* UIPC_OPEN_RESP */ member
75 uint8_t opcode; /* UIPC_CLOSE_REQ */ member
81 uint8_t opcode; /* UIPC_CLOSE_RSP */ member
87 uint8_t opcode; member
232 uint8_t opcode; /* AVDT_SYNC_TO_BTC_LITE_REQ */ member
238 uint8_t opcode; /* AVDT_SYNC_TO_BTC_LITE_RESP */ member
313 uint8_t opcode; /* A2DP_START_REQ */ member
319 uint8_t opcode; /* A2DP_STOP_REQ */ member
324 uint8_t opcode; /* A2DP_SUSPEND_RE member
329 uint8_t opcode; /* A2DP_CLEANUP_REQ */ global() member
335 uint8_t opcode; /* A2DP_START_RESP, A2DP_STOP_RESP, A2DP_CLEANUP_RESP, A2DP_SUSPEND_RESP */ global() member
560 uint8_t opcode; /* AUDIO_CODEC_CONFIG_REQ */ global() member
572 uint8_t opcode; /* AUDIO_CODEC_CONFIG_RESP */ global() member
577 uint8_t opcode; /* AUDIO_CODEC_SET_BITRATE_REQ */ global() member
649 uint8_t opcode; /* AUDIO_ROUTE_CONFIG_REQ */ global() member
659 uint8_t opcode; /* AUDIO_ROUTE_CONFIG_RESP */ global() member
694 uint8_t opcode; /* AUDIO_MIX_CONFIG_REQ */ global() member
702 uint8_t opcode; /* AUDIO_MIX_CONFIG_RESP */ global() member
707 uint8_t opcode; /* AUDIO_BURST_FRAMES_IND */ global() member
712 uint8_t opcode; /* AUDIO_BURST_END_IND */ global() member
716 uint8_t opcode; /* AUDIO_CODEC_FLUSH_REQ */ global() member
720 uint8_t opcode; /* AUDIO_EQ_MODE_CONFIG_REQ */ global() member
726 uint8_t opcode; /* AUDIO_SCALE_CONFIG_REQ */ global() member
[all...]
/vendor/hihope/rk3568/bluetooth/include/
H A Duipc_msg.h59 uint8_t opcode; /* UIPC_OPEN_REQ */ member
65 uint8_t opcode; /* UIPC_OPEN_RESP */ member
75 uint8_t opcode; /* UIPC_CLOSE_REQ */ member
81 uint8_t opcode; /* UIPC_CLOSE_RSP */ member
87 uint8_t opcode; member
232 uint8_t opcode; /* AVDT_SYNC_TO_BTC_LITE_REQ */ member
238 uint8_t opcode; /* AVDT_SYNC_TO_BTC_LITE_RESP */ member
313 uint8_t opcode; /* A2DP_START_REQ */ member
319 uint8_t opcode; /* A2DP_STOP_REQ */ member
324 uint8_t opcode; /* A2DP_SUSPEND_RE member
329 uint8_t opcode; /* A2DP_CLEANUP_REQ */ global() member
335 uint8_t opcode; /* A2DP_START_RESP, A2DP_STOP_RESP, A2DP_CLEANUP_RESP, A2DP_SUSPEND_RESP */ global() member
560 uint8_t opcode; /* AUDIO_CODEC_CONFIG_REQ */ global() member
572 uint8_t opcode; /* AUDIO_CODEC_CONFIG_RESP */ global() member
577 uint8_t opcode; /* AUDIO_CODEC_SET_BITRATE_REQ */ global() member
649 uint8_t opcode; /* AUDIO_ROUTE_CONFIG_REQ */ global() member
659 uint8_t opcode; /* AUDIO_ROUTE_CONFIG_RESP */ global() member
694 uint8_t opcode; /* AUDIO_MIX_CONFIG_REQ */ global() member
702 uint8_t opcode; /* AUDIO_MIX_CONFIG_RESP */ global() member
707 uint8_t opcode; /* AUDIO_BURST_FRAMES_IND */ global() member
712 uint8_t opcode; /* AUDIO_BURST_END_IND */ global() member
716 uint8_t opcode; /* AUDIO_CODEC_FLUSH_REQ */ global() member
720 uint8_t opcode; /* AUDIO_EQ_MODE_CONFIG_REQ */ global() member
726 uint8_t opcode; /* AUDIO_SCALE_CONFIG_REQ */ global() member
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/third_party/NuttX/include/nuttx/
H A Dscsi.h615 uint8_t opcode; /* 0: 0x03 */ member
642 uint8_t opcode; /* 0: 0x12 */ member
691 uint8_t opcode; /* 0x15 */ member
701 uint8_t opcode; /* 0x1a */ member
764 uint8_t opcode; /* 0: 0x08 */ member
774 uint8_t opcode; /* 0: 0x0a */ member
784 uint8_t opcode; /* 0: 0x1b */ member
795 uint8_t opcode; /* 0: 0x1e */ member
804 uint8_t opcode; /* 0: 0x23 */ member
837 uint8_t opcode; /* member
855 uint8_t opcode; /* 0: 0x9E */ global() member
875 uint8_t opcode; /* 0: 0x88 */ global() member
886 uint8_t opcode; /* 0: 0x8a */ global() member
897 uint8_t opcode; /* 0: 0x28 */ global() member
908 uint8_t opcode; /* 0: 0x2a */ global() member
919 uint8_t opcode; /* 0: 0x2f */ global() member
930 uint8_t opcode; /* 0: 0x35 */ global() member
941 uint8_t opcode; /* 0: 0x55 */ global() member
961 uint8_t opcode; /* O: 0x5a */ global() member
973 uint8_t opcode; /* 0: 0xa8 */ global() member
984 uint8_t opcode; /* 0: 0xaa */ global() member
995 uint8_t opcode; /* 0: 0xaf */ global() member
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/third_party/mesa3d/src/freedreno/vulkan/
H A Dtu_pipeline.c35 emit_load_state(struct tu_cs *cs, unsigned opcode, enum a6xx_state_type st, in emit_load_state() argument
890 tu6_emit_const(struct tu_cs *cs, uint32_t opcode, uint32_t base, in tu6_emit_const() argument
/third_party/mesa3d/src/compiler/glsl/
H A Dbuiltin_functions.cpp7128 builtin_builder::_texture(ir_texture_opcode opcode, in _texture() argument
5757 unop(builtin_available_predicate avail, ir_expression_operation opcode, const glsl_type *return_type, const glsl_type *param_type) unop() argument
5783 binop(builtin_available_predicate avail, ir_expression_operation opcode, const glsl_type *return_type, const glsl_type *param0_type, const glsl_type *param1_type, bool swap_operands) binop() argument
7252 _textureCubeArrayShadow(ir_texture_opcode opcode, builtin_available_predicate avail, const glsl_type *sampler_type, int flags) _textureCubeArrayShadow() argument
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/third_party/mesa3d/src/gallium/drivers/r600/
H A Dr600_shader.c3443 unsigned opcode; in r600_shader_from_tgsi() local
7560 int opcode; in tgsi_tex() local
9375 get_gds_op(int opcode) get_gds_op() argument
9506 get_lds_op(int opcode) get_lds_op() argument
10387 emit_logic_pred(struct r600_shader_ctx *ctx, int opcode, int alu_type, struct r600_bytecode_alu_src *src) emit_logic_pred() argument
10630 emit_if(struct r600_shader_ctx *ctx, int opcode, struct r600_bytecode_alu_src *src) emit_if() argument
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H A Dr600_isa.h173 int opcode[2]; member
186 int opcode[4]; member
195 int opcode[4]; member
728 r600_isa_alu_by_opcode(struct r600_isa* isa, unsigned opcode, unsigned is_op3) { in r600_isa_alu_by_opcode() argument
742 r600_isa_fetch_by_opcode(struct r600_isa* isa, unsigned opcode) r600_isa_fetch_by_opcode() argument
751 r600_isa_cf_by_opcode(struct r600_isa* isa, unsigned opcode, unsigned is_alu) r600_isa_cf_by_opcode() argument
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/third_party/node/deps/v8/src/wasm/baseline/mips/
H A Dliftoff-assembler-mips.h1380 bool LiftoffAssembler::emit_type_conversion(WasmOpcode opcode, in emit_type_conversion() argument
/third_party/node/deps/v8/src/wasm/baseline/loong64/
H A Dliftoff-assembler-loong64.h1320 bool LiftoffAssembler::emit_type_conversion(WasmOpcode opcode, in emit_type_conversion() argument
/third_party/mesa3d/src/microsoft/compiler/
H A Ddxil_module.c2631 dxil_emit_binop(struct dxil_module *m, enum dxil_bin_opcode opcode, in dxil_emit_binop() argument
2688 dxil_emit_cast(struct dxil_module *m, enum dxil_cast_opcode opcode, in dxil_emit_cast() argument
/third_party/node/deps/v8/src/codegen/mips64/
H A Dassembler-mips64.cc442 uint32_t opcode = GetOpcodeField(instr); in IsMsaBranch() local
466 uint32_t opcode = GetOpcodeField(instr); in IsBranch() local
490 uint32_t opcode = GetOpcodeField(instr); IsBc() local
496 uint32_t opcode = GetOpcodeField(instr); IsNal() local
503 uint32_t opcode = GetOpcodeField(instr); IsBzc() local
519 uint32_t opcode = GetOpcodeField(instr); IsBeqzc() local
524 uint32_t opcode = GetOpcodeField(instr); IsBnezc() local
529 uint32_t opcode = GetOpcodeField(instr); IsBeqc() local
536 uint32_t opcode = GetOpcodeField(instr); IsBnec() local
543 uint32_t opcode = GetOpcodeField(instr); IsMov() local
557 uint32_t opcode = GetOpcodeField(instr); IsJump() local
569 uint32_t opcode = GetOpcodeField(instr); IsJ() local
585 uint32_t opcode = GetOpcodeField(instr); IsLui() local
591 uint32_t opcode = GetOpcodeField(instr); IsOri() local
599 uint32_t opcode = GetOpcodeField(instr); IsNop() local
1038 uint32_t opcode = GetOpcodeField(instr); BranchOffset() local
1067 GenInstrRegister(Opcode opcode, Register rs, Register rt, Register rd, uint16_t sa, SecondaryField func) GenInstrRegister() argument
1076 GenInstrRegister(Opcode opcode, Register rs, Register rt, uint16_t msb, uint16_t lsb, SecondaryField func) GenInstrRegister() argument
1085 GenInstrRegister(Opcode opcode, SecondaryField fmt, FPURegister ft, FPURegister fs, FPURegister fd, SecondaryField func) GenInstrRegister() argument
1094 GenInstrRegister(Opcode opcode, FPURegister fr, FPURegister ft, FPURegister fs, FPURegister fd, SecondaryField func) GenInstrRegister() argument
1103 GenInstrRegister(Opcode opcode, SecondaryField fmt, Register rt, FPURegister fs, FPURegister fd, SecondaryField func) GenInstrRegister() argument
1112 GenInstrRegister(Opcode opcode, SecondaryField fmt, Register rt, FPUControlRegister fs, SecondaryField func) GenInstrRegister() argument
1122 GenInstrImmediate(Opcode opcode, Register rs, Register rt, int32_t j, CompactBranchType is_compact_branch) GenInstrImmediate() argument
1131 GenInstrImmediate(Opcode opcode, Register base, Register rt, int32_t offset9, int bit6, SecondaryField func) GenInstrImmediate() argument
1142 GenInstrImmediate(Opcode opcode, Register rs, SecondaryField SF, int32_t j, CompactBranchType is_compact_branch) GenInstrImmediate() argument
1150 GenInstrImmediate(Opcode opcode, Register rs, FPURegister ft, int32_t j, CompactBranchType is_compact_branch) GenInstrImmediate() argument
1159 GenInstrImmediate(Opcode opcode, Register rs, int32_t offset21, CompactBranchType is_compact_branch) GenInstrImmediate() argument
1166 GenInstrImmediate(Opcode opcode, Register rs, uint32_t offset21) GenInstrImmediate() argument
1173 GenInstrImmediate(Opcode opcode, int32_t offset26, CompactBranchType is_compact_branch) GenInstrImmediate() argument
1180 GenInstrJump(Opcode opcode, uint32_t address) GenInstrJump() argument
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/third_party/node/deps/v8/src/codegen/mips/
H A Dassembler-mips.cc464 uint32_t opcode = GetOpcodeField(instr); in IsMsaBranch() local
488 uint32_t opcode = GetOpcodeField(instr); in IsBranch() local
512 uint32_t opcode = GetOpcodeField(instr); IsBc() local
518 uint32_t opcode = GetOpcodeField(instr); IsNal() local
525 uint32_t opcode = GetOpcodeField(instr); IsBzc() local
541 uint32_t opcode = GetOpcodeField(instr); IsBeqzc() local
546 uint32_t opcode = GetOpcodeField(instr); IsBnezc() local
551 uint32_t opcode = GetOpcodeField(instr); IsBeqc() local
558 uint32_t opcode = GetOpcodeField(instr); IsBnec() local
565 uint32_t opcode = GetOpcodeField(instr); IsJicOrJialc() local
571 uint32_t opcode = GetOpcodeField(instr); IsJump() local
583 uint32_t opcode = GetOpcodeField(instr); IsJ() local
605 uint32_t opcode = GetOpcodeField(instr); IsLui() local
611 uint32_t opcode = GetOpcodeField(instr); IsOri() local
617 uint32_t opcode = GetOpcodeField(instr); IsAddu() local
631 uint32_t opcode = GetOpcodeField(instr); IsMov() local
647 uint32_t opcode = GetOpcodeField(instr); IsNop() local
1109 uint32_t opcode = GetOpcodeField(instr); BranchOffset() local
1138 GenInstrRegister(Opcode opcode, Register rs, Register rt, Register rd, uint16_t sa, SecondaryField func) GenInstrRegister() argument
1147 GenInstrRegister(Opcode opcode, Register rs, Register rt, uint16_t msb, uint16_t lsb, SecondaryField func) GenInstrRegister() argument
1156 GenInstrRegister(Opcode opcode, SecondaryField fmt, FPURegister ft, FPURegister fs, FPURegister fd, SecondaryField func) GenInstrRegister() argument
1165 GenInstrRegister(Opcode opcode, FPURegister fr, FPURegister ft, FPURegister fs, FPURegister fd, SecondaryField func) GenInstrRegister() argument
1174 GenInstrRegister(Opcode opcode, SecondaryField fmt, Register rt, FPURegister fs, FPURegister fd, SecondaryField func) GenInstrRegister() argument
1183 GenInstrRegister(Opcode opcode, SecondaryField fmt, Register rt, FPUControlRegister fs, SecondaryField func) GenInstrRegister() argument
1193 GenInstrImmediate(Opcode opcode, Register rs, Register rt, int32_t j, CompactBranchType is_compact_branch) GenInstrImmediate() argument
1202 GenInstrImmediate(Opcode opcode, Register base, Register rt, int32_t offset9, int bit6, SecondaryField func) GenInstrImmediate() argument
1213 GenInstrImmediate(Opcode opcode, Register rs, SecondaryField SF, int32_t j, CompactBranchType is_compact_branch) GenInstrImmediate() argument
1221 GenInstrImmediate(Opcode opcode, Register rs, FPURegister ft, int32_t j, CompactBranchType is_compact_branch) GenInstrImmediate() argument
1230 GenInstrImmediate(Opcode opcode, Register rs, int32_t offset21, CompactBranchType is_compact_branch) GenInstrImmediate() argument
1237 GenInstrImmediate(Opcode opcode, Register rs, uint32_t offset21) GenInstrImmediate() argument
1244 GenInstrImmediate(Opcode opcode, int32_t offset26, CompactBranchType is_compact_branch) GenInstrImmediate() argument
1251 GenInstrJump(Opcode opcode, uint32_t address) GenInstrJump() argument
[all...]
/third_party/node/deps/v8/src/codegen/loong64/
H A Dassembler-loong64.cc308 uint32_t opcode = (instr >> 26) << 26; in IsBranch() local
318 uint32_t opcode = (instr >> 26) << 26; IsB() local
325 uint32_t opcode = (instr >> 26) << 26; IsBz() local
338 uint32_t opcode = (instr >> 26) << 26; IsJ() local
344 uint32_t opcode = (instr >> 25) << 25; IsLu12i_w() local
349 uint32_t opcode = (instr >> 22) << 22; IsOri() local
354 uint32_t opcode = (instr >> 25) << 25; IsLu32i_d() local
359 uint32_t opcode = (instr >> 22) << 22; IsLu52i_d() local
643 uint32_t opcode = (instr >> 26) << 26; BranchOffset() local
678 GenB(Opcode opcode, Register rj, int32_t si21) GenB() argument
686 GenB(Opcode opcode, CFRegister cj, int32_t si21, bool isEq) GenB() argument
696 GenB(Opcode opcode, int32_t si26) GenB() argument
704 GenBJ(Opcode opcode, Register rj, Register rd, int32_t si16) GenBJ() argument
712 GenCmp(Opcode opcode, FPUCondition cond, FPURegister fk, FPURegister fj, CFRegister cd) GenCmp() argument
720 GenSel(Opcode opcode, CFRegister ca, FPURegister fk, FPURegister fj, FPURegister rd) GenSel() argument
728 GenRegister(Opcode opcode, Register rj, Register rd, bool rjrd) GenRegister() argument
736 GenRegister(Opcode opcode, FPURegister fj, FPURegister fd) GenRegister() argument
741 GenRegister(Opcode opcode, Register rj, FPURegister fd) GenRegister() argument
748 GenRegister(Opcode opcode, FPURegister fj, Register rd) GenRegister() argument
755 GenRegister(Opcode opcode, Register rj, FPUControlRegister fd) GenRegister() argument
761 GenRegister(Opcode opcode, FPUControlRegister fj, Register rd) GenRegister() argument
767 GenRegister(Opcode opcode, FPURegister fj, CFRegister cd) GenRegister() argument
773 GenRegister(Opcode opcode, CFRegister cj, FPURegister fd) GenRegister() argument
779 GenRegister(Opcode opcode, Register rj, CFRegister cd) GenRegister() argument
785 GenRegister(Opcode opcode, CFRegister cj, Register rd) GenRegister() argument
791 GenRegister(Opcode opcode, Register rk, Register rj, Register rd) GenRegister() argument
798 GenRegister(Opcode opcode, FPURegister fk, FPURegister fj, FPURegister fd) GenRegister() argument
805 GenRegister(Opcode opcode, FPURegister fa, FPURegister fk, FPURegister fj, FPURegister fd) GenRegister() argument
812 GenRegister(Opcode opcode, Register rk, Register rj, FPURegister fd) GenRegister() argument
819 GenImm(Opcode opcode, int32_t bit3, Register rk, Register rj, Register rd) GenImm() argument
827 GenImm(Opcode opcode, int32_t bit6m, int32_t bit6l, Register rj, Register rd) GenImm() argument
835 GenImm(Opcode opcode, int32_t bit20, Register rd) GenImm() argument
841 GenImm(Opcode opcode, int32_t bit15) GenImm() argument
847 GenImm(Opcode opcode, int32_t value, Register rj, Register rd, int32_t value_bits) GenImm() argument
863 GenImm(Opcode opcode, int32_t bit12, Register rj, FPURegister fd) GenImm() argument
[all...]
/third_party/node/deps/v8/src/codegen/arm/
H A Dassembler-arm.cc1224 uint32_t opcode = instr & kOpCodeMask; in AddrMode1() local
[all...]
/third_party/node/deps/v8/src/codegen/riscv64/
H A Dassembler-riscv64.cc817 void Assembler::GenInstrR(uint8_t funct7, uint8_t funct3, Opcode opcode, in GenInstrR() argument
827 void Assembler::GenInstrR(uint8_t funct7, uint8_t funct3, Opcode opcode, in GenInstrR() argument
837 void Assembler::GenInstrR(uint8_t funct7, uint8_t funct3, Opcode opcode, in GenInstrR() argument
847 void Assembler::GenInstrR(uint8_t funct7, uint8_t funct3, Opcode opcode, in GenInstrR() argument
857 void Assembler::GenInstrR(uint8_t funct7, uint8_t funct3, Opcode opcode, in GenInstrR() argument
867 GenInstrR(uint8_t funct7, uint8_t funct3, Opcode opcode, Register rd, FPURegister rs1, FPURegister rs2) GenInstrR() argument
877 GenInstrR4(uint8_t funct2, Opcode opcode, Register rd, Register rs1, Register rs2, Register rs3, RoundingMode frm) GenInstrR4() argument
888 GenInstrR4(uint8_t funct2, Opcode opcode, FPURegister rd, FPURegister rs1, FPURegister rs2, FPURegister rs3, RoundingMode frm) GenInstrR4() argument
910 GenInstrRFrm(uint8_t funct7, Opcode opcode, Register rd, Register rs1, Register rs2, RoundingMode frm) GenInstrRFrm() argument
919 GenInstrI(uint8_t funct3, Opcode opcode, Register rd, Register rs1, int16_t imm12) GenInstrI() argument
928 GenInstrI(uint8_t funct3, Opcode opcode, FPURegister rd, Register rs1, int16_t imm12) GenInstrI() argument
937 GenInstrIShift(bool arithshift, uint8_t funct3, Opcode opcode, Register rd, Register rs1, uint8_t shamt) GenInstrIShift() argument
947 GenInstrIShiftW(bool arithshift, uint8_t funct3, Opcode opcode, Register rd, Register rs1, uint8_t shamt) GenInstrIShiftW() argument
957 GenInstrS(uint8_t funct3, Opcode opcode, Register rs1, Register rs2, int16_t imm12) GenInstrS() argument
968 GenInstrS(uint8_t funct3, Opcode opcode, Register rs1, FPURegister rs2, int16_t imm12) GenInstrS() argument
979 GenInstrB(uint8_t funct3, Opcode opcode, Register rs1, Register rs2, int16_t imm13) GenInstrB() argument
992 GenInstrU(Opcode opcode, Register rd, int32_t imm20) GenInstrU() argument
998 GenInstrJ(Opcode opcode, Register rd, int32_t imm21) GenInstrJ() argument
1008 GenInstrCR(uint8_t funct4, Opcode opcode, Register rd, Register rs2) GenInstrCR() argument
1016 GenInstrCA(uint8_t funct6, Opcode opcode, Register rd, uint8_t funct, Register rs2) GenInstrCA() argument
1026 GenInstrCI(uint8_t funct3, Opcode opcode, Register rd, int8_t imm6) GenInstrCI() argument
1035 GenInstrCIU(uint8_t funct3, Opcode opcode, Register rd, uint8_t uimm6) GenInstrCIU() argument
1044 GenInstrCIU(uint8_t funct3, Opcode opcode, FPURegister rd, uint8_t uimm6) GenInstrCIU() argument
1053 GenInstrCIW(uint8_t funct3, Opcode opcode, Register rd, uint8_t uimm8) GenInstrCIW() argument
1062 GenInstrCSS(uint8_t funct3, Opcode opcode, Register rs2, uint8_t uimm6) GenInstrCSS() argument
1070 GenInstrCSS(uint8_t funct3, Opcode opcode, FPURegister rs2, uint8_t uimm6) GenInstrCSS() argument
1078 GenInstrCL(uint8_t funct3, Opcode opcode, Register rd, Register rs1, uint8_t uimm5) GenInstrCL() argument
1089 GenInstrCL(uint8_t funct3, Opcode opcode, FPURegister rd, Register rs1, uint8_t uimm5) GenInstrCL() argument
1099 GenInstrCJ(uint8_t funct3, Opcode opcode, uint16_t uint11) GenInstrCJ() argument
1105 GenInstrCS(uint8_t funct3, Opcode opcode, Register rs2, Register rs1, uint8_t uimm5) GenInstrCS() argument
1116 GenInstrCS(uint8_t funct3, Opcode opcode, FPURegister rs2, Register rs1, uint8_t uimm5) GenInstrCS() argument
1127 GenInstrCB(uint8_t funct3, Opcode opcode, Register rs1, uint8_t uimm8) GenInstrCB() argument
1136 GenInstrCBA(uint8_t funct3, uint8_t funct2, Opcode opcode, Register rs1, int8_t imm6) GenInstrCBA() argument
1146 GenInstrV(uint8_t funct6, Opcode opcode, VRegister vd, VRegister vs1, VRegister vs2, MaskType mask) GenInstrV() argument
1156 GenInstrV(uint8_t funct6, Opcode opcode, VRegister vd, int8_t vs1, VRegister vs2, MaskType mask) GenInstrV() argument
1166 GenInstrV(uint8_t funct6, Opcode opcode, Register rd, VRegister vs1, VRegister vs2, MaskType mask) GenInstrV() argument
1177 GenInstrV(uint8_t funct6, Opcode opcode, FPURegister fd, VRegister vs1, VRegister vs2, MaskType mask) GenInstrV() argument
1188 GenInstrV(uint8_t funct6, Opcode opcode, VRegister vd, Register rs1, VRegister vs2, MaskType mask) GenInstrV() argument
1199 GenInstrV(uint8_t funct6, Opcode opcode, VRegister vd, FPURegister fs1, VRegister vs2, MaskType mask) GenInstrV() argument
1230 GenInstrV(Opcode opcode, uint8_t width, VRegister vd, Register rs1, uint8_t umop, MaskType mask, uint8_t IsMop, bool IsMew, uint8_t Nf) GenInstrV() argument
1244 GenInstrV(Opcode opcode, uint8_t width, VRegister vd, Register rs1, Register rs2, MaskType mask, uint8_t IsMop, bool IsMew, uint8_t Nf) GenInstrV() argument
1259 GenInstrV(Opcode opcode, uint8_t width, VRegister vd, Register rs1, VRegister vs2, MaskType mask, uint8_t IsMop, bool IsMew, uint8_t Nf) GenInstrV() argument
1274 GenInstrV(uint8_t funct6, Opcode opcode, Register rd, uint8_t vs1, VRegister vs2, MaskType mask) GenInstrV() argument
[all...]
/third_party/node/deps/v8/src/wasm/baseline/x64/
H A Dliftoff-assembler-x64.h1991 bool LiftoffAssembler::emit_type_conversion(WasmOpcode opcode, in emit_type_conversion() argument
/third_party/node/deps/v8/src/wasm/baseline/riscv64/
H A Dliftoff-assembler-riscv64.h1435 bool LiftoffAssembler::emit_type_conversion(WasmOpcode opcode, in emit_type_conversion() argument
/third_party/node/deps/v8/src/wasm/baseline/mips64/
H A Dliftoff-assembler-mips64.h1464 bool LiftoffAssembler::emit_type_conversion(WasmOpcode opcode, in emit_type_conversion() argument

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