| /third_party/node/deps/v8/src/diagnostics/x64/ |
| H A D | disasm-x64.cc | 887 byte opcode = *data; in AVXInstruction() local 1832 byte opcode = *(data + 1); TwoByteOpcodeInstruction() local 2261 TwoByteMnemonic(byte opcode) TwoByteMnemonic() argument 2621 byte opcode = *data; InstructionDecode() local [all...] |
| /third_party/node/deps/v8/src/diagnostics/ia32/ |
| H A D | disasm-ia32.cc | 691 byte opcode = *data; in AVXInstruction() local [all...] |
| /third_party/node/deps/v8/src/deoptimizer/ |
| H A D | translated-state.cc | 38 TranslationOpcode opcode = TranslationOpcodeFromInt(iterator.Next()); in TranslationArrayPrintSingleFrame() local 730 TranslationOpcode opcode = TranslationOpcodeFromInt(iterator->Next()); CreateNextTranslatedFrame() local 969 TranslationOpcode opcode = TranslationOpcodeFromInt(iterator->Next()); CreateNextTranslatedValue() local 1314 TranslationOpcode opcode = TranslationOpcodeFromInt(iterator->Next()); Init() local [all...] |
| /third_party/node/deps/v8/src/interpreter/ |
| H A D | interpreter-generator.cc | 157 TNode<WordT> opcode = LoadBytecode(BytecodeOffset()); in IGNITION_HANDLER() local
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| H A D | interpreter-assembler.cc | 296 StoreRegisterForShortStar(TNode<Object> value, TNode<WordT> opcode) StoreRegisterForShortStar() argument
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| /third_party/mesa3d/src/gallium/auxiliary/nir/ |
| H A D | tgsi_to_nir.c | 857 enum tgsi_opcode opcode = c->token->FullInstruction.Instruction.Opcode; in ttn_get_src() local
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| /third_party/mesa3d/src/intel/compiler/ |
| H A D | brw_eu_emit.c | 697 brw_next_insn(struct brw_codegen *p, unsigned opcode) in brw_next_insn() argument 730 brw_alu1(struct brw_codegen *p, unsigned opcode, in brw_alu1() argument 740 brw_alu2(struct brw_codegen *p, unsigned opcode, in brw_alu2() argument 806 brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest, in brw_alu3() argument
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| H A D | brw_eu.h | 1195 lsc_opcode_has_cmask(enum lsc_opcode opcode) in lsc_opcode_has_cmask() argument 1201 lsc_opcode_has_transpose(enum lsc_opcode opcode) in lsc_opcode_has_transpose() argument 1273 lsc_msg_desc(UNUSED const struct intel_device_info *devinfo, enum lsc_opcode opcode, unsigned simd_size, enum lsc_addr_surface_type addr_type, enum lsc_addr_size addr_sz, unsigned num_coordinates, enum lsc_data_size data_sz, unsigned num_channels, bool transpose, unsigned cache_ctrl, bool has_dest) lsc_msg_desc() argument [all...] |
| /third_party/mesa3d/src/gallium/auxiliary/tgsi/ |
| H A D | tgsi_ureg.c | 1245 static void validate( enum tgsi_opcode opcode, in validate() argument 1260 ureg_emit_insn(struct ureg_program *ureg, enum tgsi_opcode opcode, boolean saturate, unsigned precise, unsigned num_dst, unsigned num_src) ureg_emit_insn() argument 1401 ureg_insn(struct ureg_program *ureg, enum tgsi_opcode opcode, const struct ureg_dst *dst, unsigned nr_dst, const struct ureg_src *src, unsigned nr_src, unsigned precise ) ureg_insn() argument 1436 ureg_tex_insn(struct ureg_program *ureg, enum tgsi_opcode opcode, const struct ureg_dst *dst, unsigned nr_dst, enum tgsi_texture_type target, enum tgsi_return_type return_type, const struct tgsi_texture_offset *texoffsets, unsigned nr_offset, const struct ureg_src *src, unsigned nr_src ) ureg_tex_insn() argument 1481 ureg_memory_insn(struct ureg_program *ureg, enum tgsi_opcode opcode, const struct ureg_dst *dst, unsigned nr_dst, const struct ureg_src *src, unsigned nr_src, unsigned qualifier, enum tgsi_texture_type texture, enum pipe_format format) ureg_memory_insn() argument [all...] |
| /third_party/mesa3d/src/gallium/drivers/r600/sfn/ |
| H A D | sfn_instr_alu.cpp | 43 AluInstr::AluInstr(EAluOp opcode, PRegister dest, in AluInstr() argument 70 AluInstr::AluInstr(EAluOp opcode): in AluInstr() argument 75 AluInstr::AluInstr(EAluOp opcode, int chan): in AluInstr() argument 81 AluInstr::AluInstr(EAluOp opcode, PRegister dest, PVirtualValue src0, in AluInstr() argument 88 AluInstr(EAluOp opcode, PRegister dest, PVirtualValue src0, PVirtualValue src1, const std::set<AluModifiers>& m_flags) AluInstr() argument 96 AluInstr(EAluOp opcode, PRegister dest, PVirtualValue src0, PVirtualValue src1, PVirtualValue src2, const std::set<AluModifiers>& m_flags) AluInstr() argument 1425 emit_alu_op1_64bit(const nir_alu_instr& alu, EAluOp opcode, Shader& shader, bool switch_chan) emit_alu_op1_64bit() argument 1520 emit_alu_op2_64bit(const nir_alu_instr& alu, EAluOp opcode, Shader& shader, bool switch_src) emit_alu_op2_64bit() argument 1576 emit_alu_op2_64bit_one_dst(const nir_alu_instr& alu, EAluOp opcode, Shader& shader, bool switch_order) emit_alu_op2_64bit_one_dst() argument 1612 emit_alu_op1_64bit_trans(const nir_alu_instr& alu, EAluOp opcode, Shader& shader) emit_alu_op1_64bit_trans() argument 1637 emit_alu_fma_64bit(const nir_alu_instr& alu, EAluOp opcode, Shader& shader) emit_alu_fma_64bit() argument 1826 emit_alu_op1(const nir_alu_instr& alu, EAluOp opcode, Shader& shader, const AluOpFlags& flags) emit_alu_op1() argument 1855 emit_alu_op2(const nir_alu_instr& alu, EAluOp opcode, Shader& shader, AluInstr::Op2Options opts) emit_alu_op2() argument 1893 emit_alu_op2_int(const nir_alu_instr& alu, EAluOp opcode, Shader& shader, AluInstr::Op2Options opts) emit_alu_op2_int() argument 1904 emit_alu_op3(const nir_alu_instr& alu, EAluOp opcode, Shader& shader, const std::array<int, 3>& src_shuffle) emit_alu_op3() argument 1937 emit_any_all_fcomp2(const nir_alu_instr& alu, EAluOp opcode, Shader& shader) emit_any_all_fcomp2() argument 2181 emit_alu_i2orf2_b1(const nir_alu_instr& alu, EAluOp opcode, Shader& shader) emit_alu_i2orf2_b1() argument 2202 emit_alu_comb_with_zero(const nir_alu_instr& alu, EAluOp opcode, Shader& shader) emit_alu_comb_with_zero() argument 2335 emit_alu_trans_op1_eg(const nir_alu_instr& alu, EAluOp opcode, Shader& shader) emit_alu_trans_op1_eg() argument 2360 emit_alu_f2i32_or_u32_eg(const nir_alu_instr& alu, EAluOp opcode, Shader& shader) emit_alu_f2i32_or_u32_eg() argument 2392 emit_alu_trans_op1_cayman(const nir_alu_instr& alu, EAluOp opcode, Shader& shader) emit_alu_trans_op1_cayman() argument 2424 emit_alu_trans_op2_eg(const nir_alu_instr& alu, EAluOp opcode, Shader& shader) emit_alu_trans_op2_eg() argument 2451 emit_alu_trans_op2_cayman(const nir_alu_instr& alu, EAluOp opcode, Shader& shader) emit_alu_trans_op2_cayman() argument 2486 emit_tex_fdd(const nir_alu_instr& alu, TexInstr::Opcode opcode, bool fine, Shader& shader) emit_tex_fdd() argument [all...] |
| /third_party/mesa3d/src/gallium/drivers/r300/compiler/ |
| H A D | radeon_pair_schedule.c | 598 const struct rc_opcode_info * opcode; in destructive_merge_instructions() local 783 static int can_remap(unsigned int opcode) in can_remap() argument 794 static int can_convert_opcode_to_alpha(unsigned int opcode) in can_convert_opcode_to_alpha() argument 1312 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); is_controlflow() local [all...] |
| /third_party/mesa3d/src/gallium/drivers/r600/ |
| H A D | r600_asm.c | 1707 unsigned opcode = r600_isa_alu_opcode(bc->isa->hw_class, alu->op); in r600_bytecode_alu_build() local 1765 unsigned opcode = r600_isa_cf_opcode(bc->isa->hw_class, cf->op); in r600_bytecode_cf_build() local
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| /third_party/skia/third_party/externals/angle2/src/libANGLE/ |
| H A D | validationES1.cpp | 1128 bool ValidateLogicOp(const Context *context, angle::EntryPoint entryPoint, LogicalOperation opcode) in ValidateLogicOp() argument
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| /third_party/skia/third_party/externals/angle2/src/libGLESv1_CM/ |
| H A D | libGLESv1_CM.cpp | 569 void GL_APIENTRY glLogicOp(GLenum opcode) in glLogicOp() argument
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| /third_party/skia/third_party/externals/swiftshader/src/Pipeline/ |
| H A D | SpirvShader.cpp | 71 spv::Op opcode = insn.opcode(); in robustBufferAccess() local 1716 auto opcode = insn.opcode(); EmitInstruction() local [all...] |
| /third_party/skia/third_party/externals/spirv-tools/include/spirv-tools/ |
| H A D | libspirv.h | 392 uint16_t opcode; member
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| /third_party/skia/third_party/externals/spirv-tools/source/fuzz/ |
| H A D | fuzzer_util.cpp | 287 CanInsertOpcodeBeforeInstruction( SpvOp opcode, const opt::BasicBlock::iterator& instruction_in_block) CanInsertOpcodeBeforeInstruction() argument 1553 GetLastInsertBeforeInstruction(opt::IRContext* ir_context, uint32_t block_id, SpvOp opcode) GetLastInsertBeforeInstruction() argument 2024 IsAgnosticToSignednessOfOperand(SpvOp opcode, uint32_t use_in_operand_index) IsAgnosticToSignednessOfOperand() argument 2096 TypesAreCompatible(opt::IRContext* ir_context, SpvOp opcode, uint32_t use_in_operand_index, uint32_t type_id_1, uint32_t type_id_2) TypesAreCompatible() argument [all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/include/spirv-tools/ |
| H A D | libspirv.h | 392 uint16_t opcode; member
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| /third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/source/fuzz/ |
| H A D | fuzzer_util.cpp | 287 CanInsertOpcodeBeforeInstruction( SpvOp opcode, const opt::BasicBlock::iterator& instruction_in_block) CanInsertOpcodeBeforeInstruction() argument 1553 GetLastInsertBeforeInstruction(opt::IRContext* ir_context, uint32_t block_id, SpvOp opcode) GetLastInsertBeforeInstruction() argument 2024 IsAgnosticToSignednessOfOperand(SpvOp opcode, uint32_t use_in_operand_index) IsAgnosticToSignednessOfOperand() argument 2096 TypesAreCompatible(opt::IRContext* ir_context, SpvOp opcode, uint32_t use_in_operand_index, uint32_t type_id_1, uint32_t type_id_2) TypesAreCompatible() argument [all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 2834 X86ISD::NodeType opcode = X86ISD::RET_FLAG; in LowerReturn() local [all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Scalar/ |
| H A D | GVN.cpp | 115 uint32_t opcode; member [all...] |
| /third_party/skia/third_party/externals/tint/src/reader/spirv/ |
| H A D | parser_impl.cc | 96 bool AssumesSignedOperands(SpvOp opcode) { in AssumesSignedOperands() argument 132 bool AssumesUnsignedOperands(SpvOp opcode) { in AssumesUnsignedOperands() argument 168 bool AssumesSecondOperandSignednessMatchesFirstOperand(SpvOp opcode) { in AssumesSecondOperandSignednessMatchesFirstOperand() argument 189 AssumesResultSignednessMatchesFirstOperand(SpvOp opcode) AssumesResultSignednessMatchesFirstOperand() argument 2088 const auto opcode = inst.opcode(); RectifyOperandSignedness() local 2142 const auto opcode = inst.opcode(); ForcedResultType() local [all...] |
| /third_party/spirv-tools/include/spirv-tools/ |
| H A D | libspirv.h | 409 uint16_t opcode; member
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| /third_party/toybox/toys/pending/ |
| H A D | dhcp.c | 860 static uint8_t *dhcpc_addstropt(uint8_t *optptr, uint8_t opcode, char* str, int len) in dhcpc_addstropt() argument
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| /third_party/python/Objects/ |
| H A D | codeobject.c | 1453 int opcode = _PyOpcode_Deopt[_Py_OPCODE(instruction)]; in deopt_code() local
|