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Searched refs:v2b (Results 1 - 8 of 8) sorted by relevance

/third_party/mesa3d/src/amd/compiler/tests/
H A Dtest_to_hw_instr.cpp56 Definition(v0_lo, v2b), Definition(v1_lo, v2b),
57 Operand(v1_lo, v2b), Operand(v0_lo, v2b));
60 //~gfx[67]! v2b: %0:v[0][16:32] = v_lshlrev_b32 16, %0:v[0][0:16]
66 Operand(v1_lo, v2b), Operand(v0_lo, v2b));
69 //~gfx[67]! v2b: %0:v[0][16:32] = v_lshlrev_b32 16, %0:v[0][0:16]
72 //~gfx[67]! v2b: %0:v[1][0:16] = v_mov_b32 %0:v[2][0:16]
75 Definition(v0_lo, v6b), Operand(v1_lo, v2b),
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H A Dtest_regalloc.cpp47 //! v2b: %_:v[#a][0:16], v2b: %res1:v[#a][16:32] = p_split_vector %_:v[#a]
48 Builder::Result tmp = bld.pseudo(aco_opcode::p_split_vector, bld.def(v2b), bld.def(v2b), inputs[0]);
69 //! v2b: %_:v[0][0:16], v2b: %_:v[0][16:32] = p_split_vector %_:v[0]
70 Temp hi = bld.pseudo(aco_opcode::p_split_vector, bld.def(v2b), bld.def(v2b), inputs[0]).def(1).getTemp();
73 //! v2b: %_:v[0][0:16] = v_not_b32 0 dst_sel:uword0 dst_preserve src0_sel:dword
74 Temp lo = bld.vop1(aco_opcode::v_not_b32, bld.def(v2b), Operan
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H A Dtest_optimizer.cpp127 //! v2b: %res5 = v_add_f16 %a, %b *0.5
129 tmp = bld.vop2(aco_opcode::v_add_f16, bld.def(v2b), inputs[0], inputs[1]);
130 writeout(5, bld.vop2(aco_opcode::v_mul_f16, bld.def(v2b), Operand::c16(0x3800u), tmp));
132 //! v2b: %res6 = v_add_f16 %a, %b *2
134 tmp = bld.vop2(aco_opcode::v_add_f16, bld.def(v2b), inputs[0], inputs[1]);
135 writeout(6, bld.vop2(aco_opcode::v_mul_f16, bld.def(v2b), Operand::c16(0x4000u), tmp));
137 //! v2b: %res7 = v_add_f16 %a, %b *4
139 tmp = bld.vop2(aco_opcode::v_add_f16, bld.def(v2b), inputs[0], inputs[1]);
140 writeout(7, bld.vop2(aco_opcode::v_mul_f16, bld.def(v2b), Operand::c16(0x4400u), tmp));
142 //! v2b
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H A Dhelpers.cpp274 return b.vop2(aco_opcode::v_mul_f16, b.def(v2b), Operand::c16(0xbc00u), src); in fneg()
282 Builder::Result res = b.vop2_e64(aco_opcode::v_mul_f16, b.def(v2b), Operand::c16(0x3c00), src); in fabs()
299 return b.vop1(aco_opcode::v_cvt_f16_f32, b.def(v2b), src); in f2f16()
304 return b.pseudo(aco_opcode::p_extract_vector, b.def(v2b), src, Operand::zero()); in u2u16()
310 return b.vop2(aco_opcode::v_add_f16, b.def(v2b), src0, src1); in fadd()
318 return b.vop2(aco_opcode::v_mul_f16, b.def(v2b), src0, src1); in fmul()
326 return b.vop3(aco_opcode::v_fma_f16, b.def(v2b), src0, src1, src2); in fma()
334 return b.vop3(aco_opcode::v_med3_f16, b.def(v2b), Operand::c16(0u), in fsat()
/third_party/mesa3d/src/amd/compiler/
H A Daco_lower_to_hw_instr.cpp534 } else if (src.regClass() == v2b) { in emit_reduction()
1086 assert(dst.regClass() == v1b || dst.regClass() == v2b); in copy_constant()
1105 } else if (dst.regClass() == v2b && use_sdwa && !op.isLiteral()) { in copy_constant()
1114 } else if (dst.regClass() == v2b && ctx->program->gfx_level >= GFX10 && in copy_constant()
1117 Operand def_lo(dst.physReg().advance(-2), v2b); in copy_constant()
1122 Operand def_hi(dst.physReg().advance(2), v2b); in copy_constant()
1257 bld.vop2(aco_opcode::v_cvt_pk_u16_u32, dst, Operand(lo_reg, v2b), op); in do_copy()
1278 } else if (def.regClass() == v2b && ctx->program->gfx_level >= GFX11) { in do_copy()
1320 swap_subdword_gfx11(bld, Definition(def_other_half, v2b), Operand(op_half, v2b)); in swap_subdword_gfx11()
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H A Daco_instruction_selection.cpp786 /* returns v2b or v1 for vop3p usage.
807 if (it->second[index].regClass() == v2b)
816 return emit_extract_vector(ctx, tmp, dword * 2, v2b);
1492 if (dst.regClass() == v1 || dst.regClass() == v2b || dst.regClass() == v1b) {
1526 } else if (dst.regClass() == v2b && ctx->program->gfx_level >= GFX10) {
1529 bld.vop3(aco_opcode::v_sub_u16_e64, Definition(bld.tmp(v2b)), Operand::zero(2), src));
1530 } else if (dst.regClass() == v2b) {
1533 bld.vop2(aco_opcode::v_sub_u16, Definition(bld.tmp(v2b)), Operand::zero(2), src));
1560 } else if (dst.regClass() == v2b && ctx->program->gfx_level >= GFX9) {
1562 } else if (dst.regClass() == v2b) {
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H A Daco_ir.h328 v2b = v2 | (1 << 7), member
395 static constexpr RegClass v2b{RegClass::v2b};
H A Daco_validate.cpp244 (instr->opcode == aco_opcode::v_fma_mix_f32 ? v1 : v2b), in validate_ir()
245 "v_fma_mix_f32/v_fma_mix_f16 must have v1/v2b definition", instr.get()); in validate_ir()

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