Home
last modified time | relevance | path

Searched refs:subnr (Results 1 - 13 of 13) sorted by relevance

/third_party/mesa3d/src/intel/compiler/
H A Dbrw_reg.h225 unsigned subnr:5; /* :1 in align16 */ member
384 * \param subnr register sub number
397 unsigned subnr, in brw_reg()
423 reg.subnr = subnr * type_sz(type); in brw_reg()
427 * set swizzle and writemask to W, as the lower bits of subnr will in brw_reg()
444 brw_vec16_reg(enum brw_reg_file file, unsigned nr, unsigned subnr)
448 subnr,
461 brw_vec8_reg(enum brw_reg_file file, unsigned nr, unsigned subnr)
465 subnr,
395 brw_reg(enum brw_reg_file file, unsigned nr, unsigned subnr, unsigned negate, unsigned abs, enum brw_reg_type type, unsigned vstride, unsigned width, unsigned hstride, unsigned swizzle, unsigned writemask) brw_reg() argument
[all...]
H A Dbrw_eu_emit.c118 assert(dest.subnr == 0); in brw_set_dest()
132 assert(dest.subnr % 16 == 0); in brw_set_dest()
137 brw_inst_set_dst_da16_subreg_nr(devinfo, inst, dest.subnr / 16); in brw_set_dest()
147 brw_inst_set_dst_da1_subreg_nr(devinfo, inst, dest.subnr); in brw_set_dest()
152 brw_inst_set_dst_da16_subreg_nr(devinfo, inst, dest.subnr / 16); in brw_set_dest()
165 brw_inst_set_dst_ia_subreg_nr(devinfo, inst, dest.subnr); in brw_set_dest()
239 assert(reg.subnr == 0); in brw_set_src0()
251 assert(reg.subnr % 16 == 0); in brw_set_src0()
257 brw_inst_set_src0_da16_subreg_nr(devinfo, inst, reg.subnr / 16); in brw_set_src0()
284 brw_inst_set_src0_da1_subreg_nr(devinfo, inst, reg.subnr); in brw_set_src0()
[all...]
H A Dbrw_ir_vec4.h86 const unsigned suboffset = reg->subnr + bytes; in add_byte_offset()
88 reg->subnr = suboffset % REG_SIZE; in add_byte_offset()
89 assert(reg->subnr % 16 == 0); in add_byte_offset()
236 (r.file == ARF || r.file == FIXED_GRF ? r.subnr : 0); in reg_offset()
H A Dbrw_vec4.cpp1356 fprintf(file, "a0.%d", inst->dst.subnr); in dump_instruction()
1359 fprintf(file, "acc%d", inst->dst.subnr); in dump_instruction()
1362 fprintf(file, "f%d.%d", inst->dst.nr & 0xf, inst->dst.subnr); in dump_instruction()
1365 fprintf(file, "arf%d.%d", inst->dst.nr & 0xf, inst->dst.subnr); in dump_instruction()
1410 fprintf(file, "g%d.%d", inst->src[i].nr, inst->src[i].subnr); in dump_instruction()
1450 fprintf(file, "a0.%d", inst->src[i].subnr); in dump_instruction()
1453 fprintf(file, "acc%d", inst->src[i].subnr); in dump_instruction()
1456 fprintf(file, "f%d.%d", inst->src[i].nr & 0xf, inst->src[i].subnr); in dump_instruction()
1459 fprintf(file, "arf%d.%d", inst->src[i].nr & 0xf, inst->src[i].subnr); in dump_instruction()
1794 /* 3-src instructions with scalar sources support arbitrary subnr, in convert_to_hw_regs()
[all...]
H A Dbrw_ir_fs.h91 const unsigned suboffset = reg.subnr + delta; in byte_offset()
93 reg.subnr = suboffset % REG_SIZE; in byte_offset()
185 (r.file == ARF || r.file == FIXED_GRF ? r.subnr : 0); in reg_offset()
H A Dbrw_vec4_generator.cpp1408 unsigned imm_byte_offset = reg.nr * REG_SIZE + reg.subnr * (REG_SIZE / 2); in generate_mov_indirect()
1417 reg.subnr = (imm_byte_offset / (REG_SIZE / 2)) % 2; in generate_mov_indirect()
1432 * the subnr (probably 0) to an align1 subnr and add in the swizzle. in generate_mov_indirect()
1435 indirect.subnr = (indirect.subnr * 4 + BRW_GET_SWZ(indirect.swizzle, 0)); in generate_mov_indirect()
1441 indirect.subnr *= 2; in generate_mov_indirect()
1474 bit_mask_in.subnr += BRW_GET_SWZ(bit_mask_in.swizzle, 0) * 4; in generate_zero_oob_push_regs()
2087 dst.subnr = offset * 4; in generate_code()
2093 src[0].subnr in generate_code()
[all...]
H A Dbrw_ir.h72 using brw_reg::subnr;
H A Dbrw_fs_generator.cpp466 unsigned imm_byte_offset = reg.nr * REG_SIZE + reg.subnr; in generate_mov_indirect()
472 reg.subnr = imm_byte_offset % REG_SIZE; in generate_mov_indirect()
661 uint32_t src_start_offset = src.nr * REG_SIZE + src.subnr; in generate_shuffle()
2183 src[0].subnr = 0 * type_sz(src[0].type); in generate_code()
2195 src[0].subnr = 4 * type_sz(src[0].type); in generate_code()
H A Dtest_eu_validate.cpp1556 unsigned subnr; in TEST_P() member
1560 #define INST(dst_type, src0_type, src1_type, dst_stride, read_acc, subnr, \ in TEST_P()
1568 subnr, \ in TEST_P()
1607 brw_inst_set_src0_da1_subreg_nr(&devinfo, last_inst, inst[i].subnr); in TEST_P()
2066 unsigned subnr; in TEST_P() member
2090 brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, move[i].subnr); in TEST_P()
H A Dbrw_compile_ff_gs.c469 vertex_slot.subnr = (slot % 2) * 16; in gfx6_sol_program()
H A Dbrw_fs_copy_propagation.cpp676 inst->src[arg].subnr = entry->src.subnr; in try_copy_propagate()
H A Dbrw_fs.cpp1007 const unsigned start = (r.nr - BRW_ARF_FLAG) * 4 + r.subnr;
4441 sample_mask.subnr == brw_flag_subreg(
4442 subreg + inst->group / 16).subnr);
5713 fprintf(file, "a0.%d", inst->dst.subnr);
5716 fprintf(file, "acc%d", inst->dst.subnr);
5719 fprintf(file, "f%d.%d", inst->dst.nr & 0xf, inst->dst.subnr);
5722 fprintf(file, "arf%d.%d", inst->dst.nr & 0xf, inst->dst.subnr);
5814 fprintf(file, "a0.%d", inst->src[i].subnr);
5817 fprintf(file, "acc%d", inst->src[i].subnr);
5820 fprintf(file, "f%d.%d", inst->src[i].nr & 0xf, inst->src[i].subnr);
[all...]
/third_party/mesa3d/src/intel/tools/
H A Di965_gram.y98 reg->subnr,
1015 brw_inst_set_send_ex_desc_ia_subreg_nr(p->devinfo, brw_last_inst, $5.subnr);
1524 $$.subnr = $$.subnr * brw_reg_type_to_size($4);
1535 $$.subnr = $$.subnr * brw_reg_type_to_size($4);
1691 $1.subnr,
1728 $3.subnr,
1757 $3.subnr,
1775 $$.subnr
[all...]

Completed in 31 milliseconds