/third_party/mesa3d/src/compiler/glsl/ |
H A D | glsl_to_nir.cpp | 92 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def **srcs); 1411 nir_ssa_def *srcs[4]; in visit() local 1415 srcs[i] = nir_channel(&b, src_addr, i); in visit() 1417 srcs[i] = nir_ssa_undef(&b, 1, 32); in visit() 1420 instr->src[1] = nir_src_for_ssa(nir_vec(&b, srcs, 4)); in visit() 1960 nir_ssa_def *srcs[4]; in visit() local 1962 srcs[i] = evaluate_rvalue(ir->operands[i]); in visit() 1971 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break; in visit() 1973 result = nir_inot(&b, srcs[0]); in visit() 1976 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[ in visit() [all...] |
/third_party/mesa3d/src/asahi/compiler/ |
H A D | agx_opcodes.py | 29 def __init__(self, name, dests, srcs, imms, is_float, can_eliminate, encoding_16, encoding_32): 32 self.srcs = srcs 60 def op(name, encoding_32, dests = 1, srcs = 0, imms = [], is_float = False, can_eliminate = True, encoding_16 = None): 64 opcodes[name] = Opcode(name, dests, srcs, imms, is_float, can_eliminate, encoding_16, encoding_32) 129 srcs = 1, is_float = True) 149 srcs = 2, is_float = True) 154 srcs = 3, is_float = True) 159 srcs = 2, is_float = True) 168 srcs 184 srcs = 2) global() variable [all...] |
/third_party/skia/bench/ |
H A D | EncodeBench.cpp | 88 static const char* srcs[2] = {"images/mandrill_512.png", "images/color_wheel.jpg"}; variable 91 DEF_BENCH(return new EncodeBench(srcs[0], &encode_jpeg, "JPEG")); 92 DEF_BENCH(return new EncodeBench(srcs[1], &encode_jpeg, "JPEG")); 95 DEF_BENCH(return new EncodeBench(srcs[0], encode_webp_lossy, "WEBP")); 96 DEF_BENCH(return new EncodeBench(srcs[1], encode_webp_lossy, "WEBP")); 98 DEF_BENCH(return new EncodeBench(srcs[0], encode_webp_lossless, "WEBP_LL")); 99 DEF_BENCH(return new EncodeBench(srcs[1], encode_webp_lossless, "WEBP_LL")); 101 DEF_BENCH(return new EncodeBench(srcs[0], PNG(kAll, 6), "PNG")); 102 DEF_BENCH(return new EncodeBench(srcs[0], PNG(kAll, 3), "PNG_3")); 103 DEF_BENCH(return new EncodeBench(srcs[ [all...] |
/third_party/mesa3d/src/compiler/spirv/ |
H A D | vtn_opencl.c | 36 unsigned num_srcs, nir_ssa_def **srcs, 182 nir_ssa_def **srcs, in call_mangled_function() 202 call->params[param_idx++] = nir_src_for_ssa(srcs[i]); in call_mangled_function() 215 nir_ssa_def *srcs[5] = { NULL }; in handle_instr() local 217 vtn_assert(num_srcs <= ARRAY_SIZE(srcs)); in handle_instr() 221 srcs[i] = ssa->def; in handle_instr() 225 nir_ssa_def *result = handler(b, opcode, num_srcs, srcs, src_types, dest_type); in handle_instr() 285 unsigned num_srcs, nir_ssa_def **srcs, struct vtn_type **src_types, in handle_alu() 289 srcs[0], srcs[ in handle_alu() 176 call_mangled_function(struct vtn_builder *b, const char *name, uint32_t const_mask, uint32_t num_srcs, struct vtn_type **src_types, const struct vtn_type *dest_type, nir_ssa_def **srcs, nir_deref_instr **ret_deref_ptr) call_mangled_function() argument 284 handle_alu(struct vtn_builder *b, uint32_t opcode, unsigned num_srcs, nir_ssa_def **srcs, struct vtn_type **src_types, const struct vtn_type *dest_type) handle_alu() argument 431 handle_clc_fn(struct vtn_builder *b, enum OpenCLstd_Entrypoints opcode, int num_srcs, nir_ssa_def **srcs, struct vtn_type **src_types, const struct vtn_type *dest_type) handle_clc_fn() argument 479 handle_special(struct vtn_builder *b, uint32_t opcode, unsigned num_srcs, nir_ssa_def **srcs, struct vtn_type **src_types, const struct vtn_type *dest_type) handle_special() argument 577 handle_core(struct vtn_builder *b, uint32_t opcode, unsigned num_srcs, nir_ssa_def **srcs, struct vtn_type **src_types, const struct vtn_type *dest_type) handle_core() argument 840 handle_round(struct vtn_builder *b, uint32_t opcode, unsigned num_srcs, nir_ssa_def **srcs, struct vtn_type **src_types, const struct vtn_type *dest_type) handle_round() argument 855 handle_shuffle(struct vtn_builder *b, uint32_t opcode, unsigned num_srcs, nir_ssa_def **srcs, struct vtn_type **src_types, const struct vtn_type *dest_type) handle_shuffle() argument 875 handle_shuffle2(struct vtn_builder *b, uint32_t opcode, unsigned num_srcs, nir_ssa_def **srcs, struct vtn_type **src_types, const struct vtn_type *dest_type) handle_shuffle2() argument [all...] |
/third_party/mesa3d/src/freedreno/ir3/ |
H A D | ir3_lower_spill.c | 58 ir3_dst_create(mov, mem->srcs[0]->num, mem->srcs[0]->flags); in set_base_reg() 72 struct ir3_register *base = mem->srcs[0]; in reset_base_reg() 93 unsigned components = spill->srcs[2]->uim_val; in handle_oob_offset_spill() 95 if (spill->cat6.dst_offset + components * component_bytes(spill->srcs[1]) < MAX_CAT6_SIZE) in handle_oob_offset_spill() 106 unsigned components = reload->srcs[2]->uim_val; in handle_oob_offset_reload() 107 unsigned offset = reload->srcs[1]->uim_val; in handle_oob_offset_reload() 113 reload->srcs[1]->uim_val = 0; in handle_oob_offset_reload() 119 unsigned orig_components = spill->srcs[2]->uim_val; in split_spill() 125 if (spill->srcs[ in split_spill() [all...] |
H A D | ir3_cp.c | 66 struct ir3_register *src = instr->srcs[0]; in is_eligible_mov() 102 struct ir3_instruction *cond = ssa(cmp->srcs[0]); in is_foldable_double_cmp() 104 (cmp->srcs[1]->flags & IR3_REG_IMMED) && in is_foldable_double_cmp() 105 (cmp->srcs[1]->iim_val == 0) && in is_foldable_double_cmp() 116 unsigned srcflags = src->srcs[0]->flags; in combine_flags() 150 struct ir3_instruction *srcsrc = ssa(src->srcs[0]); in combine_flags() 243 instr->srcs[n] = reg; in lower_immed() 306 swap(instr->srcs[0], instr->srcs[1]); in try_swap_mad_two_srcs() 312 ir3_valid_flags(instr, 1, instr->srcs[ in try_swap_mad_two_srcs() [all...] |
H A D | ir3_validate.c | 117 validate_src(ctx, phi, phi->srcs[pred_idx]); in validate_phi_src() 178 * bindless, irrespective of the precision of other srcs. The in validate_instr() 245 reg_class_flags(instr->srcs[0])); in validate_instr() 247 reg_class_flags(instr->srcs[0])); in validate_instr() 283 if (instr->srcs[0]->flags & IR3_REG_HALF) { in validate_instr() 305 validate_reg_size(ctx, instr->srcs[0], instr->cat6.type); in validate_instr() 310 validate_assert(ctx, !(instr->srcs[0]->flags & IR3_REG_HALF)); in validate_instr() 313 validate_assert(ctx, !(instr->srcs[0]->flags & IR3_REG_HALF)); in validate_instr() 314 validate_assert(ctx, !(instr->srcs[1]->flags & IR3_REG_HALF)); in validate_instr() 315 validate_reg_size(ctx, instr->srcs[ in validate_instr() [all...] |
H A D | ir3_merge_regs.c | 121 value.reg = instr->srcs[0]->def; in chase_copies() 128 instr->srcs[value.offset / reg_elem_size(value.reg)]; in chase_copies() 360 if (phi->srcs[i]->def) in coalesce_phi() 361 try_merge_defs(live, phi->dsts[0], phi->srcs[i]->def, 0); in coalesce_phi() 370 if (!(pcopy->srcs[i]->flags & IR3_REG_SSA)) in aggressive_coalesce_parallel_copy() 372 try_merge_defs(live, pcopy->dsts[i], pcopy->srcs[i]->def, 0); in aggressive_coalesce_parallel_copy() 380 try_merge_defs(live, split->srcs[0]->def, split->dsts[0], in aggressive_coalesce_split() 389 offset += reg_elem_size(collect->srcs[i]), i++) { in aggressive_coalesce_collect() 390 if (!(collect->srcs[i]->flags & IR3_REG_SSA)) in aggressive_coalesce_collect() 392 try_merge_defs(live, collect->dsts[0], collect->srcs[ in aggressive_coalesce_collect() [all...] |
H A D | ir3_ra_validate.c | 237 struct ir3_register *src = split->srcs[0]; in propagate_split() 256 struct reg_state srcs[size]; in propagate_collect() local 259 struct ir3_register *src = collect->srcs[i]; in propagate_collect() 263 srcs[dst_offset + j] = (struct reg_state){ in propagate_collect() 269 srcs[dst_offset + j] = file->regs[src_physreg + j]; in propagate_collect() 275 file->regs[dst_physreg + i] = srcs[i]; in propagate_collect() 283 size += reg_size(pcopy->srcs[i]); in propagate_parallelcopy() 286 struct reg_state srcs[size]; in propagate_parallelcopy() local 291 struct ir3_register *src = pcopy->srcs[i]; in propagate_parallelcopy() 296 srcs[offse in propagate_parallelcopy() [all...] |
/third_party/alsa-utils/alsactl/ |
H A D | monitor.c | 53 static void clear_source_list(struct list_head *srcs) in clear_source_list() argument 57 list_for_each_entry_safe(entry, tmp, srcs, list) in clear_source_list() 61 static int insert_source_entry(struct list_head *srcs, snd_ctl_t *handle, in insert_source_entry() argument 91 list_add_tail(&entry->list, srcs); in insert_source_entry() 119 static inline bool seek_entry_by_name(struct list_head *srcs, const char *name) in seek_entry_by_name() argument 123 list_for_each_entry(entry, srcs, list) { in seek_entry_by_name() 131 static int prepare_source_entry(struct list_head *srcs, const char *name) in prepare_source_entry() argument 142 if (seek_entry_by_name(srcs, cardname)) in prepare_source_entry() 147 err = insert_source_entry(srcs, handle, cardname); in prepare_source_entry() 152 if (seek_entry_by_name(srcs, nam in prepare_source_entry() 274 prepare_dispatcher(int epfd, int sigfd, int infd, struct list_head *srcs) prepare_dispatcher() argument 302 run_dispatcher(int epfd, int sigfd, int infd, struct list_head *srcs, bool *retry) run_dispatcher() argument 359 clear_dispatcher(int epfd, int sigfd, int infd, struct list_head *srcs) clear_dispatcher() argument [all...] |
/third_party/ffmpeg/libavfilter/ |
H A D | vf_mcdeint.c | 192 int srcs = inpic ->linesize[i]; in filter_frame() local 199 uint8_t *srcp = &inpic ->data[i][x + y*srcs]; in filter_frame() 204 int diff0 = filp[-fils] - srcp[-srcs]; in filter_frame() 205 int diff1 = filp[+fils] - srcp[+srcs]; in filter_frame() 211 FFABS(srcp[-srcs+DELTA(-1+(j))] - srcp[+srcs+DELTA(-1-(j))])+\ in filter_frame() 212 FFABS(srcp[-srcs+DELTA(j) ] - srcp[+srcs+DELTA( -(j))])+\ in filter_frame() 213 FFABS(srcp[-srcs+DELTA(1+(j)) ] - srcp[+srcs in filter_frame() [all...] |
/third_party/mesa3d/src/intel/compiler/ |
H A D | brw_fs_nir.cpp | 2349 fs_reg srcs[URB_LOGICAL_NUM_SRCS]; 2350 srcs[URB_LOGICAL_SRC_HANDLE] = fs_reg(retype(brw_vec8_grf(1, 0), BRW_REGISTER_TYPE_UD)); 2351 srcs[URB_LOGICAL_SRC_PER_SLOT_OFFSETS] = per_slot_offset; 2352 srcs[URB_LOGICAL_SRC_CHANNEL_MASK] = channel_mask; 2353 srcs[URB_LOGICAL_SRC_DATA] = fs_reg(VGRF, alloc.allocate(length), 2355 abld.LOAD_PAYLOAD(srcs[URB_LOGICAL_SRC_DATA], sources, length, 0); 2358 srcs, ARRAY_SIZE(srcs)); 2617 fs_reg srcs[URB_LOGICAL_NUM_SRCS]; 2618 srcs[URB_LOGICAL_SRC_HANDL [all...] |
H A D | brw_mesh.cpp | 907 fs_reg srcs[URB_LOGICAL_NUM_SRCS]; in emit_urb_direct_writes() local 908 srcs[URB_LOGICAL_SRC_HANDLE] = urb_handle; in emit_urb_direct_writes() 909 srcs[URB_LOGICAL_SRC_CHANNEL_MASK] = brw_imm_ud(first_mask << 16); in emit_urb_direct_writes() 910 srcs[URB_LOGICAL_SRC_DATA] = fs_reg(VGRF, bld.shader->alloc.allocate(length), in emit_urb_direct_writes() 912 bld8.LOAD_PAYLOAD(srcs[URB_LOGICAL_SRC_DATA], payload_srcs, length, 0); in emit_urb_direct_writes() 915 reg_undef, srcs, ARRAY_SIZE(srcs)); in emit_urb_direct_writes() 935 fs_reg srcs[URB_LOGICAL_NUM_SRCS]; in emit_urb_direct_writes() local 936 srcs[URB_LOGICAL_SRC_HANDLE] = urb_handle; in emit_urb_direct_writes() 937 srcs[URB_LOGICAL_SRC_CHANNEL_MAS in emit_urb_direct_writes() 1000 fs_reg srcs[URB_LOGICAL_NUM_SRCS]; emit_urb_indirect_writes() local 1043 fs_reg srcs[URB_LOGICAL_NUM_SRCS]; emit_urb_direct_reads() local 1102 fs_reg srcs[URB_LOGICAL_NUM_SRCS]; emit_urb_indirect_reads() local [all...] |
H A D | brw_fs_visitor.cpp | 44 fs_reg srcs[TEX_LOGICAL_NUM_SRCS]; in emit_mcs_fetch() local 45 srcs[TEX_LOGICAL_SRC_COORDINATE] = coordinate; in emit_mcs_fetch() 46 srcs[TEX_LOGICAL_SRC_SURFACE] = texture; in emit_mcs_fetch() 47 srcs[TEX_LOGICAL_SRC_SAMPLER] = brw_imm_ud(0); in emit_mcs_fetch() 48 srcs[TEX_LOGICAL_SRC_SURFACE_HANDLE] = texture_handle; in emit_mcs_fetch() 49 srcs[TEX_LOGICAL_SRC_COORD_COMPONENTS] = brw_imm_d(components); in emit_mcs_fetch() 50 srcs[TEX_LOGICAL_SRC_GRAD_COMPONENTS] = brw_imm_d(0); in emit_mcs_fetch() 52 fs_inst *inst = bld.emit(SHADER_OPCODE_TXF_MCS_LOGICAL, dest, srcs, in emit_mcs_fetch() 53 ARRAY_SIZE(srcs)); in emit_mcs_fetch() 727 const fs_reg srcs[] in emit_fb_writes() local 937 fs_reg srcs[URB_LOGICAL_NUM_SRCS]; emit_urb_writes() local 986 fs_reg srcs[URB_LOGICAL_NUM_SRCS]; emit_urb_writes() local 1036 fs_reg srcs[URB_LOGICAL_NUM_SRCS]; emit_urb_writes() local [all...] |
/third_party/mesa3d/src/panfrost/bifrost/ |
H A D | disassemble.c | 162 static void dump_regs(FILE *fp, struct bifrost_regs srcs, bool first) in dump_regs() argument 164 struct bifrost_reg_ctrl ctrl = DecodeRegCtrl(fp, srcs, first); in dump_regs() 167 fprintf(fp, "slot 0: r%u ", get_reg0(srcs)); in dump_regs() 169 fprintf(fp, "slot 1: r%u ", get_reg1(srcs)); in dump_regs() 174 fprintf(fp, "slot 2: r%u (write FMA) ", srcs.reg2); in dump_regs() 176 fprintf(fp, "slot 2: r%u (write lo FMA) ", srcs.reg2); in dump_regs() 178 fprintf(fp, "slot 2: r%u (write hi FMA) ", srcs.reg2); in dump_regs() 180 fprintf(fp, "slot 2: r%u (read) ", srcs.reg2); in dump_regs() 183 fprintf(fp, "slot 3: r%u (write %s) ", srcs.reg3, slot3_fma); in dump_regs() 185 fprintf(fp, "slot 3: r%u (write lo %s) ", srcs in dump_regs() 304 dump_fau_src(FILE *fp, struct bifrost_regs srcs, unsigned branch_offset, struct bi_constants *consts, bool high32) dump_fau_src() argument 365 dump_src(FILE *fp, unsigned src, struct bifrost_regs srcs, unsigned branch_offset, struct bi_constants *consts, bool isFMA) dump_src() argument [all...] |
/third_party/mesa3d/src/gallium/drivers/r600/sfn/ |
H A D | sfn_instr_lds.cpp | 195 AluInstr::SrcValues srcs; variable 214 srcs.push_back(src); 217 assert(srcs.size() == dests.size() && !dests.empty()); 219 return new LDSReadInstr(dests, srcs); 223 const SrcValues& srcs): in LDSAtomicInstr() 227 m_srcs(srcs) in LDSAtomicInstr() 254 AluInstr::SrcValues srcs = {m_address}; in split() local 257 srcs.push_back(s); in split() 259 for(auto& s :srcs) { in split() 265 auto reg = srcs[ in split() 222 LDSAtomicInstr(ESDOp op, PRegister dest, PVirtualValue address, const SrcValues& srcs) LDSAtomicInstr() argument 425 AluInstr::SrcValues srcs; global() variable [all...] |
H A D | sfn_nir_lower_fs_out_to_vector.cpp | 91 nir_ssa_def **srcs, unsigned first_comp, unsigned num_comps) = 0; 104 nir_ssa_def **srcs, unsigned first_comp, unsigned num_comps) override; 107 nir_ssa_def *create_combined_vector(nir_builder *b, nir_ssa_def **srcs, 359 nir_ssa_def *srcs[4]; in vec_instr_stack_pop() local 361 srcs[i] = &instr_undef->def; in vec_instr_stack_pop() 363 srcs[var->data.location_frac] = intr->src[1].ssa; in vec_instr_stack_pop() 378 if (srcs[var2->data.location_frac] == &instr_undef->def) { in vec_instr_stack_pop() 381 srcs[var2->data.location_frac] = intr2->src[1].ssa; in vec_instr_stack_pop() 386 create_new_io(b, intr, new_var, srcs, new_var->data.location_frac, in vec_instr_stack_pop() 398 nir_ssa_def **srcs, unsigne in create_new_io() 397 create_new_io(nir_builder *b, nir_intrinsic_instr *intr, nir_variable *var, nir_ssa_def **srcs, unsigned first_comp, unsigned num_comps) create_new_io() argument 432 create_combined_vector(nir_builder *b, nir_ssa_def **srcs, int first_comp, int num_comp) create_combined_vector() argument [all...] |
/third_party/skia/tools/skqp/ |
H A D | gn_to_bp.py | 52 srcs: [ 54 $srcs 59 srcs: [ 64 srcs: [ 71 srcs: [ 77 srcs: [ 83 srcs: [ 89 srcs: [ 95 srcs: [ 143 srcs variable 162 srcs = {s for s in srcs if not s.endswith('.h')} global() variable [all...] |
/third_party/skia/experimental/graphite/src/ |
H A D | ContextUtils.cpp | 43 sk_sp<UniformData> make_gradient_uniform_data_common(void* srcs[kNumGradientUniforms]) { in make_gradient_uniform_data_common() argument 57 srcs, result->offsets(), result->data()); in make_gradient_uniform_data_common() local 66 void* srcs[kNumGradientUniforms] = { in make_linear_gradient_uniform_data() local 75 return make_gradient_uniform_data_common(srcs); in make_linear_gradient_uniform_data() 85 void* srcs[kNumGradientUniforms] = { in make_radial_gradient_uniform_data() local 94 return make_gradient_uniform_data_common(srcs); in make_radial_gradient_uniform_data() 103 void* srcs[kNumGradientUniforms] = { in make_sweep_gradient_uniform_data() local 112 return make_gradient_uniform_data_common(srcs); in make_sweep_gradient_uniform_data() 122 void* srcs[kNumGradientUniforms] = { in make_conical_gradient_uniform_data() local 131 return make_gradient_uniform_data_common(srcs); in make_conical_gradient_uniform_data() 162 void* srcs[kNumSolidUniforms] = { &color }; make_solid_uniform_data() local 165 srcs, result->offsets(), result->data()); make_solid_uniform_data() local [all...] |
/third_party/mesa3d/src/compiler/nir/tests/ |
H A D | builder_tests.cpp | 102 nir_ssa_def *srcs[] = { in TEST_F() local 107 store_test_val(nir_extract_bits(b, srcs, 2, 24, 1, 64)); in TEST_F() 118 nir_ssa_def *srcs[] = { in TEST_F() local 123 store_test_val(nir_extract_bits(b, srcs, 2, 16, 1, 64)); in TEST_F() 134 nir_ssa_def *srcs[] = { in TEST_F() local 142 store_test_val(nir_extract_bits(b, srcs, 4, 24, 2, 32)); in TEST_F()
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/third_party/node/test/fixtures/wpt/resources/ |
H A D | idlharness-shadowrealm.js | 16 * @param {String[]} srcs Spec name(s) for source idl files (fetched from 23 function idl_test_shadowrealm(srcs, deps) { 46 const specs = await Promise.all(srcs.concat(deps).map(spec => { 62 for (let i = 0; i < ${srcs.length}; i++) { 65 for (let i = ${srcs.length}; i < ${srcs.length + deps.length}; i++) {
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/third_party/skia/gn/ |
H A D | gn_to_bp.py | 95 srcs: [ 100 srcs: [ 107 srcs: [ 113 srcs: [ 119 srcs: [ 127 srcs: [ 142 srcs: [ 163 srcs: [ 164 $srcs 169 srcs 517 srcs = android_srcs.intersection(linux_srcs).intersection(mac_srcs) global() variable 518 srcs = srcs.intersection(win_srcs) global() variable [all...] |
/third_party/mesa3d/src/broadcom/compiler/ |
H A D | vir_opt_redundant_flags.c | 52 vir_sources_modified(struct qinst *srcs, struct qinst *write) in vir_sources_modified() argument 54 for (int i = 0; i < vir_get_nsrc(srcs); i++) { in vir_sources_modified() 56 srcs->src[i].file == QFILE_TEMP && in vir_sources_modified() 57 srcs->src[i].index == write->dst.index) { in vir_sources_modified() 62 if (srcs->src[i].file != QFILE_TEMP && in vir_sources_modified() 63 srcs->src[i].file != QFILE_SMALL_IMM) in vir_sources_modified()
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/third_party/alsa-lib/test/ |
H A D | mixtest.c | 232 s16 **srcs = malloc(sizeof(*srcs) * n); in main() local 250 srcs[i] = s = malloc(sizeof(s16) * size); in main() 260 mix_areas_srv(size, srcs[i], sum, 2, 4); in main() 274 mix_areas0(size, dst, srcs[i], sum, 2, 2, 4); in main() 287 mix_areas1(size, dst, srcs[i], sum, 2, 2, 4); in main() 300 mix_areas1_mmx(size, dst, srcs[i], sum, 2, 2, 4); in main() 313 mix_areas2(size, dst, srcs[i], sum, 2, 2); in main()
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/third_party/mesa3d/src/gallium/drivers/radeonsi/ |
H A D | si_shaderlib_tgsi.c | 159 struct ureg_src srcs[] = {srcbuf, ureg_src(load_addr)}; in si_create_dma_compute_shader() local 160 ureg_memory_insn(ureg, TGSI_OPCODE_LOAD, &dst, 1, srcs, 2, load_qualifier, in si_create_dma_compute_shader() 171 struct ureg_src srcs[] = {ureg_src(store_addr), is_copy ? values[d] : value}; in si_create_dma_compute_shader() local 172 ureg_memory_insn(ureg, TGSI_OPCODE_STORE, &dst, 1, srcs, 2, store_qualifier, in si_create_dma_compute_shader() 546 struct ureg_src srcs[] = {image, ureg_src(coord)}; in si_create_fmask_expand_cs() local 547 ureg_memory_insn(ureg, TGSI_OPCODE_LOAD, &sample[i], 1, srcs, 2, TGSI_MEMORY_RESTRICT, target, in si_create_fmask_expand_cs() 556 struct ureg_src srcs[] = {ureg_src(coord), ureg_src(sample[i])}; in si_create_fmask_expand_cs() local 557 ureg_memory_insn(ureg, TGSI_OPCODE_STORE, &dst_image, 1, srcs, 2, TGSI_MEMORY_RESTRICT, in si_create_fmask_expand_cs()
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