Lines Matching refs:srcs
2349 fs_reg srcs[URB_LOGICAL_NUM_SRCS];
2350 srcs[URB_LOGICAL_SRC_HANDLE] = fs_reg(retype(brw_vec8_grf(1, 0), BRW_REGISTER_TYPE_UD));
2351 srcs[URB_LOGICAL_SRC_PER_SLOT_OFFSETS] = per_slot_offset;
2352 srcs[URB_LOGICAL_SRC_CHANNEL_MASK] = channel_mask;
2353 srcs[URB_LOGICAL_SRC_DATA] = fs_reg(VGRF, alloc.allocate(length),
2355 abld.LOAD_PAYLOAD(srcs[URB_LOGICAL_SRC_DATA], sources, length, 0);
2358 srcs, ARRAY_SIZE(srcs));
2617 fs_reg srcs[URB_LOGICAL_NUM_SRCS];
2618 srcs[URB_LOGICAL_SRC_HANDLE] = icp_handle;
2624 inst = bld.emit(SHADER_OPCODE_URB_READ_LOGICAL, tmp, srcs,
2625 ARRAY_SIZE(srcs));
2633 inst = bld.emit(SHADER_OPCODE_URB_READ_LOGICAL, dst, srcs,
2634 ARRAY_SIZE(srcs));
2645 fs_reg srcs[URB_LOGICAL_NUM_SRCS];
2646 srcs[URB_LOGICAL_SRC_HANDLE] = icp_handle;
2647 srcs[URB_LOGICAL_SRC_PER_SLOT_OFFSETS] = indirect_offset;
2651 srcs, ARRAY_SIZE(srcs));
2660 srcs, ARRAY_SIZE(srcs));
2929 fs_reg srcs[URB_LOGICAL_NUM_SRCS];
2930 srcs[URB_LOGICAL_SRC_HANDLE] = icp_handle;
2937 inst = bld.emit(SHADER_OPCODE_URB_READ_LOGICAL, tmp, srcs,
2938 ARRAY_SIZE(srcs));
2944 inst = bld.emit(SHADER_OPCODE_URB_READ_LOGICAL, dst, srcs,
2945 ARRAY_SIZE(srcs));
2951 srcs[URB_LOGICAL_SRC_PER_SLOT_OFFSETS] = indirect_offset;
2957 srcs, ARRAY_SIZE(srcs));
2964 srcs, ARRAY_SIZE(srcs));
3003 fs_reg srcs[URB_LOGICAL_NUM_SRCS];
3004 srcs[URB_LOGICAL_SRC_HANDLE] = patch_handle;
3011 srcs, ARRAY_SIZE(srcs));
3019 srcs, ARRAY_SIZE(srcs));
3027 fs_reg srcs[URB_LOGICAL_NUM_SRCS];
3028 srcs[URB_LOGICAL_SRC_HANDLE] = output_handles;
3029 srcs[URB_LOGICAL_SRC_PER_SLOT_OFFSETS] = indirect_offset;
3036 srcs, ARRAY_SIZE(srcs));
3044 srcs, ARRAY_SIZE(srcs));
3089 fs_reg srcs[URB_LOGICAL_NUM_SRCS];
3090 srcs[URB_LOGICAL_SRC_HANDLE] = get_tcs_output_urb_handle();
3091 srcs[URB_LOGICAL_SRC_PER_SLOT_OFFSETS] = indirect_offset;
3092 srcs[URB_LOGICAL_SRC_CHANNEL_MASK] = mask_reg;
3093 srcs[URB_LOGICAL_SRC_DATA] = fs_reg(VGRF, alloc.allocate(length),
3095 bld.LOAD_PAYLOAD(srcs[URB_LOGICAL_SRC_DATA], sources, length, 0);
3098 srcs, ARRAY_SIZE(srcs));
3157 fs_reg srcs[URB_LOGICAL_NUM_SRCS];
3158 srcs[URB_LOGICAL_SRC_HANDLE] =
3166 srcs, ARRAY_SIZE(srcs));
3174 srcs, ARRAY_SIZE(srcs));
3189 fs_reg srcs[URB_LOGICAL_NUM_SRCS];
3190 srcs[URB_LOGICAL_SRC_HANDLE] =
3192 srcs[URB_LOGICAL_SRC_PER_SLOT_OFFSETS] = indirect_offset;
3199 srcs, ARRAY_SIZE(srcs));
3206 srcs, ARRAY_SIZE(srcs));
3363 fs_reg srcs[TEX_LOGICAL_NUM_SRCS];
3364 srcs[TEX_LOGICAL_SRC_COORDINATE] = coords;
3365 srcs[TEX_LOGICAL_SRC_LOD] = brw_imm_ud(0);
3366 srcs[TEX_LOGICAL_SRC_SAMPLE_INDEX] = sample;
3367 srcs[TEX_LOGICAL_SRC_MCS] = mcs;
3368 srcs[TEX_LOGICAL_SRC_SURFACE] = brw_imm_ud(target);
3369 srcs[TEX_LOGICAL_SRC_SAMPLER] = brw_imm_ud(0);
3370 srcs[TEX_LOGICAL_SRC_COORD_COMPONENTS] = brw_imm_ud(3);
3371 srcs[TEX_LOGICAL_SRC_GRAD_COMPONENTS] = brw_imm_ud(0);
3373 fs_inst *inst = bld.emit(op, dst, srcs, ARRAY_SIZE(srcs));
3666 const fs_reg srcs[] = { offset(this->delta_xy[bary], bld, 0),
3668 bld.LOAD_PAYLOAD(dest, srcs, ARRAY_SIZE(srcs), 0);
3869 fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS];
3870 srcs[SURFACE_LOGICAL_SRC_SURFACE] = brw_imm_ud(0);
3871 srcs[SURFACE_LOGICAL_SRC_IMM_DIMS] = brw_imm_ud(1);
3872 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(3); /* num components */
3873 srcs[SURFACE_LOGICAL_SRC_ADDRESS] = brw_imm_ud(0);
3874 srcs[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK] = brw_imm_ud(0);
3877 dest, srcs, SURFACE_LOGICAL_NUM_SRCS);
3905 fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS];
3906 srcs[SURFACE_LOGICAL_SRC_SURFACE] = brw_imm_ud(GFX7_BTI_SLM);
3907 srcs[SURFACE_LOGICAL_SRC_ADDRESS] = get_nir_src(instr->src[0]);
3908 srcs[SURFACE_LOGICAL_SRC_IMM_DIMS] = brw_imm_ud(1);
3909 srcs[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK] = brw_imm_ud(0);
3920 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(instr->num_components);
3923 dest, srcs, SURFACE_LOGICAL_NUM_SRCS);
3927 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(bit_size);
3931 read_result, srcs, SURFACE_LOGICAL_NUM_SRCS);
3942 fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS];
3943 srcs[SURFACE_LOGICAL_SRC_SURFACE] = brw_imm_ud(GFX7_BTI_SLM);
3944 srcs[SURFACE_LOGICAL_SRC_ADDRESS] = get_nir_src(instr->src[1]);
3945 srcs[SURFACE_LOGICAL_SRC_IMM_DIMS] = brw_imm_ud(1);
3949 srcs[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK] = brw_imm_ud(0);
3961 srcs[SURFACE_LOGICAL_SRC_DATA] = data;
3962 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(instr->num_components);
3964 fs_reg(), srcs, SURFACE_LOGICAL_NUM_SRCS);
3967 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(bit_size);
3969 srcs[SURFACE_LOGICAL_SRC_DATA] = bld.vgrf(BRW_REGISTER_TYPE_UD);
3970 bld.MOV(srcs[SURFACE_LOGICAL_SRC_DATA], data);
3973 fs_reg(), srcs, SURFACE_LOGICAL_NUM_SRCS);
4324 fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS];
4339 srcs[SURFACE_LOGICAL_SRC_SURFACE] =
4345 srcs[SURFACE_LOGICAL_SRC_SURFACE_HANDLE] =
4350 srcs[SURFACE_LOGICAL_SRC_ADDRESS] = get_nir_src(instr->src[1]);
4351 srcs[SURFACE_LOGICAL_SRC_IMM_DIMS] =
4357 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(instr->num_components);
4358 srcs[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK] = brw_imm_ud(0);
4361 dest, srcs, SURFACE_LOGICAL_NUM_SRCS);
4365 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(instr->num_components);
4366 srcs[SURFACE_LOGICAL_SRC_DATA] = get_nir_src(instr->src[3]);
4367 srcs[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK] = brw_imm_ud(1);
4369 fs_reg(), srcs, SURFACE_LOGICAL_NUM_SRCS);
4378 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(op);
4389 srcs[SURFACE_LOGICAL_SRC_DATA] = data;
4390 srcs[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK] = brw_imm_ud(1);
4393 dest, srcs, SURFACE_LOGICAL_NUM_SRCS);
4414 fs_reg srcs[TEX_LOGICAL_NUM_SRCS];
4416 srcs[TEX_LOGICAL_SRC_SURFACE] = image;
4418 srcs[TEX_LOGICAL_SRC_SURFACE_HANDLE] = image;
4419 srcs[TEX_LOGICAL_SRC_SAMPLER] = brw_imm_d(0);
4420 srcs[TEX_LOGICAL_SRC_COORD_COMPONENTS] = brw_imm_d(0);
4421 srcs[TEX_LOGICAL_SRC_GRAD_COMPONENTS] = brw_imm_d(0);
4430 tmp, srcs, ARRAY_SIZE(srcs));
4441 fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS];
4442 srcs[SURFACE_LOGICAL_SRC_SURFACE] =
4444 srcs[SURFACE_LOGICAL_SRC_ADDRESS] = get_nir_src(instr->src[1]);
4445 srcs[SURFACE_LOGICAL_SRC_IMM_DIMS] = brw_imm_ud(1);
4446 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(instr->num_components);
4447 srcs[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK] = brw_imm_ud(0);
4451 dest, srcs, SURFACE_LOGICAL_NUM_SRCS);
4457 fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS];
4458 srcs[SURFACE_LOGICAL_SRC_SURFACE] =
4460 srcs[SURFACE_LOGICAL_SRC_ADDRESS] = get_nir_src(instr->src[1]);
4461 srcs[SURFACE_LOGICAL_SRC_DATA] = get_nir_src(instr->src[2]);
4462 srcs[SURFACE_LOGICAL_SRC_IMM_DIMS] = brw_imm_ud(1);
4463 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(instr->num_components);
4464 srcs[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK] = brw_imm_ud(1);
4467 fs_reg(), srcs, SURFACE_LOGICAL_NUM_SRCS);
4673 const fs_reg srcs[] = { component(shader_clock, 0),
4675 bld.LOAD_PAYLOAD(dest, srcs, ARRAY_SIZE(srcs), 0);
4854 fs_reg srcs[A64_LOGICAL_NUM_SRCS];
4855 srcs[A64_LOGICAL_ADDRESS] = get_nir_src(instr->src[0]);
4856 srcs[A64_LOGICAL_SRC] = fs_reg(); /* No source data */
4857 srcs[A64_LOGICAL_ENABLE_HELPERS] =
4864 srcs[A64_LOGICAL_ARG] = brw_imm_ud(instr->num_components);
4868 srcs, A64_LOGICAL_NUM_SRCS);
4876 srcs[A64_LOGICAL_ARG] = brw_imm_ud(bit_size);
4879 srcs, A64_LOGICAL_NUM_SRCS);
4893 fs_reg srcs[A64_LOGICAL_NUM_SRCS];
4894 srcs[A64_LOGICAL_ADDRESS] = get_nir_src(instr->src[1]);
4895 srcs[A64_LOGICAL_ENABLE_HELPERS] =
4902 srcs[A64_LOGICAL_SRC] = get_nir_src(instr->src[0]); /* Data */
4903 srcs[A64_LOGICAL_ARG] = brw_imm_ud(instr->num_components);
4906 srcs, A64_LOGICAL_NUM_SRCS);
4915 srcs[A64_LOGICAL_SRC] = tmp;
4916 srcs[A64_LOGICAL_ARG] = brw_imm_ud(nir_src_bit_size(instr->src[0]));
4919 srcs, A64_LOGICAL_NUM_SRCS);
4977 fs_reg srcs[A64_LOGICAL_NUM_SRCS];
4978 srcs[A64_LOGICAL_ADDRESS] = addr;
4979 srcs[A64_LOGICAL_SRC] = fs_reg(); /* No source data */
4980 srcs[A64_LOGICAL_ARG] = brw_imm_ud(instr->num_components);
4984 srcs[A64_LOGICAL_ENABLE_HELPERS] = brw_imm_ud(0);
4987 load_val, srcs, A64_LOGICAL_NUM_SRCS);
5010 fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS];
5011 srcs[SURFACE_LOGICAL_SRC_SURFACE] =
5013 srcs[SURFACE_LOGICAL_SRC_ADDRESS] = get_nir_src(instr->src[1]);
5014 srcs[SURFACE_LOGICAL_SRC_IMM_DIMS] = brw_imm_ud(1);
5015 srcs[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK] = brw_imm_ud(0);
5026 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(instr->num_components);
5029 dest, srcs, SURFACE_LOGICAL_NUM_SRCS);
5033 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(bit_size);
5037 read_result, srcs, SURFACE_LOGICAL_NUM_SRCS);
5047 fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS];
5048 srcs[SURFACE_LOGICAL_SRC_SURFACE] =
5050 srcs[SURFACE_LOGICAL_SRC_ADDRESS] = get_nir_src(instr->src[2]);
5051 srcs[SURFACE_LOGICAL_SRC_IMM_DIMS] = brw_imm_ud(1);
5052 srcs[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK] = brw_imm_ud(1);
5064 srcs[SURFACE_LOGICAL_SRC_DATA] = data;
5065 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(instr->num_components);
5067 fs_reg(), srcs, SURFACE_LOGICAL_NUM_SRCS);
5070 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(bit_size);
5072 srcs[SURFACE_LOGICAL_SRC_DATA] = bld.vgrf(BRW_REGISTER_TYPE_UD);
5073 bld.MOV(srcs[SURFACE_LOGICAL_SRC_DATA], data);
5076 fs_reg(), srcs, SURFACE_LOGICAL_NUM_SRCS);
5181 fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS];
5188 srcs[SURFACE_LOGICAL_SRC_SURFACE_HANDLE] = handle;
5190 srcs[SURFACE_LOGICAL_SRC_SURFACE] =
5193 srcs[SURFACE_LOGICAL_SRC_SURFACE] = brw_imm_ud(BRW_BTI_STATELESS);
5196 srcs[SURFACE_LOGICAL_SRC_IMM_DIMS] = brw_imm_ud(1);
5197 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(bit_size);
5198 srcs[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK] = brw_imm_ud(0);
5214 srcs[SURFACE_LOGICAL_SRC_ADDRESS] =
5216 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(1);
5219 dest, srcs, SURFACE_LOGICAL_NUM_SRCS);
5222 srcs[SURFACE_LOGICAL_SRC_ADDRESS] =
5226 dest, srcs, SURFACE_LOGICAL_NUM_SRCS);
5229 srcs[SURFACE_LOGICAL_SRC_ADDRESS] =
5234 read_result, srcs, SURFACE_LOGICAL_NUM_SRCS);
5247 fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS];
5254 srcs[SURFACE_LOGICAL_SRC_SURFACE_HANDLE] = handle;
5256 srcs[SURFACE_LOGICAL_SRC_SURFACE] =
5259 srcs[SURFACE_LOGICAL_SRC_SURFACE] = brw_imm_ud(BRW_BTI_STATELESS);
5262 srcs[SURFACE_LOGICAL_SRC_IMM_DIMS] = brw_imm_ud(1);
5263 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(bit_size);
5271 srcs[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK] = brw_imm_ud(0);
5284 srcs[SURFACE_LOGICAL_SRC_DATA] = data;
5286 srcs[SURFACE_LOGICAL_SRC_ADDRESS] =
5288 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(1);
5291 dest, srcs, SURFACE_LOGICAL_NUM_SRCS);
5293 srcs[SURFACE_LOGICAL_SRC_DATA] = data;
5296 srcs[SURFACE_LOGICAL_SRC_ADDRESS] =
5300 fs_reg(), srcs, SURFACE_LOGICAL_NUM_SRCS);
5303 srcs[SURFACE_LOGICAL_SRC_DATA] = bld.vgrf(BRW_REGISTER_TYPE_UD);
5304 bld.MOV(srcs[SURFACE_LOGICAL_SRC_DATA], data);
5306 srcs[SURFACE_LOGICAL_SRC_ADDRESS] =
5310 fs_reg(), srcs, SURFACE_LOGICAL_NUM_SRCS);
5698 fs_reg srcs[A64_LOGICAL_NUM_SRCS];
5699 srcs[A64_LOGICAL_ADDRESS] = address;
5700 srcs[A64_LOGICAL_SRC] = fs_reg(); /* No source data */
5701 srcs[A64_LOGICAL_ARG] = brw_imm_ud(block);
5702 srcs[A64_LOGICAL_ENABLE_HELPERS] = brw_imm_ud(1);
5705 srcs, A64_LOGICAL_NUM_SRCS)->size_written = block_bytes;
5732 fs_reg srcs[A64_LOGICAL_NUM_SRCS];
5733 srcs[A64_LOGICAL_ADDRESS] = address;
5734 srcs[A64_LOGICAL_SRC] = retype(byte_offset(src, written * 4),
5736 srcs[A64_LOGICAL_ARG] = brw_imm_ud(block);
5737 srcs[A64_LOGICAL_ENABLE_HELPERS] = brw_imm_ud(0);
5741 srcs, A64_LOGICAL_NUM_SRCS);
5760 fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS];
5761 srcs[SURFACE_LOGICAL_SRC_SURFACE] = is_ssbo ?
5763 srcs[SURFACE_LOGICAL_SRC_ADDRESS] = address;
5777 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(block);
5782 srcs, SURFACE_LOGICAL_NUM_SRCS)->size_written = block_bytes;
5802 fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS];
5803 srcs[SURFACE_LOGICAL_SRC_SURFACE] = is_ssbo ?
5805 srcs[SURFACE_LOGICAL_SRC_ADDRESS] = address;
5818 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(block);
5819 srcs[SURFACE_LOGICAL_SRC_DATA] =
5824 fs_reg(), srcs, SURFACE_LOGICAL_NUM_SRCS);
5963 fs_reg srcs[RT_LOGICAL_NUM_SRCS];
5966 srcs[RT_LOGICAL_SRC_GLOBALS] = bld.emit_uniformize(globals);
5967 srcs[RT_LOGICAL_SRC_BVH_LEVEL] = get_nir_src(instr->src[1]);
5968 srcs[RT_LOGICAL_SRC_TRACE_RAY_CONTROL] = get_nir_src(instr->src[2]);
5969 srcs[RT_LOGICAL_SRC_SYNCHRONOUS] = brw_imm_ud(synchronous);
5971 srcs, RT_LOGICAL_NUM_SRCS);
6011 fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS];
6012 srcs[SURFACE_LOGICAL_SRC_SURFACE] = get_nir_ssbo_intrinsic_index(bld, instr);
6013 srcs[SURFACE_LOGICAL_SRC_ADDRESS] = get_nir_src(instr->src[1]);
6014 srcs[SURFACE_LOGICAL_SRC_IMM_DIMS] = brw_imm_ud(1);
6015 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(op);
6016 srcs[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK] = brw_imm_ud(1);
6028 srcs[SURFACE_LOGICAL_SRC_DATA] = data;
6033 dest, srcs, SURFACE_LOGICAL_NUM_SRCS);
6044 fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS];
6045 srcs[SURFACE_LOGICAL_SRC_SURFACE] = get_nir_ssbo_intrinsic_index(bld, instr);
6046 srcs[SURFACE_LOGICAL_SRC_ADDRESS] = get_nir_src(instr->src[1]);
6047 srcs[SURFACE_LOGICAL_SRC_IMM_DIMS] = brw_imm_ud(1);
6048 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(op);
6049 srcs[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK] = brw_imm_ud(1);
6058 srcs[SURFACE_LOGICAL_SRC_DATA] = data;
6063 dest, srcs, SURFACE_LOGICAL_NUM_SRCS);
6074 fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS];
6075 srcs[SURFACE_LOGICAL_SRC_SURFACE] = brw_imm_ud(GFX7_BTI_SLM);
6076 srcs[SURFACE_LOGICAL_SRC_IMM_DIMS] = brw_imm_ud(1);
6077 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(op);
6078 srcs[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK] = brw_imm_ud(1);
6089 srcs[SURFACE_LOGICAL_SRC_DATA] = data;
6093 srcs[SURFACE_LOGICAL_SRC_ADDRESS] =
6096 srcs[SURFACE_LOGICAL_SRC_ADDRESS] = vgrf(glsl_type::uint_type);
6097 bld.ADD(srcs[SURFACE_LOGICAL_SRC_ADDRESS],
6105 dest, srcs, SURFACE_LOGICAL_NUM_SRCS);
6116 fs_reg srcs[SURFACE_LOGICAL_NUM_SRCS];
6117 srcs[SURFACE_LOGICAL_SRC_SURFACE] = brw_imm_ud(GFX7_BTI_SLM);
6118 srcs[SURFACE_LOGICAL_SRC_IMM_DIMS] = brw_imm_ud(1);
6119 srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(op);
6120 srcs[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK] = brw_imm_ud(1);
6129 srcs[SURFACE_LOGICAL_SRC_DATA] = data;
6133 srcs[SURFACE_LOGICAL_SRC_ADDRESS] =
6136 srcs[SURFACE_LOGICAL_SRC_ADDRESS] = vgrf(glsl_type::uint_type);
6137 bld.ADD(srcs[SURFACE_LOGICAL_SRC_ADDRESS],
6145 dest, srcs, SURFACE_LOGICAL_NUM_SRCS);
6184 fs_reg srcs[A64_LOGICAL_NUM_SRCS];
6185 srcs[A64_LOGICAL_ADDRESS] = addr;
6186 srcs[A64_LOGICAL_SRC] = data;
6187 srcs[A64_LOGICAL_ARG] = brw_imm_ud(op);
6188 srcs[A64_LOGICAL_ENABLE_HELPERS] = brw_imm_ud(0);
6194 srcs, A64_LOGICAL_NUM_SRCS);
6200 srcs, A64_LOGICAL_NUM_SRCS);
6204 srcs, A64_LOGICAL_NUM_SRCS);
6233 fs_reg srcs[A64_LOGICAL_NUM_SRCS];
6234 srcs[A64_LOGICAL_ADDRESS] = addr;
6235 srcs[A64_LOGICAL_SRC] = data;
6236 srcs[A64_LOGICAL_ARG] = brw_imm_ud(op);
6237 srcs[A64_LOGICAL_ENABLE_HELPERS] = brw_imm_ud(0);
6243 srcs, A64_LOGICAL_NUM_SRCS);
6249 srcs, A64_LOGICAL_NUM_SRCS);
6253 srcs, A64_LOGICAL_NUM_SRCS);
6266 fs_reg srcs[TEX_LOGICAL_NUM_SRCS];
6268 srcs[TEX_LOGICAL_SRC_SURFACE] = brw_imm_ud(texture);
6269 srcs[TEX_LOGICAL_SRC_SAMPLER] = brw_imm_ud(sampler);
6275 srcs[TEX_LOGICAL_SRC_LOD] = brw_imm_d(0);
6282 srcs[TEX_LOGICAL_SRC_LOD] =
6286 srcs[TEX_LOGICAL_SRC_SHADOW_C] = retype(src, BRW_REGISTER_TYPE_F);
6294 srcs[TEX_LOGICAL_SRC_COORDINATE] = retype(src, BRW_REGISTER_TYPE_D);
6297 srcs[TEX_LOGICAL_SRC_COORDINATE] = retype(src, BRW_REGISTER_TYPE_F);
6309 srcs[TEX_LOGICAL_SRC_LOD] = retype(src, BRW_REGISTER_TYPE_F);
6313 srcs[TEX_LOGICAL_SRC_LOD2] = retype(src, BRW_REGISTER_TYPE_F);
6318 srcs[TEX_LOGICAL_SRC_LOD] =
6322 srcs[TEX_LOGICAL_SRC_LOD] =
6326 srcs[TEX_LOGICAL_SRC_LOD] =
6332 srcs[TEX_LOGICAL_SRC_MIN_LOD] =
6336 srcs[TEX_LOGICAL_SRC_SAMPLE_INDEX] = retype(src, BRW_REGISTER_TYPE_UD);
6349 srcs[TEX_LOGICAL_SRC_TG4_OFFSET] =
6362 srcs[TEX_LOGICAL_SRC_SURFACE] = bld.emit_uniformize(tmp);
6370 srcs[TEX_LOGICAL_SRC_SAMPLER] = bld.emit_uniformize(tmp);
6376 srcs[TEX_LOGICAL_SRC_SURFACE] = fs_reg();
6377 srcs[TEX_LOGICAL_SRC_SURFACE_HANDLE] = bld.emit_uniformize(src);
6382 srcs[TEX_LOGICAL_SRC_SAMPLER] = fs_reg();
6383 srcs[TEX_LOGICAL_SRC_SAMPLER_HANDLE] = bld.emit_uniformize(src);
6388 srcs[TEX_LOGICAL_SRC_MCS] = retype(src, BRW_REGISTER_TYPE_D);
6396 if (srcs[TEX_LOGICAL_SRC_MCS].file == BAD_FILE &&
6401 srcs[TEX_LOGICAL_SRC_MCS] =
6402 emit_mcs_fetch(srcs[TEX_LOGICAL_SRC_COORDINATE],
6404 srcs[TEX_LOGICAL_SRC_SURFACE],
6405 srcs[TEX_LOGICAL_SRC_SURFACE_HANDLE]);
6407 srcs[TEX_LOGICAL_SRC_MCS] = brw_imm_ud(0u);
6411 srcs[TEX_LOGICAL_SRC_COORD_COMPONENTS] = brw_imm_d(instr->coord_components);
6412 srcs[TEX_LOGICAL_SRC_GRAD_COMPONENTS] = brw_imm_d(lod_components);
6455 if (srcs[TEX_LOGICAL_SRC_TG4_OFFSET].file != BAD_FILE)
6469 if (srcs[TEX_LOGICAL_SRC_MCS].file == BRW_IMMEDIATE_VALUE) {
6473 bld.OR(tmp, srcs[TEX_LOGICAL_SRC_MCS],
6474 offset(srcs[TEX_LOGICAL_SRC_MCS], bld, 1));
6477 bld.CMP(dst, srcs[TEX_LOGICAL_SRC_MCS], brw_imm_ud(0u),
6499 fs_inst *inst = bld.emit(opcode, dst, srcs, ARRAY_SIZE(srcs));
6515 if (srcs[TEX_LOGICAL_SRC_SHADOW_C].file != BAD_FILE)