Searched refs:shadowed_regs (Results 1 - 8 of 8) sorted by relevance
| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| H A D | si_cp_reg_shadowing.c | 178 si_build_load_reg(sctx->screen, pm4, i, sctx->shadowed_regs); in si_create_shadowing_ib_preamble()
196 sctx->shadowed_regs = in si_init_cp_reg_shadowing()
202 if (!sctx->shadowed_regs) in si_init_cp_reg_shadowing()
203 fprintf(stderr, "radeonsi: cannot create a shadowed_regs buffer\n"); in si_init_cp_reg_shadowing()
206 si_init_cs_preamble_state(sctx, sctx->shadowed_regs != NULL); in si_init_cp_reg_shadowing()
208 if (sctx->shadowed_regs) { in si_init_cp_reg_shadowing()
210 si_cp_dma_clear_buffer(sctx, &sctx->gfx_cs, &sctx->shadowed_regs->b.b, in si_init_cp_reg_shadowing()
211 0, sctx->shadowed_regs->bo_size, 0, SI_OP_SYNC_AFTER, in si_init_cp_reg_shadowing()
219 radeon_add_to_buffer_list(sctx, &sctx->gfx_cs, sctx->shadowed_regs, in si_init_cp_reg_shadowing()
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| H A D | si_gfx_cs.c | 411 if (ctx->shadowed_regs) { in si_begin_new_gfx_cs()
412 radeon_add_to_buffer_list(ctx, &ctx->gfx_cs, ctx->shadowed_regs, in si_begin_new_gfx_cs()
418 if (first_cs || !ctx->shadowed_regs) { in si_begin_new_gfx_cs()
463 if (has_clear_state || ctx->shadowed_regs) { in si_begin_new_gfx_cs()
481 if (first_cs || !ctx->shadowed_regs) { in si_begin_new_gfx_cs()
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| H A D | si_pm4.c | 156 if (!first_cs && sctx->shadowed_regs) { in si_pm4_reset_emitted()
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| H A D | si_state_shaders.cpp | 3729 assert(!sctx->shadowed_regs);
3846 if (sctx->shadowed_regs) {
4116 if (sctx->shadowed_regs) {
4118 /* TODO: tmz + shadowed_regs support */
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| H A D | si_state_draw.cpp | 1489 if (index_size != sctx->last_index_size || sctx->shadowed_regs ||
1616 if (sctx->shadowed_regs ||
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| H A D | si_pipe.h | 959 struct si_resource *shadowed_regs; member
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| H A D | si_pipe.c | 341 si_resource_reference(&sctx->shadowed_regs, NULL); in si_destroy_context()
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| H A D | si_descriptors.c | 2192 } else if (sctx->gfx_level == GFX9 && sctx->shadowed_regs) { in si_emit_global_shader_pointers()
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