Searched refs:shader_mask (Results 1 - 4 of 4) sorted by relevance
| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| H A D | si_blit.c | 779 void si_decompress_textures(struct si_context *sctx, unsigned shader_mask) in si_decompress_textures() argument
795 mask = sctx->shader_needs_decompress_mask & shader_mask; in si_decompress_textures()
820 if (shader_mask & u_bit_consecutive(0, SI_NUM_GRAPHICS_SHADERS)) { in si_decompress_textures()
833 } else if (shader_mask & (1 << PIPE_SHADER_COMPUTE)) { in si_decompress_textures()
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| H A D | si_pipe.h | 1328 void si_decompress_textures(struct si_context *sctx, unsigned shader_mask);
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| /third_party/mesa3d/src/intel/vulkan/ |
| H A D | genX_cmd_buffer.c | 3258 uint32_t shader_mask, in cmd_buffer_emit_push_constant_all()
3264 c.ShaderUpdateEnable = shader_mask; in cmd_buffer_emit_push_constant_all()
3281 gl_shader_stage stage = vk_to_mesa_shader_stage(shader_mask); in cmd_buffer_emit_push_constant_all()
3293 .ShaderUpdateEnable = shader_mask, in cmd_buffer_emit_push_constant_all()
3257 cmd_buffer_emit_push_constant_all(struct anv_cmd_buffer *cmd_buffer, uint32_t shader_mask, struct anv_address *buffers, uint32_t buffer_count) cmd_buffer_emit_push_constant_all() argument
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| /third_party/mesa3d/src/gallium/drivers/iris/ |
| H A D | iris_state.c | 5710 uint32_t shader_mask, in emit_push_constant_packet_all()
5717 pc.ShaderUpdateEnable = shader_mask; in emit_push_constant_packet_all()
5733 all.ShaderUpdateEnable = shader_mask; in emit_push_constant_packet_all()
5708 emit_push_constant_packet_all(struct iris_context *ice, struct iris_batch *batch, uint32_t shader_mask, const struct push_bos *push_bos) emit_push_constant_packet_all() argument
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