/third_party/libunwind/libunwind/src/x86_64/ |
H A D | getcontext.S | 80 movw %cs, UC_MCONTEXT_CS(%rdi) 81 movw %ss, UC_MCONTEXT_SS(%rdi) 85 movw %ds, UC_MCONTEXT_DS(%rdi) 86 movw %es, UC_MCONTEXT_ES(%rdi) 87 movw %fs, UC_MCONTEXT_FS(%rdi) 88 movw %gs, UC_MCONTEXT_GS(%rdi)
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/third_party/libunwind/libunwind/src/x86/ |
H A D | getcontext-freebsd.S | 50 movw %fs, %cx 52 movw %gs, %cx 54 movw %ds, %cx 56 movw %es, %cx 58 movw %ss, %cx 60 movw %cs, %cx
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H A D | getcontext-linux.S | 60 movw %fs, %cx
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/third_party/ltp/testcases/kernel/kvm/ |
H A D | bootstrap_x86.S | 123 movw %dx, %ax 146 movw %dx, %ax 207 movw %ax, (%edi) 209 movw %ax, 2(%edi) 211 movw %ax, 4(%edi) 213 movw %ax, 6(%edi) 215 movw %ax, 8(%edi) 217 movw %ax, 10(%edi)
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H A D | bootstrap_x86_64.S | 311 movw %ax, (%rdi) 313 movw %ax, 2(%rdi) 315 movw %ax, 4(%rdi) 317 movw %ax, 6(%rdi) 319 movw %ax, 8(%rdi) 321 movw %ax, 10(%rdi)
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/third_party/ffmpeg/libavcodec/arm/ |
H A D | vc1dsp_neon.S | 89 movw r12, #17 93 movw r12, #10 136 movw r12, #12 147 movw r12, #15 253 movw r12, #15 277 movw r12, #16
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H A D | vp9itxfm_16bpp_neon.S | 766 movw r8, #0x03ff 772 movw r8, #0x0fff 1251 movw r9, #0x03ff 1257 movw r9, #0x0fff 1873 movw r9, #0x03ff 1879 movw r9, #0x0fff
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H A D | fft_neon.S | 55 movw r2, #0x04f3 @ sqrt(1/2)
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H A D | vp8dsp_armv6.S | 200 movw r3, #20091 @ cospi8sqrt2minus1 201 movw r4, #35468 @ sinpi8sqrt2
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H A D | h264qpel_neon.S | 27 movw \r, #5
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/third_party/musl/src/thread/i386/ |
H A D | __set_thread_area.s | 24 3: movw %dx,%gs
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/third_party/ffmpeg/libavutil/arm/ |
H A D | asm.S | 140 .macro movw rd, val 148 movw \rd, #(\val) & 0xffff 197 movw \rd, #:lower16:\val
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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/DartARM32/ |
H A D | assembler_arm.cc | 321 // Moved to ARM32::AssemblerARM32::movw() 322 void Assembler::movw(Register rd, uint16_t imm16, Condition cond) { 2001 static int32_t DecodeARMv7LoadImmediate(int32_t movt, int32_t movw) { 2005 offset |= (movw & 0xf0000) >> 4; 2006 offset |= movw & 0xfff; 2072 const int32_t movw = region.Load<int32_t>(position); 2077 ((movw & 0xfff0f000) == 0xe300c000)) { // movw IP, low 2078 const int32_t offset = DecodeARMv7LoadImmediate(movt, movw); 2224 const int32_t movw [all...] |
H A D | assembler_arm.h | 1141 // Moved to ARM::AssemblerARM32::movw 1142 void movw(Register rd, uint16_t imm16, Condition cond = AL);
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/third_party/vixl/benchmarks/aarch32/ |
H A D | asm-disasm-speed-test.cc | 317 __ movw(sl, 0U); in Generate_1() 452 __ movw(r7, 0U); in Generate_2() 520 __ movw(r3, 0U); in Generate_3() 652 __ movw(r3, 0U); in Generate_4() 773 __ movw(r3, 0U); in Generate_5() 922 __ movw(r3, 0U); in Generate_6() 1040 __ movw(r3, 0U); in Generate_7() 1264 __ movw(r3, 0U); in Generate_9() 1357 __ movw(r3, 0U); in Generate_10() 1752 __ movw(r in Generate_13() [all...] |
/third_party/python/Modules/_ctypes/libffi_osx/x86/ |
H A D | x86-darwin.S | 149 movw %ax,0(%ecx)
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/third_party/node/deps/v8/src/compiler/backend/x64/ |
H A D | code-generator-x64.cc | 338 tasm->movw(operand, value); in EmitStore() 397 tasm->movw(operand, value); in EmitStore() 430 tasm->movw(scratch, operand); in EmitMemoryProbeForTrapHandlerIfNeeded() 4352 ASSEMBLE_ATOMIC_BINOP(inst32, movw, cmpxchgw); \ in AssembleArchInstruction() 4358 ASSEMBLE_ATOMIC_BINOP(inst32, movw, cmpxchgw); \ in AssembleArchInstruction() 4362 ASSEMBLE_ATOMIC64_BINOP(inst64, movw, cmpxchgw); \ in AssembleArchInstruction()
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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
H A D | IceAssemblerARM32.h | 41 /// Handles encoding of bottom/top 16 bits of an address using movw/movt. 238 void movw(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond); 879 // Implements movw/movt, generating pattern ccccxxxxxxxsiiiiddddiiiiiiiiiiii
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/third_party/vixl/test/aarch32/ |
H A D | test-assembler-cond-rd-operand-imm16-t32.cc | 54 M(movw) 492 #include "aarch32/traces/assembler-cond-rd-operand-imm16-movw-t32.h"
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/third_party/mesa3d/src/mesa/x86/ |
H A D | assyntax.h | 529 #define MOV_SR(a, b) CHOICE(movw ARG2(a,b), mov ARG2(a,b), mov ARG2(b,a)) 531 #define MOV_W(a, b) CHOICE(movw ARG2(a,b), movw ARG2(a,b), _WTOG mov ARG2(b,a))
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/third_party/node/deps/v8/src/codegen/x64/ |
H A D | assembler-x64.cc | 1629 void Assembler::movw(Register dst, Operand src) { in movw() function in v8::internal::Assembler 1637 void Assembler::movw(Operand dst, Register src) { in movw() function in v8::internal::Assembler 1645 void Assembler::movw(Operand dst, Immediate imm) { in movw() function in v8::internal::Assembler
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H A D | assembler-x64.h | 559 void movw(Register dst, Operand src); 560 void movw(Operand dst, Register src); 561 void movw(Operand dst, Immediate imm);
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/third_party/node/deps/v8/src/codegen/arm/ |
H A D | assembler-arm.cc | 337 // specially coded on ARM means that it is a movw/movt instruction. We don't in IsCodedSpecially() 838 // movw dst, #target16_0 in target_at_put() 857 // Patch with movw/movt. in target_at_put() 862 patcher.movw(dst, target16_0); in target_at_put() 867 patcher.movw(dst, target16_0); in target_at_put() 1098 *rotate_imm = *immed_8 = 0; // Not used for movw. in FitsShifter() 1147 // Otherwise, use immediate load if movw / movt is available. in UseMovImmediateLoad() 1171 // A movw / movt immediate load. in InstructionsRequired() 1203 movw(target, imm32 & 0xFFFF, cond); in Move32BitImmediate() 1659 // sequence of movw/mov in mov_label_offset() 1685 void Assembler::movw(Register reg, uint32_t immediate, Condition cond) { movw() function in v8::internal::Assembler [all...] |
H A D | assembler-arm.h | 481 // The constant for movw and movt should be in the range 0-0xffff. 482 void movw(Register reg, uint32_t immediate, Condition cond = al);
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/third_party/vixl/src/aarch32/ |
H A D | assembler-aarch32.h | 2670 void movw(Condition cond, Register rd, const Operand& operand); 2671 void movw(Register rd, const Operand& operand) { movw(al, rd, operand); } in movw() function in vixl::aarch32::Assembler
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