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Searched refs:lane (Results 1 - 25 of 107) sorted by relevance

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/third_party/astc-encoder/Source/UnitTest/
H A Dtest_simd.cpp91 EXPECT_EQ(r0.lane<0>(), 1.0f); in TEST()
96 EXPECT_EQ(r1.lane<0>(), -1.0f); in TEST()
101 EXPECT_EQ(r2.lane<0>(), -3.12f); in TEST()
106 EXPECT_EQ(r3.lane<0>(), 3.12f); in TEST()
114 EXPECT_NEAR(r0.lane<0>(), -0.149061f, 0.005f); in TEST()
118 EXPECT_NEAR(r1.lane<0>(), 0.000000f, 0.005f); in TEST()
122 EXPECT_NEAR(r2.lane<0>(), 0.733616f, 0.005f); in TEST()
126 EXPECT_NEAR(r3.lane<0>(), 1.123040f, 0.005f); in TEST()
135 EXPECT_NEAR(r0.lane<0>(), -0.129816f, 0.005f); in TEST()
140 EXPECT_NEAR(r1.lane< in TEST()
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/third_party/mbedtls/library/
H A Dsha3.c103 uint64_t lane[5]; in keccak_f1600() local
113 lane[i] = s[i] ^ s[i + 5] ^ s[i + 10] ^ s[i + 15] ^ s[i + 20]; in keccak_f1600()
116 t = lane[(i + 4) % 5] ^ ROTR64(lane[(i + 1) % 5], 63); in keccak_f1600()
120 lane[0] = s[0] ^ s[5] ^ s[10] ^ s[15] ^ s[20]; in keccak_f1600()
121 lane[1] = s[1] ^ s[6] ^ s[11] ^ s[16] ^ s[21]; in keccak_f1600()
122 lane[2] = s[2] ^ s[7] ^ s[12] ^ s[17] ^ s[22]; in keccak_f1600()
123 lane[3] = s[3] ^ s[8] ^ s[13] ^ s[18] ^ s[23]; in keccak_f1600()
124 lane[4] = s[4] ^ s[9] ^ s[14] ^ s[19] ^ s[24]; in keccak_f1600()
126 t = lane[ in keccak_f1600()
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/third_party/astc-encoder/Source/
H A Dastcenc_decompress_symbolic.cpp62 * @param lns_mask If set treat lane as HDR (LNS) else LDR (unorm16).
113 int max_weight_count = hmax(weight_count).lane<0>(); in unpack_weights()
148 int max_weight_count = hmax(weight_count).lane<0>(); in unpack_weights()
257 blk.data_r[i] = color.lane<0>(); in decompress_symbolic_block()
258 blk.data_g[i] = color.lane<1>(); in decompress_symbolic_block()
259 blk.data_b[i] = color.lane<2>(); in decompress_symbolic_block()
260 blk.data_a[i] = color.lane<3>(); in decompress_symbolic_block()
313 blk.data_r[tix] = colorf.lane<0>(); in decompress_symbolic_block()
314 blk.data_g[tix] = colorf.lane<1>(); in decompress_symbolic_block()
315 blk.data_b[tix] = colorf.lane< in decompress_symbolic_block()
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H A Dastcenc_ideal_endpoints_and_weights.cpp127 error_weight = blk.channel_weight.lane<0>(); in compute_ideal_colors_and_weights_1_comp()
131 error_weight = blk.channel_weight.lane<1>(); in compute_ideal_colors_and_weights_1_comp()
135 error_weight = blk.channel_weight.lane<2>(); in compute_ideal_colors_and_weights_1_comp()
140 error_weight = blk.channel_weight.lane<3>(); in compute_ideal_colors_and_weights_1_comp()
328 vfloat4 ep0 = select(blk.data_min, vfloat4(lowvalue.lane<0>()), comp1_mask);
329 vfloat4 ep1 = select(blk.data_max, vfloat4(highvalue.lane<0>()), comp1_mask);
331 ei.ep.endpt0[i] = select(ep0, vfloat4(lowvalue.lane<1>()), comp2_mask);
332 ei.ep.endpt1[i] = select(ep1, vfloat4(highvalue.lane<1>()), comp2_mask);
529 ei.ep.endpt0[i] = vfloat4(bmin.lane<0>(), ep0.lane<
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H A Dastcenccli_error_metrics.cpp52 val.sum_r += static_cast<double>(inc.lane<0>()); in operator +=()
53 val.sum_g += static_cast<double>(inc.lane<1>()); in operator +=()
54 val.sum_b += static_cast<double>(inc.lane<2>()); in operator +=()
55 val.sum_a += static_cast<double>(inc.lane<3>()); in operator +=()
235 rgb_peak = astc::max(static_cast<double>(color1.lane<0>()), in compute_error_metrics()
236 static_cast<double>(color1.lane<1>()), in compute_error_metrics()
237 static_cast<double>(color1.lane<2>()), in compute_error_metrics()
245 diffcolor.lane<0>() * color1.lane<3>(), in compute_error_metrics()
246 diffcolor.lane< in compute_error_metrics()
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H A Dastcenc_pick_best_endpoint_format.cpp96 vfloat uncor_bs0(uncor_pline.bs.lane<0>()); in compute_error_squared_rgb_single_partition()
97 vfloat uncor_bs1(uncor_pline.bs.lane<1>()); in compute_error_squared_rgb_single_partition()
98 vfloat uncor_bs2(uncor_pline.bs.lane<2>()); in compute_error_squared_rgb_single_partition()
100 vfloat uncor_amod0(uncor_pline.amod.lane<0>()); in compute_error_squared_rgb_single_partition()
101 vfloat uncor_amod1(uncor_pline.amod.lane<1>()); in compute_error_squared_rgb_single_partition()
102 vfloat uncor_amod2(uncor_pline.amod.lane<2>()); in compute_error_squared_rgb_single_partition()
105 vfloat samec_bs0(samec_pline.bs.lane<0>()); in compute_error_squared_rgb_single_partition()
106 vfloat samec_bs1(samec_pline.bs.lane<1>()); in compute_error_squared_rgb_single_partition()
107 vfloat samec_bs2(samec_pline.bs.lane<2>()); in compute_error_squared_rgb_single_partition()
110 vfloat rgbl_bs0(rgbl_pline.bs.lane< in compute_error_squared_rgb_single_partition()
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H A Dastcenc_color_quantize.cpp94 color_unquant_to_uquant_tables[quant_level - QUANT_6][index.lane<0>()], in quant_color3()
95 color_unquant_to_uquant_tables[quant_level - QUANT_6][index.lane<1>()], in quant_color3()
96 color_unquant_to_uquant_tables[quant_level - QUANT_6][index.lane<2>()], in quant_color3()
150 color_unquant_to_uquant_tables[quant_level - QUANT_6][index.lane<0>()], in quant_color3()
151 color_unquant_to_uquant_tables[quant_level - QUANT_6][index.lane<1>()], in quant_color3()
152 color_unquant_to_uquant_tables[quant_level - QUANT_6][index.lane<2>()], in quant_color3()
217 float a0 = color0.lane<3>(); in quantize_rgba()
218 float a1 = color1.lane<3>(); in quantize_rgba()
294 float a0 = color0.lane<3>(); in try_quantize_rgba_blue_contract()
295 float a1 = color1.lane< in try_quantize_rgba_blue_contract()
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H A Dastcenc_vecmathlib_common_4.h129 return a.lane<0>() + a.lane<1>() + a.lane<2>(); in hadd_rgb_s()
196 * If either lane value is NaN, @c b will be returned for that lane.
206 * If either lane value is NaN, @c b will be returned for that lane.
217 * then @c min will be returned for that lane.
229 * be returned for that lane.
240 * If @c a is NaN then zero will be returned for that lane
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H A Dastcenc_vecmathlib_none_4.h27 * designed to behave like SIMD conditional operators that generate lane masks.
29 * 0/-1 to give a full lane-width bitmask.
92 * The value of @c a is stored to lane 0 (LSB) in the SIMD register.
103 * @brief Get the scalar value of a single lane.
105 template <int l> ASTCENC_SIMD_INLINE float lane() const in lane() function
111 * @brief Set the scalar value of a single lane.
143 * @brief Factory that returns a vector containing the lane IDs.
155 return vfloat4(lane<l0>(), lane<l1>(), 0.0f, 0.0f); in swz()
163 return vfloat4(lane<l in swz()
249 template <int l> ASTCENC_SIMD_INLINE int lane() const lane() function
357 template <int l> ASTCENC_SIMD_INLINE float lane() const lane() function
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H A Dastcenc_vecmathlib_neon_4.h81 * The value of @c a is stored to lane 0 (LSB) in the SIMD register.
98 * @brief Get the scalar value of a single lane.
100 template <int l> ASTCENC_SIMD_INLINE float lane() const in lane() function
106 * @brief Set the scalar value of a single lane.
138 * @brief Factory that returns a vector containing the lane IDs.
151 return vfloat4(lane<l0>(), lane<l1>(), 0.0f, 0.0f); in swz()
159 return vfloat4(lane<l0>(), lane<l1>(), lane<l in swz()
244 template <int l> ASTCENC_SIMD_INLINE int lane() const lane() function
362 template <int32_t l> ASTCENC_SIMD_INLINE bool lane() const lane() function
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H A Dastcenc_vecmathlib_sse_4.h82 * The value of @c a is stored to lane 0 (LSB) in the SIMD register.
98 * @brief Get the scalar value of a single lane.
100 template <int l> ASTCENC_SIMD_INLINE float lane() const in lane() function
106 * @brief Set the scalar value of a single lane.
146 * @brief Factory that returns a vector containing the lane IDs.
242 * The value of @c a is stored to lane 0 (LSB) in the SIMD register.
258 * @brief Get the scalar from a single lane.
260 template <int l> ASTCENC_SIMD_INLINE int lane() const in lane() function
266 * @brief Set the scalar value of a single lane.
317 * @brief Factory that returns a vector containing the lane ID
382 template <int l> ASTCENC_SIMD_INLINE bool lane() const lane() function
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H A Dastcenc_image.cpp235 blk.data_r[idx] = datav.lane<0>(); in load_image_block()
236 blk.data_g[idx] = datav.lane<1>(); in load_image_block()
237 blk.data_b[idx] = datav.lane<2>(); in load_image_block()
238 blk.data_a[idx] = datav.lane<3>(); in load_image_block()
313 blk.data_r[idx] = datav.lane<0>(); in load_image_block_fast_ldr()
314 blk.data_g[idx] = datav.lane<1>(); in load_image_block_fast_ldr()
315 blk.data_b[idx] = datav.lane<2>(); in load_image_block_fast_ldr()
316 blk.data_a[idx] = datav.lane<3>(); in load_image_block_fast_ldr()
494 data16_row[0] = static_cast<uint16_t>(color.lane<0>()); in store_image_block()
495 data16_row[1] = static_cast<uint16_t>(color.lane< in store_image_block()
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H A Dastcenc_averages_and_directions.cpp45 * not be initialized, and lane<3> will be zero.
749 vfloat l_uncor_bs0(l_uncor.bs.lane<0>()); in compute_error_squared_rgba()
750 vfloat l_uncor_bs1(l_uncor.bs.lane<1>()); in compute_error_squared_rgba()
751 vfloat l_uncor_bs2(l_uncor.bs.lane<2>()); in compute_error_squared_rgba()
752 vfloat l_uncor_bs3(l_uncor.bs.lane<3>()); in compute_error_squared_rgba()
754 vfloat l_uncor_amod0(l_uncor.amod.lane<0>()); in compute_error_squared_rgba()
755 vfloat l_uncor_amod1(l_uncor.amod.lane<1>()); in compute_error_squared_rgba()
756 vfloat l_uncor_amod2(l_uncor.amod.lane<2>()); in compute_error_squared_rgba()
757 vfloat l_uncor_amod3(l_uncor.amod.lane<3>()); in compute_error_squared_rgba()
759 vfloat l_samec_bs0(l_samec.bs.lane< in compute_error_squared_rgba()
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H A Dastcenc_compute_variance.cpp378 float vasum = ( VARBUF1(z_high, y_low, x_low).lane<3>() in compute_pixel_region_variance()
379 - VARBUF1(z_high, y_low, x_high).lane<3>() in compute_pixel_region_variance()
380 - VARBUF1(z_high, y_high, x_low).lane<3>() in compute_pixel_region_variance()
381 + VARBUF1(z_high, y_high, x_high).lane<3>()) - in compute_pixel_region_variance()
382 ( VARBUF1(z_low, y_low, x_low).lane<3>() in compute_pixel_region_variance()
383 - VARBUF1(z_low, y_low, x_high).lane<3>() in compute_pixel_region_variance()
384 - VARBUF1(z_low, y_high, x_low).lane<3>() in compute_pixel_region_variance()
385 + VARBUF1(z_low, y_high, x_high).lane<3>()); in compute_pixel_region_variance()
410 float vasum = VARBUF1(0, y_low, x_low).lane<3>() in compute_pixel_region_variance()
411 - VARBUF1(0, y_low, x_high).lane< in compute_pixel_region_variance()
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H A Dastcenc_compress_symbolic.cpp166 vfloat4 color0 = color_base0 + color_offset0 * weight_base_vec.lane<0>(); in realign_weights_undecimated()
167 vfloat4 color1 = color_base1 + color_offset1 * weight_base_vec.lane<1>(); in realign_weights_undecimated()
168 vfloat4 color2 = color_base2 + color_offset2 * weight_base_vec.lane<2>(); in realign_weights_undecimated()
169 vfloat4 color3 = color_base3 + color_offset3 * weight_base_vec.lane<3>(); in realign_weights_undecimated()
183 vfloat4 color_diff_down0 = color_diff0 + color_offset0 * weight_down_vec.lane<0>(); in realign_weights_undecimated()
184 vfloat4 color_diff_down1 = color_diff1 + color_offset1 * weight_down_vec.lane<1>(); in realign_weights_undecimated()
185 vfloat4 color_diff_down2 = color_diff2 + color_offset2 * weight_down_vec.lane<2>(); in realign_weights_undecimated()
186 vfloat4 color_diff_down3 = color_diff3 + color_offset3 * weight_down_vec.lane<3>(); in realign_weights_undecimated()
188 vfloat4 color_diff_up0 = color_diff0 + color_offset0 * weight_up_vec.lane<0>(); in realign_weights_undecimated()
189 vfloat4 color_diff_up1 = color_diff1 + color_offset1 * weight_up_vec.lane< in realign_weights_undecimated()
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/third_party/vixl/test/aarch64/
H A Dtest-utils-aarch64.h61 T GetLane(int lane) const { in GetLane()
63 VIXL_CHECK(lane >= 0); in GetLane()
64 VIXL_CHECK(kSizeInBytes >= ((lane + 1) * lane_size)); in GetLane()
66 memcpy(&result, bytes + (lane * lane_size), lane_size); in GetLane()
71 void SetLane(int lane, T value) { in SetLane()
73 VIXL_CHECK(kSizeInBytes >= ((lane + 1) * lane_size)); in SetLane()
74 memcpy(bytes + (lane * lane_size), &value, lane_size); in SetLane()
164 inline T zreg_lane(unsigned code, int lane) const { in zreg_lane()
167 VIXL_ASSERT(lane < GetSVELaneCount(sizeof(T) * kBitsPerByte)); in zreg_lane()
168 return dump_.z_[code].GetLane<T>(lane); in zreg_lane()
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H A Dtest-simulator-aarch64.cc1484 // These will be either a D- or a Q-register form, with a single lane in Test1OpNEON_Helper()
1572 for (unsigned lane = 0; lane < vd_lane_count; lane++) { in Test1OpNEON()
1573 unsigned index = lane + (iteration * vd_lane_count); in Test1OpNEON()
1595 for (unsigned lane = 0; lane < vd_lane_count; lane++) { in Test1OpNEON()
1596 unsigned output_index = (n * vd_lane_count) + lane; in Test1OpNEON()
1615 for (unsigned lane in Test1OpNEON()
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/third_party/astc-encoder/Utils/
H A Dastcenc_u8_test_bench.cpp68 assert(cs0.lane<0>() == cs1.lane<0>()); in main()
69 assert(cs0.lane<3>() == cs1.lane<3>()); in main()
74 assert(colorv0_out.lane<0>() == cs0.lane<0>()); in main()
104 assert(cs0.lane<0>() == cs1.lane<0>()); in main()
105 assert(cs0.lane<3>() == cs1.lane< in main()
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/third_party/optimized-routines/math/
H A Dv_pow.c17 for (int lane = 0; lane < v_lanes64 (); lane++) in pow()
19 f64_t sx = v_get_f64 (x, lane); in pow()
20 f64_t sy = v_get_f64 (y, lane); in pow()
22 v_set_f64 (&z, lane, sz); in pow()
H A Dv_powf.c162 for (int lane = 0; lane < v_lanes32 (); lane++) in powf()
168 /* Use double precision for each lane. */ in powf()
172 si = v_get_u32 (i, lane); in powf()
173 siz = v_get_u32 (iz, lane); in powf()
174 sk = v_get_s32 (k, lane); in powf()
175 sy = v_get_f32 (y, lane); in powf()
201 v_set_u32 (&cmp, lane, in powf()
205 : v_get_u32 (cmp, lane)); in powf()
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/third_party/node/deps/base64/base64/lib/arch/neon32/
H A Ddec_loop.c25 dec_loop_neon32_lane (uint8x16_t *lane) in dec_loop_neon32_lane() argument
41 const uint8x16_t hi_nibbles = vshrq_n_u8(*lane, 4); in dec_loop_neon32_lane()
42 const uint8x16_t lo_nibbles = vandq_u8(*lane, mask_0F); in dec_loop_neon32_lane()
43 const uint8x16_t eq_2F = vceqq_u8(*lane, mask_2F); in dec_loop_neon32_lane()
49 *lane = vaddq_u8(*lane, delta_lookup(vaddq_u8(eq_2F, hi_nibbles))); in dec_loop_neon32_lane()
76 // Decode each lane, collect a mask of invalid inputs: in dec_loop_neon32()
/third_party/mesa3d/src/panfrost/bifrost/valhall/
H A Dvalhall.py103 halfswizzle = False, widen = False, lanes = False, combine = False, lane = None, absneg = False, notted = False, name = ""):
113 self.lane = lane
130 if lane:
131 self.offset['lane'] = self.lane
132 self.bits['lane'] = 2 if size in (8, 32) else 1
163 self.lane = False
226 lane = el.get('lane', Non
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/third_party/node/deps/v8/src/execution/ppc/
H A Dsimulator-ppc.h409 // Vector register lane numbers on IBM machines are reversed compared to
410 // x64. For example, doing an I32x4 extract_lane with lane number 0 on x64
411 // will be equal to lane number 3 on IBM machines. Vector registers are only
413 // simulation accurate, we need to make sure accessing a lane is correctly
414 // simulated and as such we reverse the lane number on the getters and setters
418 // be used to disabled automatic lane number reversal and help with accessing
421 T get_simd_register_by_lane(int reg, int lane, in get_simd_register_by_lane() argument
424 lane = (kSimd128Size / sizeof(T)) - 1 - lane; in get_simd_register_by_lane()
426 CHECK_LE(lane, kSimd128Siz in get_simd_register_by_lane()
444 set_simd_register_by_lane(int reg, int lane, const T& value, bool force_ibm_lane_numbering = true) set_simd_register_by_lane() argument
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/third_party/skia/third_party/externals/swiftshader/src/Pipeline/
H A DSpirvShaderDebugger.cpp52 // PerLane operator[] returns the elements of a single lane (a transpose of the
57 sw::vec<T, N> operator[](int lane) const in operator []()
62 out[i] = elements[i][lane]; in operator []()
72 const T &operator[](int lane) const { return data[lane]; } in operator []()
109 // laneName() returns a string describing values for the lane i.
237 // Unlike the top-level SIMD lane grouping of variables in Frame::locals,
238 // Frame::hovers displays each variable as a value per SIMD lane.
266 for(int lane = 0; lane < s
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/third_party/vixl/src/aarch32/
H A Dinstructions-aarch32.h226 SRegister GetLane(uint32_t lane) const {
228 VIXL_ASSERT(lane < lane_count);
230 return SRegister(GetCode() * lane_count + lane);
329 DRegisterLane(DRegister reg, uint32_t lane)
330 : DRegister(reg.GetCode()), lane_(lane) {}
331 DRegisterLane(uint32_t code, uint32_t lane) : DRegister(code), lane_(lane) {}
347 int* lane) {
352 *lane = value >> 3;
355 *lane
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