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Searched refs:kXRegSize (Results 1 - 25 of 30) sorted by relevance

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/third_party/vixl/src/aarch64/
H A Doperands-aarch64.h215 static CPURegList GetCalleeSaved(unsigned size = kXRegSize);
221 static CPURegList GetCallerSaved(unsigned size = kXRegSize);
278 if (type == CPURegister::kRegister) size = kXRegSize; in GetDefaultSizeFor()
295 constexpr CPURegList kCalleeSaved = CPURegList(CPURegister::kRegister, kXRegSize, 19, 28);
299 constexpr CPURegList kCallerSaved = CPURegList(CPURegister::kRegister, kXRegSize, 0, 18);
H A Doperands-aarch64.cc160 VIXL_ASSERT(reg.Is32Bits() || (shift_amount < kXRegSize)); in Operand()
432 VIXL_ASSERT(reg.GetSizeInBits() > static_cast<int>(kXRegSize)); in GenericOperand()
H A Dinstructions-aarch64.h63 const unsigned kXRegSize = 64; member
65 const unsigned kXRegSizeInBytes = kXRegSize / 8;
H A Dregisters-aarch64.h450 VIXL_STATIC_ASSERT(kDRegSize == kXRegSize);
808 V(XRegister, kXRegSize, Register) \
H A Dsimulator-aarch64.cc934 VIXL_ASSERT((reg_size == kXRegSize) || (reg_size == kWRegSize)); in Simulator()
968 AddWithCarry(kXRegSize, x.second, y.second, 0); in Simulator()
971 AddWithCarry(kXRegSize, x.first, y.first, carry_in); in Simulator()
1143 offset = ShiftOperand(kXRegSize, offset, mem_op.GetShift(), shift_amount); in Simulator()
1146 offset = ExtendValue(kXRegSize, offset, mem_op.GetExtend(), shift_amount); in Simulator()
1453 case kXRegSize: in Simulator()
3891 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; in Simulator()
3934 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; in Simulator()
3951 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; in Simulator()
3961 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize in Simulator()
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H A Dassembler-aarch64.h7338 VIXL_ASSERT(((reg_size == kXRegSize) && IsUint6(imms)) ||
7345 VIXL_ASSERT(((reg_size == kXRegSize) && IsUint6(immr)) ||
7353 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize));
7355 VIXL_ASSERT((reg_size == kXRegSize) || IsUint6(imms + 3));
7361 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize));
7362 VIXL_ASSERT(((reg_size == kXRegSize) && IsUint6(immr)) ||
7374 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize));
7375 VIXL_ASSERT((reg_size == kXRegSize) || (bitn == 0));
H A Dinstructions-aarch64.cc610 unsigned reg_size = GetSixtyFourBits() ? kXRegSize : kWRegSize; in GetImmLogical()
H A Ddisasm-aarch64.cc982 (instr->GetSixtyFourBits() == 1) ? kXRegSize : kWRegSize; in Disassembler()
1010 VIXL_ASSERT((reg_size == kXRegSize) || in Disassembler()
1022 if ((reg_size == kXRegSize) && in Disassembler()
1142 ((instr->GetSixtyFourBits() == 1) ? kXRegSize : kWRegSize) - 1; in Disassembler()
6458 unsigned reg_size = kXRegSize; in Disassembler()
6480 reg_size = kXRegSize; in Disassembler()
7006 (instr->GetSixtyFourBits() == 1) ? kXRegSize : kWRegSize; in Disassembler()
H A Dmacro-assembler-aarch64.cc1828 VIXL_ASSERT(dst.GetSizeInBits() <= kXRegSize); in Emit()
2016 IsUintN(rd.GetSizeInBits() == kXRegSize ? kXRegSizeLog2 : kWRegSizeLog2, in Emit()
2669 CPURegList(CPURegister::kRegister, kXRegSize, 1, arg_count); in Emit()
H A Dassembler-aarch64.cc6241 VIXL_ASSERT(rn.GetSizeInBits() == kXRegSize);
6503 VIXL_ASSERT((reg_size == kXRegSize) || (reg_size == kWRegSize));
6607 clz_a = CountLeadingZeros(a, kXRegSize);
6608 int clz_c = CountLeadingZeros(c, kXRegSize);
6629 clz_a = CountLeadingZeros(a, kXRegSize);
6662 uint64_t multiplier = multipliers[CountLeadingZeros(d, kXRegSize) - 57];
6677 int clz_b = (b == 0) ? -1 : CountLeadingZeros(b, kXRegSize);
H A Dsimulator-aarch64.h585 typedef SimRegisterBase<kXRegSize> SimRegister; // r0-r31
1567 case kXRegSize:
1705 case kXRegSize:
H A Dmacro-assembler-aarch64.h850 Mov(rd, (rd.GetSizeInBits() == kXRegSize) ? ~imm : (~imm & kWRegMask)); in Mvn()
975 // parameter. Only kXRegSize, kWRegSize, kDRegSize and kSRegSize are
993 void PushXRegList(RegList regs) { PushSizeRegList(regs, kXRegSize); } in PushXRegList()
994 void PopXRegList(RegList regs) { PopSizeRegList(regs, kXRegSize); } in PopXRegList()
1030 // parameter. Only kXRegSize, kWRegSize, kDRegSize and kSRegSize are
1056 PeekSizeRegList(regs, offset, kXRegSize); in PeekXRegList()
1059 PokeSizeRegList(regs, offset, kXRegSize); in PokeXRegList()
8746 VIXL_ASSERT(vector.GetLaneSizeInBits() <= kXRegSize); in AcquireRegisterToHoldLane()
/third_party/vixl/benchmarks/aarch64/
H A Dbench-utils.h238 vixl::aarch64::Register PickX() { return PickR(vixl::aarch64::kXRegSize); } in PickX()
H A Dbench-utils.cc86 return PickBool() ? kWRegSize : kXRegSize; in PickRSize()
/third_party/node/deps/v8/src/builtins/arm64/
H A Dbuiltins-arm64.cc3477 __ Poke(x19, (spill_offset + 0) * kXRegSize); in CallApiFunctionAndReturn()
3478 __ Poke(x20, (spill_offset + 1) * kXRegSize); in CallApiFunctionAndReturn()
3479 __ Poke(x21, (spill_offset + 2) * kXRegSize); in CallApiFunctionAndReturn()
3480 __ Poke(x22, (spill_offset + 3) * kXRegSize); in CallApiFunctionAndReturn()
3525 __ Peek(x19, (spill_offset + 0) * kXRegSize); in CallApiFunctionAndReturn()
3526 __ Peek(x20, (spill_offset + 1) * kXRegSize); in CallApiFunctionAndReturn()
3527 __ Peek(x21, (spill_offset + 2) * kXRegSize); in CallApiFunctionAndReturn()
3528 __ Peek(x22, (spill_offset + 3) * kXRegSize); in CallApiFunctionAndReturn()
3900 (saved_registers.Count() * kXRegSize) + in Generate_DeoptimizationEntry()
3904 const int kDoubleRegistersOffset = saved_registers.Count() * kXRegSize; in Generate_DeoptimizationEntry()
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/third_party/node/deps/v8/src/regexp/arm64/
H A Dregexp-macro-assembler-arm64.h132 static const int kFirstCaptureOnStack = kStackLocalPadding - kXRegSize;
H A Dregexp-macro-assembler-arm64.cc835 static constexpr int kWRegPerXReg = kXRegSize / kWRegSize; in GetCode()
1466 int align_mask = (alignment / kXRegSize) - 1; in CallCheckStackGuardState()
/third_party/node/deps/v8/src/execution/arm64/
H A Dsimulator-arm64.cc289 DCHECK(sizeof(uintptr_t) < 2 * kXRegSize); in PushAddress()
290 intptr_t new_sp = sp() - 2 * kXRegSize; in PushAddress()
291 uintptr_t* alignment_slot = reinterpret_cast<uintptr_t*>(new_sp + kXRegSize); in PushAddress()
303 DCHECK_LT(sizeof(uintptr_t), 2 * kXRegSize); in PopAddress() local
304 set_sp(current_sp + 2 * kXRegSize); in PopAddress()
1049 static_assert((sizeof(T) == kWRegSize) || (sizeof(T) == kXRegSize), in AddWithCarry()
1234 static_assert(kXRegSize == kDRegSize, "X and D registers must be same size.");
1500 // For typical register updates, size_in_bytes should be set to kXRegSize
1514 unsigned padding_chars = (kXRegSize - size_in_bytes) * 2;
1519 case kXRegSize
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/third_party/node/deps/v8/src/codegen/arm64/
H A Dinstructions-arm64.cc171 static_assert(kXRegSize == kDRegSize, "X and D registers must be same size."); in CalcLSPairDataSize()
H A Dmacro-assembler-arm64.h748 inline void Claim(int64_t count, uint64_t unit_size = kXRegSize);
749 inline void Claim(const Register& count, uint64_t unit_size = kXRegSize);
750 inline void Drop(int64_t count, uint64_t unit_size = kXRegSize);
751 inline void Drop(const Register& count, uint64_t unit_size = kXRegSize);
H A Dmacro-assembler-arm64-inl.h1341 Drop(tmp, kXRegSize); in DropArguments()
1349 Drop(RoundUp(count, 2), kXRegSize); in DropArguments() local
1353 Drop(RoundUp(count, 2), kXRegSize); in DropSlots() local
H A Dmacro-assembler-arm64.cc1271 MemOperand tos(sp, -2 * static_cast<int>(kXRegSize), PreIndex); in PushCalleeSavedRegisters()
1305 MemOperand tos(sp, 2 * kXRegSize, PostIndex); in PopCalleeSavedRegisters()
2234 Ldr(x16, MemOperand(x16, -static_cast<int64_t>(kXRegSize))); in StoreReturnAddressAndCall()
2760 Claim(slots_to_claim, kXRegSize); in TruncateDoubleToI()
2773 Add(scratch, sp, kXRegSize); in TruncateDoubleToI()
/third_party/vixl/test/aarch64/
H A Dtest-api-aarch64.cc233 VIXL_CHECK(Register(1, kXRegSize).Is(x1)); in TEST()
324 VIXL_CHECK(CPURegister(1, kXRegSize, CPURegister::kRegister).Is(x1)); in TEST()
961 Register r_x1(1, kXRegSize); in TEST()
1137 Register temp1 = temps.AcquireRegisterOfSize(kXRegSize); in TEST()
H A Dtest-utils-aarch64.cc504 x[i] = Register(n, kXRegSize); in PopulateRegisterArray()
555 Register xn(i, kXRegSize); in Clobber()
H A Dtest-simulator-aarch64.cc979 VIXL_ASSERT((d_size == kXRegSize) || (d_size == kWRegSize)); in TestFPToFixed_Helper()
1003 Register rd = (d_size == kXRegSize) ? Register(x10) : Register(w10); in TestFPToFixed_Helper()
1045 VIXL_ASSERT((d_size == kXRegSize) || (d_size == kWRegSize)); in TestFPToInt_Helper()
1071 Register rd = (d_size == kXRegSize) ? Register(x10) : Register(w10); in TestFPToInt_Helper()

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