Searched refs:kQRegSizeInBytes (Results 1 - 12 of 12) sorted by relevance
| /third_party/vixl/test/aarch64/ |
| H A D | test-utils-aarch64.h | 88 typedef VectorValue<kQRegSizeInBytes> QRegisterValue;
104 VIXL_ASSERT(sizeof(dump_.q_[0]) == kQRegSizeInBytes); in RegisterDump()
282 memcmp(&dump_.q_[code], &dump_.z_[code], kQRegSizeInBytes) == 0;
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| H A D | test-utils-aarch64.cc | 684 DumpRegisters<VRegister>(masm, dump_base, q_offset, kQRegSizeInBytes); in Dump()
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| H A D | test-assembler-sve-aarch64.cc | 295 uint8_t data[kQRegSizeInBytes];
296 for (size_t i = 0; i < kQRegSizeInBytes; i++) {
355 for (int i = kQRegSizeInBytes; i < core.GetSVELaneCount(kBRegSize); i++) {
9366 __ Mov(x0, data + page_size - (kQRegSizeInBytes / kBRegSizeInBytes) / 2);
9410 __ Mov(x0, data + page_size - (kQRegSizeInBytes / kSRegSizeInBytes) / 2);
9418 __ Mov(x0, data + page_size - (kQRegSizeInBytes / kHRegSizeInBytes) / 2);
9550 if (loaded_data_in_bytes < kQRegSizeInBytes) {
10456 int data_size = (kQRegSizeInBytes + 128) * 2;
20083 int data_size = (kQRegSizeInBytes + 128) * 4;
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| H A D | test-simulator-aarch64.cc | 1731 __ Str(vdstr, MemOperand(out, kQRegSizeInBytes, PostIndex)); in Test1OpAcrossNEON_Helper()
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| H A D | test-assembler-aarch64.cc | 11680 offset += 2 * kQRegSizeInBytes;
11897 preindex = 2 * kQRegSizeInBytes;
12066 postindex = 2 * kQRegSizeInBytes;
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| /third_party/vixl/src/aarch32/ |
| H A D | constants-aarch32.h | 55 const unsigned kQRegSizeInBytes = kQRegSizeInBits / 8; member
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| /third_party/vixl/src/aarch64/ |
| H A D | instructions-aarch64.h | 77 const unsigned kQRegSizeInBytes = kQRegSize / 8; member
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| H A D | simulator-aarch64.h | 1750 uint8_t val[kQRegSizeInBytes];
1764 (sizeof(T) == kQRegSizeInBytes));
1873 (sizeof(value) == kQRegSizeInBytes) ||
2684 int reg_size_in_bytes = kQRegSizeInBytes);
2696 kQRegSizeInBytes),
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| H A D | assembler-aarch64.h | 217 (size_ == kQRegSizeInBytes)); in GetSize()
223 VIXL_ASSERT(size_ == kQRegSizeInBytes); in GetRawValue128Low64()
231 VIXL_ASSERT(size_ == kQRegSizeInBytes); in GetRawValue128High64()
324 : RawLiteral(kQRegSizeInBytes, literal_pool, ownership) { in Literal()
325 VIXL_STATIC_ASSERT(sizeof(low64) == (kQRegSizeInBytes / 2)); in Literal()
373 VIXL_ASSERT(GetSize() == kQRegSizeInBytes); in RewriteValueInCode()
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| H A D | simulator-aarch64.cc | 1163 case kQRegSizeInBytes: in Simulator()
1176 case kQRegSizeInBytes: in Simulator()
1571 const unsigned size = kQRegSizeInBytes; in Simulator()
1639 const unsigned size = kQRegSizeInBytes; in Simulator()
1758 (reg_size_in_bytes == kQRegSizeInBytes)); in Simulator()
1939 address += kQRegSizeInBytes; in Simulator()
1965 int lanes_per_q = kQRegSizeInBytes / esize_in_bytes; in Simulator()
2023 address += kQRegSizeInBytes; in Simulator()
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| H A D | assembler-aarch64.cc | 143 VIXL_ASSERT(literal->GetSize() == kQRegSizeInBytes); in place()
2868 VIXL_ASSERT(lane < (kQRegSizeInBytes / lane_size)); in LoadStoreStructSingle()
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| H A D | disasm-aarch64.cc | 6444 : kQRegSizeInBytes; in Disassembler()
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