| /third_party/vixl/test/aarch64/ |
| H A D | test-assembler-sve-aarch64.cc | 477 TEST_SVE(sve_mla_mls_h) { MlaMlsHelper(config, kHRegSize); }
1557 ASSERT_EQUAL_64(0x4000000000000000 + core.GetSVELaneCount(kHRegSize), x21);
1668 ASSERT_EQUAL_64(core.GetSVELaneCount(kHRegSize), x22);
1777 ASSERT_EQUAL_64(0x4000000000000000 + core.GetSVELaneCount(kHRegSize), x21);
1912 int h_lane_count = core.GetSVELaneCount(kHRegSize);
2060 int h_lane_count = core.GetSVELaneCount(kHRegSize);
2220 int h_lane_count = core.GetSVELaneCount(kHRegSize);
2277 int h_lane_count = core.GetSVELaneCount(kHRegSize);
2282 uint64_t h_mask = GetUintMask(kHRegSize);
3129 PnextHelper(config, kHRegSize, in
[all...] |
| H A D | test-api-aarch64.cc | 247 VIXL_CHECK(VRegister(1, kHRegSize).Is(h1)); in TEST()
254 VIXL_CHECK(VRegister(1, kHRegSize, 1).Is(h1)); in TEST()
291 VIXL_CHECK(ZRegister(1, kHRegSize).Is(z1.VnH())); in TEST()
306 VIXL_CHECK(PRegisterWithLaneSize(1, kHRegSize).Is(p1.VnH())); in TEST()
327 VIXL_CHECK(CPURegister(3, kHRegSize, CPURegister::kVRegister).Is(h3)); in TEST()
580 VIXL_CHECK(p14.VnH().GetLaneSizeInBits() == kHRegSize); in TEST()
1561 temps.Include(ZRegister(12), ZRegister(13, kHRegSize), z14); in TEST()
1593 temps.Exclude(ZRegister(12), ZRegister(13, kHRegSize), z14); in TEST()
1646 temps.Include(PRegister(11), PRegisterWithLaneSize(12, kHRegSize)); in TEST()
1678 temps.Exclude(PRegister(11), PRegisterWithLaneSize(12, kHRegSize)); in TEST()
[all...] |
| H A D | test-utils-aarch64.cc | 738 case kHRegSize: in GetSignallingNan()
797 case kHRegSize: in SetFpData()
877 SetFpData(masm, kHRegSize, kInputFloat16Basic, lcg_mult); in InitialiseRegisterFp()
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| H A D | test-utils-aarch64.h | 177 case kHRegSize:
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| H A D | test-simulator-aarch64.cc | 250 (d_size == kHRegSize)); in Test1Op_Helper()
252 (n_size == kHRegSize)); in Test1Op_Helper()
395 (reg_size == kHRegSize)); in Test2Op_Helper()
552 (reg_size == kHRegSize)); in Test3Op_Helper()
981 (n_size == kHRegSize)); in TestFPToFixed_Helper()
1047 (n_size == kHRegSize)); in TestFPToInt_Helper()
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| /third_party/vixl/benchmarks/aarch64/ |
| H A D | bench-utils.cc | 93 if (entropy == 0) return kHRegSize; in PickFPSize()
364 if (other_size < kHRegSize) other_size = kDRegSize; in GenerateFPSequence()
365 if (other_size > kDRegSize) other_size = kHRegSize; in GenerateFPSequence()
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| H A D | bench-utils.h | 239 vixl::aarch64::VRegister PickH() { return PickV(vixl::aarch64::kHRegSize); } in PickH()
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| /third_party/vixl/src/aarch64/ |
| H A D | registers-aarch64.h | 477 case kHRegSize:
652 ZRegister VnH() const { return ZRegister(GetCode(), kHRegSize); }
783 return PRegisterWithLaneSize(GetCode(), kHRegSize);
812 V(HRegister, kHRegSize, VRegister) \
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| H A D | logic-aarch64.cc | 2556 case kHRegSize:
2613 if (LaneSizeInBitsFromFormat(vform) == kHRegSize) {
2692 if (LaneSizeInBitsFromFormat(vform) == kHRegSize) {
2709 if (LaneSizeInBitsFromFormat(vform) == kHRegSize) {
5022 if (LaneSizeInBitsFromFormat(vform) == kHRegSize) { \
5066 if (LaneSizeInBitsFromFormat(vform) == kHRegSize) {
5098 if (LaneSizeInBitsFromFormat(vform) == kHRegSize) {
5167 if (LaneSizeInBitsFromFormat(vform) == kHRegSize) {
5184 if (LaneSizeInBitsFromFormat(vform) == kHRegSize) {
5206 if (LaneSizeInBitsFromFormat(vform) == kHRegSize) {
[all...] |
| H A D | instructions-aarch64.cc | 39 VIXL_ASSERT((reg_size == kBRegSize) || (reg_size == kHRegSize) || in RepeatBitsAcrossReg()
1235 return kHRegSize; in RegisterSizeInBitsFromFormat()
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| H A D | instructions-aarch64.h | 55 const unsigned kHRegSize = 16; member
57 const unsigned kHRegSizeInBytes = kHRegSize / 8;
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| H A D | macro-assembler-sve-aarch64.cc | 387 if (zd.GetLaneSizeInBits() >= kHRegSize) { in Cpy()
390 case kHRegSize: in Cpy()
828 case kHRegSize: in Fdup()
850 case kHRegSize: in Fdup()
871 case kHRegSize: in Fdup()
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| H A D | simulator-aarch64.cc | 1017 VIXL_ASSERT((reg_size == kBRegSize) || (reg_size == kHRegSize) || in Simulator()
1508 case kHRegSize: in Simulator()
10708 dst_data_size = kHRegSize; in Simulator()
10709 src_data_size = kHRegSize; in Simulator()
10714 src_data_size = kHRegSize; in Simulator()
10719 src_data_size = kHRegSize; in Simulator()
10861 dst_data_size = kHRegSize; in Simulator()
10862 src_data_size = kHRegSize; in Simulator()
10871 dst_data_size = kHRegSize; in Simulator()
10886 dst_data_size = kHRegSize; in Simulator()
[all...] |
| H A D | assembler-sve-aarch64.cc | 4508 case kHRegSize: in SVEGatherPrefetchVectorPlusImmediateHelper()
4543 case kHRegSize: in SVEGatherPrefetchScalarPlusImmediateHelper()
4574 case kHRegSize: in SVEContiguousPrefetchScalarPlusScalarHelper()
4614 case kHRegSize: in SVEContiguousPrefetchScalarPlusVectorHelper()
4638 case kHRegSize: in SVEContiguousPrefetchScalarPlusVectorHelper()
4663 case kHRegSize: in SVEContiguousPrefetchScalarPlusVectorHelper()
4736 SVEPrefetchHelper(prfop, pg, addr, kHRegSize); in prfh()
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| H A D | assembler-aarch64.cc | 6520 VIXL_ASSERT((width == kBRegSize) || (width == kHRegSize) ||
6726 case kHRegSize:
6749 case kHRegSize:
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| H A D | disasm-aarch64.cc | 6128 case kHRegSize: in Disassembler()
6488 reg_size = kHRegSize; in Disassembler()
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| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.h | 1004 static_assert((sizeof(T) == kBRegSize) || (sizeof(T) == kHRegSize) || in vreg()
1066 (sizeof(value) == kBRegSize) || (sizeof(value) == kHRegSize) || in set_vreg()
1118 (sizeof(value) == kHRegSize) || in set_vreg_no_log()
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| H A D | simulator-logic-arm64.cc | 3829 if (LaneSizeInBytesFromFormat(vform) == kHRegSize) { in fcvtn()
3846 if (LaneSizeInBytesFromFormat(vform) == kHRegSize) { in fcvtn2()
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| H A D | simulator-arm64.cc | 1225 case kHRegSize:
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | constants-arm64.h | 65 const int kHRegSize = kHRegSizeInBits >> 3; member
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