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Searched refs:is_load (Results 1 - 17 of 17) sorted by relevance

/third_party/mesa3d/src/broadcom/common/
H A Dv3d_tiling.c224 bool is_load) in v3d_move_pixels_unaligned()
240 if (is_load) { in v3d_move_pixels_unaligned()
264 bool is_load) in v3d_move_pixels_general_percpp()
287 if (is_load) { in v3d_move_pixels_general_percpp()
306 get_pixel_offset, is_load); in v3d_move_pixels_general_percpp()
350 get_pixel_offset, is_load); in v3d_move_pixels_general_percpp()
362 bool is_load) in v3d_move_pixels_general()
370 is_load); in v3d_move_pixels_general()
377 is_load); in v3d_move_pixels_general()
384 is_load); in v3d_move_pixels_general()
217 v3d_move_pixels_unaligned(void *gpu, uint32_t gpu_stride, void *cpu, uint32_t cpu_stride, int cpp, uint32_t image_h, const struct pipe_box *box, uint32_t (*get_pixel_offset)(uint32_t cpp, uint32_t image_h, uint32_t x, uint32_t y), bool is_load) v3d_move_pixels_unaligned() argument
257 v3d_move_pixels_general_percpp(void *gpu, uint32_t gpu_stride, void *cpu, uint32_t cpu_stride, int cpp, uint32_t image_h, const struct pipe_box *box, uint32_t (*get_pixel_offset)(uint32_t cpp, uint32_t image_h, uint32_t x, uint32_t y), bool is_load) v3d_move_pixels_general_percpp() argument
355 v3d_move_pixels_general(void *gpu, uint32_t gpu_stride, void *cpu, uint32_t cpu_stride, int cpp, uint32_t image_h, const struct pipe_box *box, uint32_t (*get_pixel_offset)(uint32_t cpp, uint32_t image_h, uint32_t x, uint32_t y), bool is_load) v3d_move_pixels_general() argument
404 v3d_move_tiled_image(void *gpu, uint32_t gpu_stride, void *cpu, uint32_t cpu_stride, enum v3d_tiling_mode tiling_format, int cpp, uint32_t image_h, const struct pipe_box *box, bool is_load) v3d_move_tiled_image() argument
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/third_party/mesa3d/src/intel/compiler/
H A Dbrw_mesh.cpp638 const bool is_load = intrin->intrinsic == nir_intrinsic_load_per_vertex_output; in brw_nir_adjust_offset_for_arrayed_indices_instr() local
639 nir_src *index_src = &intrin->src[is_load ? 0 : 1]; in brw_nir_adjust_offset_for_arrayed_indices_instr()
640 nir_src *offset_src = &intrin->src[is_load ? 1 : 2]; in brw_nir_adjust_offset_for_arrayed_indices_instr()
654 const bool is_load = intrin->intrinsic == nir_intrinsic_load_per_primitive_output; in brw_nir_adjust_offset_for_arrayed_indices_instr() local
655 nir_src *index_src = &intrin->src[is_load ? 0 : 1]; in brw_nir_adjust_offset_for_arrayed_indices_instr()
656 nir_src *offset_src = &intrin->src[is_load ? 1 : 2]; in brw_nir_adjust_offset_for_arrayed_indices_instr()
/third_party/mesa3d/src/amd/vulkan/
H A Dradv_nir_apply_pipeline_layout.c363 bool is_load = intrin->intrinsic == nir_intrinsic_image_deref_load || in update_image_intrinsic() local
368 nir_intrinsic_access(intrin) & ACCESS_NON_UNIFORM, NULL, !is_load); in update_image_intrinsic()
/third_party/mesa3d/src/panfrost/util/
H A Dpan_lower_framebuffer.c570 bool is_load = intr->intrinsic == nir_intrinsic_load_deref; in pan_lower_framebuffer() local
573 if (!(is_load || (is_store && is_blend))) in pan_lower_framebuffer()
/third_party/mesa3d/src/amd/compiler/
H A Daco_assembler.cpp181 bool is_load = !instr->definitions.empty(); in emit_instruction() local
228 if (is_load || instr->operands.size() >= 3) { /* SDATA */ in emit_instruction()
229 encoding |= (is_load ? instr->definitions[0].physReg() : instr->operands[2].physReg()) in emit_instruction()
/third_party/vixl/src/aarch64/
H A Dassembler-sve-aarch64.cc3860 bool is_load = true; in SVELd1Helper() local
3866 is_load, in SVELd1Helper()
3898 bool is_load = true; in SVELdff1Helper() local
3904 is_load, in SVELdff1Helper()
3937 bool is_load, in SVEScatterGatherHelper()
3942 VIXL_ASSERT(is_load || !is_first_fault); in SVEScatterGatherHelper()
3943 VIXL_ASSERT(is_load || !is_signed); in SVEScatterGatherHelper()
3948 if (is_load) { in SVEScatterGatherHelper()
3969 if (is_load) { in SVEScatterGatherHelper()
3976 if (is_load) { in SVEScatterGatherHelper()
3933 SVEScatterGatherHelper(unsigned msize_in_bytes_log2, const ZRegister& zt, const PRegister& pg, const SVEMemOperand& addr, bool is_load, bool is_signed, bool is_first_fault) SVEScatterGatherHelper() argument
5051 SVEMemOperandHelper(unsigned msize_in_bytes_log2, int num_regs, const SVEMemOperand& addr, bool is_load) SVEMemOperandHelper() argument
5133 bool is_load = false; SVESt1Helper() local
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H A Dassembler-aarch64.h7869 // Set `is_load` to false in default as it's only used in the
7874 bool is_load = false);
7919 bool is_load,
H A Dsimulator-aarch64.cc4777 bool is_load = instr->GetLdStXLoad(); in Simulator() local
4786 if (is_load) { in Simulator()
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/DartARM32/
H A Dassembler_arm.cc2405 bool Address::CanHoldImmediateOffset(bool is_load, intptr_t cid,
2408 if (is_load) {
3368 Address Assembler::ElementAddressForIntIndex(bool is_load, bool is_external,
3378 if (Address::CanHoldImmediateOffset(is_load, cid, offset)) {
3381 ASSERT(Address::CanHoldImmediateOffset(is_load, cid, offset - offset_base));
3387 Address Assembler::ElementAddressForRegIndex(bool is_load, bool is_external,
3397 const Register base = is_load ? IP : index;
3415 if ((is_load && !Address::CanHoldLoadOffset(size, offset, &offset_mask)) ||
3416 (!is_load && !Address::CanHoldStoreOffset(size, offset, &offset_mask))) {
H A Dassembler_arm.h319 static bool CanHoldImmediateOffset(bool is_load, intptr_t cid,
1094 Address ElementAddressForIntIndex(bool is_load, bool is_external,
1099 Address ElementAddressForRegIndex(bool is_load, bool is_external,
/third_party/mesa3d/src/freedreno/ir3/
H A Dir3.h1012 is_load(struct ir3_instruction *instr) in is_load() function
1777 (is_load(instr) && !is_local_mem_load(instr)) || in is_sy_producer()
1887 if (is_load(instr)) { in ir3_has_latency_to_hide()
H A Dir3_legalize.c270 } else if (is_load(n)) { in legalize_block()
/third_party/mesa3d/src/broadcom/compiler/
H A Dnir_to_vir.c524 bool is_load = (instr->intrinsic == nir_intrinsic_load_uniform || in ntq_emit_tmu_general() local
531 if (!is_load) in ntq_emit_tmu_general()
628 } else if (!is_load && !atomic_add_replaced) { in ntq_emit_tmu_general()
632 } else if (is_load) { in ntq_emit_tmu_general()
644 if (is_load || atomic_add_replaced) { in ntq_emit_tmu_general()
651 v3d_tmu_get_type_from_op(tmu_op, !is_load) == in ntq_emit_tmu_general()
655 is_load && !vir_in_nonuniform_control_flow(c) in ntq_emit_tmu_general()
/third_party/mesa3d/src/gallium/drivers/zink/
H A Dzink_compiler.c517 bool is_load = true; in bound_bo_access_instr() local
524 is_load = false; in bound_bo_access_instr()
556 if (is_load) in bound_bo_access_instr()
561 if (is_load) { in bound_bo_access_instr()
1296 bool is_load = true; in remove_bo_access_instr() local
1317 is_load = false; in remove_bo_access_instr()
1344 if (is_load) { in remove_bo_access_instr()
/third_party/node/deps/v8/src/codegen/arm/
H A Dassembler-arm.cc1341 bool is_load = (instr & L) == L; in AddrMode2() local
1342 Register scratch = (is_load && rd != x.rn_ && rd != pc && rd != sp) in AddrMode2()
1370 bool is_load = (instr & L) == L; in AddrMode3() local
1383 Register scratch = (is_load && rd != x.rn_ && rd != pc && rd != sp) in AddrMode3()
1399 (is_load && rd != x.rn_ && rd != pc && rd != sp) ? rd : temps.Acquire(); in AddrMode3()
/third_party/mesa3d/src/gallium/auxiliary/nir/
H A Dnir_to_tgsi.c1877 bool is_load = (instr->intrinsic == nir_intrinsic_atomic_counter_read || in ntt_emit_mem() local
1933 if (!is_load) in ntt_emit_mem()
/third_party/node/deps/v8/src/execution/arm64/
H A Dsimulator-arm64.cc2395 int32_t is_load = instr->LoadStoreXLoad();
2405 if (is_load != 0) {

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