/third_party/mesa3d/src/compiler/glsl/ |
H A D | ir_optimization.h | 87 bool do_rebalance_tree(exec_list *instructions); 88 bool do_algebraic(exec_list *instructions, bool native_integers, 90 bool do_constant_folding(exec_list *instructions); 91 bool do_constant_variable(exec_list *instructions); 92 bool do_constant_variable_unlinked(exec_list *instructions); 93 bool do_copy_propagation_elements(exec_list *instructions); 94 bool do_constant_propagation(exec_list *instructions); 95 bool do_dead_code(exec_list *instructions); 96 bool do_dead_code_local(exec_list *instructions); 97 bool do_dead_code_unlinked(exec_list *instructions); [all...] |
H A D | builtin_int64.h | 33 exec_list *const f0013_parent_instructions = body.instructions; in udivmod64() 36 body.instructions = &f0013->then_instructions; in udivmod64() 49 exec_list *const f0019_parent_instructions = body.instructions; in udivmod64() 51 body.instructions = &f0019->body_instructions; in udivmod64() 56 exec_list *const f001A_parent_instructions = body.instructions; in udivmod64() 59 body.instructions = &f001A->then_instructions; in udivmod64() 64 body.instructions = f001A_parent_instructions; in udivmod64() 76 exec_list *const f001C_parent_instructions = body.instructions; in udivmod64() 79 body.instructions = &f001C->then_instructions; in udivmod64() 88 body.instructions in udivmod64() [all...] |
H A D | ast.h | 63 virtual ir_rvalue *hir(exec_list *instructions, 240 virtual ir_rvalue *hir(exec_list *instructions, 243 virtual void hir_no_rvalue(exec_list *instructions, 248 ir_rvalue *do_hir(exec_list *instructions, 327 virtual ir_rvalue *hir(exec_list *instructions, 330 virtual void hir_no_rvalue(exec_list *instructions, 341 handle_method(exec_list *instructions, 429 virtual ir_rvalue *hir(exec_list *instructions, 432 virtual void hir_no_rvalue(exec_list *instructions, 442 virtual ir_rvalue *hir(exec_list *instructions, [all...] |
H A D | ast_function.cpp | 37 process_parameters(exec_list *instructions, exec_list *actual_parameters, in process_parameters() argument 51 ir_rvalue *result = ast->hir(instructions, state); in process_parameters() 546 generate_call(exec_list *instructions, ir_function_signature *sig, in generate_call() argument 577 instructions, &post_call_conversions, in generate_call() 632 * instructions; just generate an ir_constant. in generate_call() 654 instructions->push_tail(var); in generate_call() 663 instructions->push_tail(call); in generate_call() 666 instructions->append_list(&post_call_conversions); in generate_call() 758 generate_array_index(void *mem_ctx, exec_list *instructions, in generate_array_index() argument 765 ir_rvalue *outer_array = generate_array_index(mem_ctx, instructions, in generate_array_index() 1181 process_vec_mat_constructor(exec_list *instructions, const glsl_type *constructor_type, YYLTYPE *loc, exec_list *parameters, struct _mesa_glsl_parse_state *state) process_vec_mat_constructor() argument 1432 emit_inline_vector_constructor(const glsl_type *type, exec_list *instructions, exec_list *parameters, void *ctx) emit_inline_vector_constructor() argument 1636 emit_inline_matrix_constructor(const glsl_type *type, exec_list *instructions, exec_list *parameters, void *ctx) emit_inline_matrix_constructor() argument 1904 emit_inline_record_constructor(const glsl_type *type, exec_list *instructions, exec_list *parameters, void *mem_ctx) emit_inline_record_constructor() argument 1938 process_record_constructor(exec_list *instructions, const glsl_type *constructor_type, YYLTYPE *loc, exec_list *parameters, struct _mesa_glsl_parse_state *state) process_record_constructor() argument 2018 handle_method(exec_list *instructions, struct _mesa_glsl_parse_state *state) handle_method() argument 2104 hir(exec_list *instructions, struct _mesa_glsl_parse_state *state) hir() argument 2531 hir(exec_list *instructions, struct _mesa_glsl_parse_state *state) hir() argument [all...] |
H A D | lower_int64.cpp | 71 lower_64bit_visitor(void *mem_ctx, exec_list *instructions, unsigned lower) in lower_64bit_visitor() argument 79 foreach_in_list(ir_instruction, node, instructions) { in lower_64bit_visitor() 135 lower_64bit_integer_instructions(exec_list *instructions, in lower_64bit_integer_instructions() argument 138 if (instructions->is_empty()) in lower_64bit_integer_instructions() 141 ir_instruction *first_inst = (ir_instruction *) instructions->get_head_raw(); in lower_64bit_integer_instructions() 143 lower_64bit_visitor v(mem_ctx, instructions, what_to_lower); in lower_64bit_integer_instructions() 145 visit_list_elements(&v, instructions); in lower_64bit_integer_instructions() 151 exec_node *const after = &instructions->head_sentinel; in lower_64bit_integer_instructions() 152 exec_node *const before = instructions->head_sentinel.next; in lower_64bit_integer_instructions() 263 exec_list instructions; in lower_op_to_function_call() local [all...] |
/third_party/mesa3d/src/gallium/drivers/zink/nir_to_spirv/ |
H A D | spirv_builder.c | 266 spirv_buffer_prepare(&b->instructions, b->mem_ctx, words); in spirv_builder_emit_vertex() 267 spirv_buffer_emit_word(&b->instructions, op | (words << 16)); in spirv_builder_emit_vertex() 269 spirv_buffer_emit_word(&b->instructions, spirv_builder_const_uint(b, 32, stream)); in spirv_builder_emit_vertex() 281 spirv_buffer_prepare(&b->instructions, b->mem_ctx, words); in spirv_builder_end_primitive() 282 spirv_buffer_emit_word(&b->instructions, op | (words << 16)); in spirv_builder_end_primitive() 284 spirv_buffer_emit_word(&b->instructions, spirv_builder_const_uint(b, 32, stream)); in spirv_builder_end_primitive() 379 spirv_buffer_prepare(&b->instructions, b->mem_ctx, 3); in spirv_builder_emit_undef() 380 spirv_buffer_emit_word(&b->instructions, SpvOpUndef | (3 << 16)); in spirv_builder_emit_undef() 381 spirv_buffer_emit_word(&b->instructions, result_type); in spirv_builder_emit_undef() 382 spirv_buffer_emit_word(&b->instructions, resul in spirv_builder_emit_undef() [all...] |
/third_party/mesa3d/src/panfrost/midgard/ |
H A D | midgard_schedule.c | 32 /* Scheduling for Midgard is complicated, to say the least. ALU instructions 40 * instructions can execute on SADD/SMUL units. Units on a given line execute 45 * all of the instructions within a bundle. 54 * Load/store instructions are also in bundles of simply two instructions, and 55 * texture instructions have no bundling. 66 add_dependency(struct util_dynarray *table, unsigned index, uint16_t mask, midgard_instruction **instructions, unsigned child) in add_dependency() argument 75 BITSET_WORD *dependents = instructions[*parent]->dependents; in add_dependency() 82 instructions[child]->nr_dependencies++; in add_dependency() 99 mir_create_dependency_graph(midgard_instruction **instructions, unsigne argument 296 mir_initialize_worklist(BITSET_WORD *worklist, midgard_instruction **instructions, unsigned count) mir_initialize_worklist() argument 309 mir_update_worklist( BITSET_WORD *worklist, unsigned count, midgard_instruction **instructions, midgard_instruction *done) mir_update_worklist() argument 655 mir_choose_instruction( midgard_instruction **instructions, uint16_t *liveness, BITSET_WORD *worklist, unsigned count, struct midgard_predicate *predicate) mir_choose_instruction() argument 793 mir_choose_bundle( midgard_instruction **instructions, uint16_t *liveness, BITSET_WORD *worklist, unsigned count, unsigned num_ldst) mir_choose_bundle() argument 841 mir_choose_alu(midgard_instruction **slot, midgard_instruction **instructions, uint16_t *liveness, BITSET_WORD *worklist, unsigned len, struct midgard_predicate *predicate, unsigned unit) mir_choose_alu() argument 876 mir_comparison_mobile( compiler_context *ctx, midgard_instruction **instructions, struct midgard_predicate *predicate, unsigned count, unsigned cond) mir_comparison_mobile() argument 931 mir_schedule_comparison( compiler_context *ctx, midgard_instruction **instructions, struct midgard_predicate *predicate, BITSET_WORD *worklist, unsigned count, unsigned cond, bool vector, unsigned *swizzle, midgard_instruction *user) mir_schedule_comparison() argument 964 mir_schedule_condition(compiler_context *ctx, struct midgard_predicate *predicate, BITSET_WORD *worklist, unsigned count, midgard_instruction **instructions, midgard_instruction *last) mir_schedule_condition() argument 1019 mir_schedule_texture( midgard_instruction **instructions, uint16_t *liveness, BITSET_WORD *worklist, unsigned len, bool is_vertex) mir_schedule_texture() argument 1049 mir_schedule_ldst( midgard_instruction **instructions, uint16_t *liveness, BITSET_WORD *worklist, unsigned len, unsigned *num_ldst) mir_schedule_ldst() argument 1089 mir_schedule_zs_write( compiler_context *ctx, struct midgard_predicate *predicate, midgard_instruction **instructions, uint16_t *liveness, BITSET_WORD *worklist, unsigned len, midgard_instruction *branch, midgard_instruction **smul, midgard_instruction **vadd, midgard_instruction **vlut, bool stencil) mir_schedule_zs_write() argument 1157 mir_schedule_alu( compiler_context *ctx, midgard_instruction **instructions, uint16_t *liveness, BITSET_WORD *worklist, unsigned len) mir_schedule_alu() argument 1426 midgard_instruction **instructions = flatten_mir(block, &len); schedule_block() local [all...] |
/third_party/skia/third_party/externals/spirv-tools/test/fuzz/ |
H A D | transformation_add_function_test.cpp | 97 // Look through the instructions in the function's first block. in AllVariablesAndParametersExceptLoopLimiterAreIrrelevant() 507 // No instructions in TEST() 534 // Abrupt end of instructions in TEST() 583 std::vector<protobufs::Instruction> instructions; in TEST() local 584 instructions.push_back(MakeInstructionMessage( in TEST() 588 instructions.push_back(MakeInstructionMessage(SpvOpLabel, 0, 31, {})); in TEST() 589 instructions.push_back( in TEST() 591 instructions.push_back(MakeInstructionMessage(SpvOpLabel, 0, 20, {})); in TEST() 592 instructions.push_back(MakeInstructionMessage( in TEST() 597 instructions in TEST() 838 std::vector<protobufs::Instruction> instructions; TEST() local 997 std::vector<protobufs::Instruction> instructions; TEST() local 1190 std::vector<protobufs::Instruction> instructions; TEST() local 1635 std::vector<protobufs::Instruction> instructions; TEST() local 1739 std::vector<protobufs::Instruction> instructions; TEST() local 1892 std::vector<protobufs::Instruction> instructions = TEST() local 2049 std::vector<protobufs::Instruction> instructions = TEST() local 2204 std::vector<protobufs::Instruction> instructions = TEST() local 2351 std::vector<protobufs::Instruction> instructions = TEST() local 2463 std::vector<protobufs::Instruction> instructions = TEST() local 2628 std::vector<protobufs::Instruction> instructions = TEST() local 2820 std::vector<protobufs::Instruction> instructions = TEST() local 2969 std::vector<protobufs::Instruction> instructions = TEST() local [all...] |
/third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/test/fuzz/ |
H A D | transformation_add_function_test.cpp | 97 // Look through the instructions in the function's first block. in AllVariablesAndParametersExceptLoopLimiterAreIrrelevant() 507 // No instructions in TEST() 534 // Abrupt end of instructions in TEST() 583 std::vector<protobufs::Instruction> instructions; in TEST() local 584 instructions.push_back(MakeInstructionMessage( in TEST() 588 instructions.push_back(MakeInstructionMessage(SpvOpLabel, 0, 31, {})); in TEST() 589 instructions.push_back( in TEST() 591 instructions.push_back(MakeInstructionMessage(SpvOpLabel, 0, 20, {})); in TEST() 592 instructions.push_back(MakeInstructionMessage( in TEST() 597 instructions in TEST() 838 std::vector<protobufs::Instruction> instructions; TEST() local 997 std::vector<protobufs::Instruction> instructions; TEST() local 1190 std::vector<protobufs::Instruction> instructions; TEST() local 1635 std::vector<protobufs::Instruction> instructions; TEST() local 1739 std::vector<protobufs::Instruction> instructions; TEST() local 1892 std::vector<protobufs::Instruction> instructions = TEST() local 2049 std::vector<protobufs::Instruction> instructions = TEST() local 2204 std::vector<protobufs::Instruction> instructions = TEST() local 2351 std::vector<protobufs::Instruction> instructions = TEST() local 2463 std::vector<protobufs::Instruction> instructions = TEST() local 2628 std::vector<protobufs::Instruction> instructions = TEST() local 2820 std::vector<protobufs::Instruction> instructions = TEST() local 2969 std::vector<protobufs::Instruction> instructions = TEST() local [all...] |
/third_party/spirv-tools/test/fuzz/ |
H A D | transformation_add_function_test.cpp | 97 // Look through the instructions in the function's first block. in AllVariablesAndParametersExceptLoopLimiterAreIrrelevant() 518 // No instructions in TEST() 546 // Abrupt end of instructions in TEST() 595 std::vector<protobufs::Instruction> instructions; in TEST() local 596 instructions.push_back( in TEST() 601 instructions.push_back(MakeInstructionMessage(spv::Op::OpLabel, 0, 31, {})); in TEST() 602 instructions.push_back(MakeInstructionMessage(spv::Op::OpBranch, 0, 0, in TEST() 604 instructions.push_back(MakeInstructionMessage(spv::Op::OpLabel, 0, 20, {})); in TEST() 605 instructions.push_back( in TEST() 611 instructions in TEST() 858 std::vector<protobufs::Instruction> instructions; TEST() local 1022 std::vector<protobufs::Instruction> instructions; TEST() local 1220 std::vector<protobufs::Instruction> instructions; TEST() local 1669 std::vector<protobufs::Instruction> instructions; TEST() local 1775 std::vector<protobufs::Instruction> instructions; TEST() local 1930 std::vector<protobufs::Instruction> instructions = TEST() local 2087 std::vector<protobufs::Instruction> instructions = TEST() local 2242 std::vector<protobufs::Instruction> instructions = TEST() local 2389 std::vector<protobufs::Instruction> instructions = TEST() local 2501 std::vector<protobufs::Instruction> instructions = TEST() local 2666 std::vector<protobufs::Instruction> instructions = TEST() local 2858 std::vector<protobufs::Instruction> instructions = TEST() local 3007 std::vector<protobufs::Instruction> instructions = TEST() local [all...] |
/third_party/mesa3d/src/compiler/glsl/tests/ |
H A D | lower_int64_test.cpp | 50 exec_list instructions; member in expand_source 64 instructions.make_empty(); in SetUp() 65 body = new ir_factory(&instructions, mem_ctx); in SetUp() 125 check_instructions(exec_list *instructions, in check_instructions() argument 152 ASSERT_FALSE(instructions->is_empty()); in check_instructions() 153 ir = (ir_instruction *) instructions->pop_head(); in check_instructions() 162 ASSERT_FALSE(instructions->is_empty()); in check_instructions() 163 ir = (ir_instruction *) instructions->pop_head(); in check_instructions() 171 ASSERT_FALSE(instructions->is_empty()); in check_instructions() 172 ir = (ir_instruction *) instructions in check_instructions() 380 exec_list instructions; global() member in compact_destination [all...] |
H A D | opt_add_neg_to_sub_test.cpp | 35 exec_list instructions; member in add_neg_to_sub 51 instructions.make_empty(); in SetUp() 52 body = new ir_factory(&instructions, mem_ctx); in SetUp() 83 visit_list_elements(&v, &instructions); in TEST_F() 85 ASSERT_FALSE(instructions.is_empty()); in TEST_F() 87 ir_instruction *const ir = (ir_instruction *) instructions.pop_head(); in TEST_F() 89 EXPECT_TRUE(instructions.is_empty()); in TEST_F() 116 visit_list_elements(&v, &instructions); in TEST_F() 118 ASSERT_FALSE(instructions.is_empty()); in TEST_F() 120 ir_instruction *const ir = (ir_instruction *) instructions in TEST_F() [all...] |
/third_party/mesa3d/src/amd/compiler/ |
H A D | aco_reduce_assign.cpp | 32 * Insert p_linear_start instructions right before RA to correctly allocate 47 for (aco_ptr<Instruction>& instr : block.instructions) { in setup_reduce_temp() 79 std::vector<aco_ptr<Instruction>>::iterator it = block.instructions.begin(); in setup_reduce_temp() 82 block.instructions.insert(it, std::move(end)); in setup_reduce_temp() 93 for (it = block.instructions.begin(); it != block.instructions.end(); ++it) { in setup_reduce_temp() 109 it = block.instructions.insert(it, std::move(create)); in setup_reduce_temp() 116 std::vector<aco_ptr<Instruction>>& instructions = in setup_reduce_temp() 117 program->blocks[last_top_level_block_idx].instructions; in setup_reduce_temp() 118 instructions in setup_reduce_temp() [all...] |
H A D | aco_ssa_elimination.cpp | 59 for (aco_ptr<Instruction>& phi : block.instructions) { in collect_phi_info() 93 unsigned idx = block.instructions.size() - 1; in insert_parallelcopies() 94 while (block.instructions[idx]->opcode != aco_opcode::p_logical_end) { in insert_parallelcopies() 99 std::vector<aco_ptr<Instruction>>::iterator it = std::next(block.instructions.begin(), idx); in insert_parallelcopies() 111 block.instructions.insert(it, std::move(pc)); in insert_parallelcopies() 121 std::vector<aco_ptr<Instruction>>::iterator it = block.instructions.end(); in insert_parallelcopies() 136 block.instructions.insert(it, std::move(pc)); in insert_parallelcopies() 144 for (aco_ptr<Instruction>& instr : block->instructions) { in is_empty_block() 184 aco_ptr<Instruction> branch = std::move(block->instructions.back()); in try_remove_merge_block() 185 block->instructions in try_remove_merge_block() [all...] |
H A D | aco_spill.cpp | 187 it->second.second = it->second.second + block->instructions.size(); in next_uses_per_block() 189 int idx = block->instructions.size() - 1; in next_uses_per_block() 191 aco_ptr<Instruction>& instr = block->instructions[idx]; in next_uses_per_block() 216 aco_ptr<Instruction>& instr = block->instructions[idx]; in next_uses_per_block() 367 for (aco_ptr<Instruction>& instr : block.instructions) { in get_rematerialize_info() 388 if (local_next_uses.size() < block->instructions.size()) { in update_local_next_uses() 391 local_next_uses.resize(block->instructions.size()); in update_local_next_uses() 394 local_next_uses[block->instructions.size() - 1].clear(); in update_local_next_uses() 397 local_next_uses[block->instructions.size() - 1].push_back(std::make_pair<Temp, uint32_t>( in update_local_next_uses() 398 (Temp)pair.first, pair.second.second + block->instructions in update_local_next_uses() 1162 std::vector<aco_ptr<Instruction>> instructions; process_block() local 1393 load_scratch_resource(spill_ctx& ctx, Temp& scratch_offset, Block& block, std::vector<aco_ptr<Instruction>>& instructions, unsigned offset) load_scratch_resource() argument 1448 setup_vgpr_spill_reload(spill_ctx& ctx, Block& block, std::vector<aco_ptr<Instruction>>& instructions, uint32_t spill_slot, unsigned* offset) setup_vgpr_spill_reload() argument 1482 spill_vgpr(spill_ctx& ctx, Block& block, std::vector<aco_ptr<Instruction>>& instructions, aco_ptr<Instruction>& spill, std::vector<uint32_t>& slots) spill_vgpr() argument 1528 reload_vgpr(spill_ctx& ctx, Block& block, std::vector<aco_ptr<Instruction>>& instructions, aco_ptr<Instruction>& reload, std::vector<uint32_t>& slots) reload_vgpr() argument 1763 std::vector<aco_ptr<Instruction>> instructions; assign_spill_slots() local [all...] |
/third_party/vixl/benchmarks/aarch32/ |
H A D | bench-dataop.cc | 32 #include "aarch32/instructions-aarch32.h" 40 // This program focuses on emitting simple instructions. 44 void benchmark(unsigned instructions, InstructionSet isa) { in benchmark() argument 54 for (unsigned i = 0; i < instructions; ++i) { in benchmark() 64 printf("%s: time for %d instructions: %gs\n", in benchmark() 66 instructions, in benchmark() 71 unsigned instructions = 0; in main() local 75 instructions = kDefaultInstructionCount; in main() 78 instructions = atoi(argv[1]); in main() 81 printf("Usage: %s [#instructions]\ in main() [all...] |
/third_party/skia/third_party/externals/spirv-tools/source/val/ |
H A D | validate_adjacency.cpp | 16 // instructions. 37 // Status right after meeting non-OpVariable instructions in the entry block 38 // or non-OpPhi instructions in non-entry blocks, except OpLine. 43 const auto& instructions = _.ordered_instructions(); in ValidateAdjacency() local 46 for (size_t i = 0; i < instructions.size(); ++i) { in ValidateAdjacency() 47 const auto& inst = instructions[i]; in ValidateAdjacency() 59 // allow debug info instructions before OpVariable in a function. in ValidateAdjacency() 74 << "non-OpPhi instructions " in ValidateAdjacency() 83 if (i != (instructions.size() - 1)) { in ValidateAdjacency() 84 switch (instructions[ in ValidateAdjacency() [all...] |
/third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/source/val/ |
H A D | validate_adjacency.cpp | 16 // instructions. 37 // Status right after meeting non-OpVariable instructions in the entry block 38 // or non-OpPhi instructions in non-entry blocks, except OpLine. 43 const auto& instructions = _.ordered_instructions(); in ValidateAdjacency() local 46 for (size_t i = 0; i < instructions.size(); ++i) { in ValidateAdjacency() 47 const auto& inst = instructions[i]; in ValidateAdjacency() 59 // allow debug info instructions before OpVariable in a function. in ValidateAdjacency() 74 << "non-OpPhi instructions " in ValidateAdjacency() 83 if (i != (instructions.size() - 1)) { in ValidateAdjacency() 84 switch (instructions[ in ValidateAdjacency() [all...] |
/third_party/spirv-tools/source/val/ |
H A D | validate_adjacency.cpp | 16 // instructions. 34 // Status right after meeting non-OpVariable instructions in the entry block 35 // or non-OpPhi instructions in non-entry blocks, except OpLine. 40 const auto& instructions = _.ordered_instructions(); in ValidateAdjacency() local 43 for (size_t i = 0; i < instructions.size(); ++i) { in ValidateAdjacency() 44 const auto& inst = instructions[i]; in ValidateAdjacency() 56 // allow debug info instructions before OpVariable in a function. in ValidateAdjacency() 71 << "non-OpPhi instructions " in ValidateAdjacency() 80 if (i != (instructions.size() - 1)) { in ValidateAdjacency() 81 switch (instructions[ in ValidateAdjacency() [all...] |
/third_party/mesa3d/src/panfrost/bifrost/ |
H A D | bi_opcodes.c.py | 31 add = instructions["+" + opcode][0][1] if "+" + opcode in instructions else None 40 has_fma = int("*" + opcode in instructions) 41 has_add = int("+" + opcode in instructions) 62 instructions = parse_instructions(sys.argv[1], include_pseudo = True) variable 63 ir_instructions = partition_mnemonics(instructions) 64 mnemonics = set(x[1:] for x in instructions.keys()) 66 print(Template(COPYRIGHT + TEMPLATE).render(ops = ir_instructions, mnemonics = mnemonics, instructions = instructions, typesize = typesize))
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/third_party/skia/third_party/externals/spirv-tools/source/fuzz/ |
H A D | fuzzer_pass_add_equation_instructions.h | 25 // Fuzzer pass that sprinkles instructions through the module that define 38 // Yields those instructions in |instructions| that have integer scalar or 41 const std::vector<opt::Instruction*>& instructions) const; 43 // Returns only instructions, that have either a scalar floating-point or a 46 const std::vector<opt::Instruction*>& instructions) const; 48 // Yields those instructions in |instructions| that have boolean scalar or 51 const std::vector<opt::Instruction*>& instructions) const; 53 // Yields those instructions i [all...] |
/third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/source/fuzz/ |
H A D | fuzzer_pass_add_equation_instructions.h | 25 // Fuzzer pass that sprinkles instructions through the module that define 38 // Yields those instructions in |instructions| that have integer scalar or 41 const std::vector<opt::Instruction*>& instructions) const; 43 // Returns only instructions, that have either a scalar floating-point or a 46 const std::vector<opt::Instruction*>& instructions) const; 48 // Yields those instructions in |instructions| that have boolean scalar or 51 const std::vector<opt::Instruction*>& instructions) const; 53 // Yields those instructions i [all...] |
/third_party/spirv-tools/source/fuzz/ |
H A D | fuzzer_pass_add_equation_instructions.h | 25 // Fuzzer pass that sprinkles instructions through the module that define 38 // Yields those instructions in |instructions| that have integer scalar or 41 const std::vector<opt::Instruction*>& instructions) const; 43 // Returns only instructions, that have either a scalar floating-point or a 46 const std::vector<opt::Instruction*>& instructions) const; 48 // Yields those instructions in |instructions| that have boolean scalar or 51 const std::vector<opt::Instruction*>& instructions) const; 53 // Yields those instructions i [all...] |
/third_party/glslang/SPIRV/ |
H A D | spvIR.h | 200 Id getId() { return instructions.front()->getResultId(); } in getId() 209 return instructions; in getInstructions() 216 if (instructions.size() < 2) return nullptr; in getMergeInstruction() 217 const Instruction* nextToLast = (instructions.cend() - 2)->get(); in getMergeInstruction() 228 // Change this block into a canonical dead merge block. Delete instructions 233 // Delete all instructions except for the label. in rewriteAsCanonicalUnreachableMerge() 234 assert(instructions.size() > 0); in rewriteAsCanonicalUnreachableMerge() 235 instructions.resize(1); in rewriteAsCanonicalUnreachableMerge() 240 // given header ID. Delete instructions as necessary. A canonical dead continue 245 // Delete all instructions excep in rewriteAsCanonicalUnreachableContinue() 290 std::vector<std::unique_ptr<Instruction> > instructions; global() member in spv::Block [all...] |
/third_party/skia/third_party/externals/harfbuzz/test/fuzzing/ |
H A D | hb-set-fuzzer.cc | 51 const instructions_t &instructions = reinterpret_cast<const instructions_t &> (data); in LLVMFuzzerTestOneInput() local 59 if (size < instructions.first_set_size) in LLVMFuzzerTestOneInput() 62 hb_set_t *set_a = create_set (values, instructions.first_set_size); in LLVMFuzzerTestOneInput() 64 values += instructions.first_set_size; in LLVMFuzzerTestOneInput() 65 size -= instructions.first_set_size; in LLVMFuzzerTestOneInput() 68 switch (instructions.operation) in LLVMFuzzerTestOneInput()
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