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Searched refs:imm19 (Results 1 - 14 of 14) sorted by relevance

/third_party/node/deps/v8/src/codegen/arm64/
H A Dassembler-arm64-inl.h876 Instr Assembler::ImmCondBranch(int imm19) { in ImmCondBranch() argument
877 CHECK(is_int19(imm19)); in ImmCondBranch()
878 return truncate_to_int19(imm19) << ImmCondBranch_offset; in ImmCondBranch()
881 Instr Assembler::ImmCmpBranch(int imm19) { in ImmCmpBranch() argument
882 CHECK(is_int19(imm19)); in ImmCmpBranch()
883 return truncate_to_int19(imm19) << ImmCmpBranch_offset; in ImmCmpBranch()
946 Instr Assembler::ImmLLiteral(int imm19) { in ImmLLiteral() argument
947 CHECK(is_int19(imm19)); in ImmLLiteral()
948 return truncate_to_int19(imm19) << ImmLLiteral_offset; in ImmLLiteral()
H A Dassembler-arm64.h388 void b(int imm19, Condition cond);
396 void cbz(const Register& rt, int imm19);
400 void cbnz(const Register& rt, int imm19);
840 void ldr_pcrel(const CPURegister& rt, int imm19);
2169 inline static Instr ImmCondBranch(int imm19);
2170 inline static Instr ImmCmpBranch(int imm19);
2181 inline static Instr ImmLLiteral(int imm19);
H A Dassembler-arm64.cc778 void Assembler::b(int imm19, Condition cond) { in b() argument
779 Emit(B_cond | ImmCondBranch(imm19) | cond); in b()
790 void Assembler::cbz(const Register& rt, int imm19) { in cbz() argument
791 Emit(SF(rt) | CBZ | ImmCmpBranch(imm19) | Rt(rt)); in cbz()
798 void Assembler::cbnz(const Register& rt, int imm19) { in cbnz() argument
799 Emit(SF(rt) | CBNZ | ImmCmpBranch(imm19) | Rt(rt)); in cbnz()
1310 void Assembler::ldr_pcrel(const CPURegister& rt, int imm19) { in ldr_pcrel() argument
1314 Emit(LoadLiteralOpFor(rt) | ImmLLiteral(imm19) | Rt(rt)); in ldr_pcrel()
/third_party/node/deps/v8/src/diagnostics/mips64/
H A Ddisasm-mips64.cc386 int32_t imm19 = instr->Imm19Value(); in PrintSImm19() local
388 imm19 <<= (32 - kImm19Bits); in PrintSImm19()
389 imm19 >>= (32 - kImm19Bits); in PrintSImm19()
390 out_buffer_pos_ += base::SNPrintF(out_buffer_ + out_buffer_pos_, "%d", imm19); in PrintSImm19()
800 DCHECK(STRING_STARTS_WITH(format, "imm19")); in FormatOption()
/third_party/node/deps/v8/src/diagnostics/mips/
H A Ddisasm-mips.cc355 int32_t imm19 = instr->Imm19Value(); in PrintSImm19() local
357 imm19 <<= (32 - kImm19Bits); in PrintSImm19()
358 imm19 >>= (32 - kImm19Bits); in PrintSImm19()
359 out_buffer_pos_ += base::SNPrintF(out_buffer_ + out_buffer_pos_, "%d", imm19); in PrintSImm19()
759 DCHECK(STRING_STARTS_WITH(format, "imm19")); in FormatOption()
/third_party/vixl/src/aarch64/
H A Dassembler-aarch64.h569 void b(int64_t imm19, Condition cond);
581 void cbz(const Register& rt, int64_t imm19);
587 void cbnz(const Register& rt, int64_t imm19);
1316 // Load integer or FP register from pc + imm19 << 2.
1317 void ldr(const CPURegister& rt, int64_t imm19);
1319 // Load word with sign extension from pc + imm19 << 2.
1320 void ldrsw(const Register& xt, int64_t imm19);
2090 // Prefetch from pc + imm19 << 2.
2091 void prfm(PrefetchOperation op, int64_t imm19);
2106 // Prefetch from pc + imm19 <<
[all...]
H A Dassembler-aarch64.cc123 ptrdiff_t imm19 = ldr->GetImmLLiteral(); in place() local
124 VIXL_ASSERT(imm19 <= 0); in place()
125 done = (imm19 == 0); in place()
126 offset += imm19 * kLiteralEntrySize; in place()
262 void Assembler::b(int64_t imm19, Condition cond) { in b() argument
263 Emit(B_cond | ImmCondBranch(imm19) | cond); in b()
291 void Assembler::cbz(const Register& rt, int64_t imm19) { in cbz() argument
292 Emit(SF(rt) | CBZ | ImmCmpBranch(imm19) | Rt(rt)); in cbz()
303 void Assembler::cbnz(const Register& rt, int64_t imm19) { in cbnz() argument
304 Emit(SF(rt) | CBNZ | ImmCmpBranch(imm19) | R in cbnz()
1379 ldrsw(const Register& rt, int64_t imm19) ldrsw() argument
1384 ldr(const CPURegister& rt, int64_t imm19) ldr() argument
1391 prfm(int op, int64_t imm19) prfm() argument
1395 prfm(PrefetchOperation op, int64_t imm19) prfm() argument
1398 prfm(static_cast<int>(op), imm19); prfm() local
[all...]
/third_party/node/deps/v8/src/execution/mips64/
H A Dsimulator-mips64.cc7157 int32_t imm19 = instr_.Imm19Value();
7172 imm19 <<= (kOpcodeBits + kRsBits + 2);
7173 imm19 >>= (kOpcodeBits + kRsBits + 2);
7174 addr = current_pc + (imm19 << 2);
7180 imm19 <<= (kOpcodeBits + kRsBits + 2);
7181 imm19 >>= (kOpcodeBits + kRsBits + 2);
7182 addr = current_pc + (imm19 << 2);
7188 imm19 | ((imm19 & 0x40000) ? 0xFFFFFFFFFFF80000 : 0);
/third_party/node/deps/v8/src/execution/mips/
H A Dsimulator-mips.cc6783 int32_t imm19 = instr_.Imm19Value();
6789 imm19 <<= (kOpcodeBits + kRsBits + 2);
6790 imm19 >>= (kOpcodeBits + kRsBits + 2);
6791 addr = current_pc + (imm19 << 2);
6797 int32_t se_imm19 = imm19 | ((imm19 & 0x40000) ? 0xFFF80000 : 0);
/third_party/node/deps/v8/src/codegen/mips/
H A Dassembler-mips.cc2185 void Assembler::addiupc(Register rs, int32_t imm19) { in addiupc() argument
2187 DCHECK(rs.is_valid() && is_int19(imm19)); in addiupc()
2188 uint32_t imm21 = ADDIUPC << kImm19Bits | (imm19 & kImm19Mask); in addiupc()
H A Dassembler-mips.h562 void addiupc(Register rs, int32_t imm19);
/third_party/skia/src/core/
H A DSkVM.cpp2414 const int imm19 = this->disp19(l);
2415 this->op(0b0101010'0'00000000000000, (X)0, (V)cond, (imm19 & 19_mask) << 5);
2418 const int imm19 = this->disp19(l);
2419 this->op(0b1'011010'0'00000000000000, (X)0, t, (imm19 & 19_mask) << 5);
2422 const int imm19 = this->disp19(l);
2423 this->op(0b1'011010'1'00000000000000, (X)0, t, (imm19 & 19_mask) << 5);
2486 const int imm19 = this->disp19(l);
2487 this->op(0b10'011'1'00'00000000000000, (V)0, dst, (imm19 & 19_mask) << 5);
/third_party/node/deps/v8/src/codegen/mips64/
H A Dassembler-mips64.cc2310 void Assembler::addiupc(Register rs, int32_t imm19) { in addiupc() argument
2312 DCHECK(rs.is_valid() && is_int19(imm19)); in addiupc()
2313 uint32_t imm21 = ADDIUPC << kImm19Bits | (imm19 & kImm19Mask); in addiupc()
H A Dassembler-mips64.h604 void addiupc(Register rs, int32_t imm19);

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